From: Christoph Muellner <christoph.muellner@vrull.eu>
To: gcc-patches@gcc.gnu.org, Kito Cheng <kito.cheng@sifive.com>,
Jim Wilson <jim.wilson.gcc@gmail.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Andrew Waterman <andrew@sifive.com>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Cooper Qu <cooper.qu@linux.alibaba.com>,
Lifang Xia <lifang_xia@linux.alibaba.com>,
Yunhai Shang <yunhai@linux.alibaba.com>,
Zhiwei Liu <zhiwei_liu@linux.alibaba.com>
Cc: "Christoph Müllner" <christoph.muellner@vrull.eu>
Subject: [PATCH 0/7] Add XThead* support
Date: Sun, 13 Nov 2022 22:46:29 +0100 [thread overview]
Message-ID: <20221113214636.2747737-1-christoph.muellner@vrull.eu> (raw)
From: Christoph Müllner <christoph.muellner@vrull.eu>
This series adds support for the following vendor extensions
from T-Head:
* XTheadCmo, XTheadSync
* XTheadBa, XTheadBb, XTheadBs
* XTheadCondMov
* XTheadMac
* XTheadFmv, XTheadInt
No regressions observed.
Christoph Müllner (7):
riscv: Add basic XThead* vendor extension support
riscv: riscv-cores.def: Add T-Head XuanTie C906
riscv: thead: Add support for XTheadBa and XTheadBs ISA extensions
riscv: thead: Add support for XTheadCondMov ISA extensions
riscv: thead: Add support for XTheadBb ISA extension
riscv: thead: Add support for XTheadMac ISA extension
riscv: Add basic extension support for XTheadFmv and XTheadInt
gcc/common/config/riscv/riscv-common.cc | 24 ++
gcc/config/riscv/bitmanip.md | 47 +++-
gcc/config/riscv/iterators.md | 4 +
gcc/config/riscv/riscv-cores.def | 2 +
gcc/config/riscv/riscv-opts.h | 23 ++
gcc/config/riscv/riscv.cc | 67 ++++-
gcc/config/riscv/riscv.md | 52 +++-
gcc/config/riscv/riscv.opt | 3 +
gcc/config/riscv/thead.md | 252 ++++++++++++++++++
.../gcc.target/riscv/mcpu-thead-c906.c | 18 ++
gcc/testsuite/gcc.target/riscv/thead-mula-1.c | 40 +++
gcc/testsuite/gcc.target/riscv/thead-mula-2.c | 28 ++
.../gcc.target/riscv/xtheadba-addsl-64.c | 18 ++
.../gcc.target/riscv/xtheadba-addsl.c | 20 ++
gcc/testsuite/gcc.target/riscv/xtheadba.c | 13 +
gcc/testsuite/gcc.target/riscv/xtheadbb-ext.c | 19 ++
.../gcc.target/riscv/xtheadbb-extu.c | 12 +
gcc/testsuite/gcc.target/riscv/xtheadbb-rev.c | 40 +++
.../gcc.target/riscv/xtheadbb-srri.c | 18 ++
gcc/testsuite/gcc.target/riscv/xtheadbb.c | 13 +
gcc/testsuite/gcc.target/riscv/xtheadbs-tst.c | 12 +
gcc/testsuite/gcc.target/riscv/xtheadbs.c | 13 +
gcc/testsuite/gcc.target/riscv/xtheadcmo.c | 13 +
.../riscv/xtheadcondmov-mveqz-imm-eqz.c | 37 +++
.../riscv/xtheadcondmov-mveqz-imm-not.c | 37 +++
.../riscv/xtheadcondmov-mveqz-reg-eqz.c | 37 +++
.../riscv/xtheadcondmov-mveqz-reg-not.c | 37 +++
.../riscv/xtheadcondmov-mvnez-imm-cond.c | 37 +++
.../riscv/xtheadcondmov-mvnez-imm-nez.c | 37 +++
.../riscv/xtheadcondmov-mvnez-reg-cond.c | 37 +++
.../riscv/xtheadcondmov-mvnez-reg-nez.c | 37 +++
.../gcc.target/riscv/xtheadcondmov.c | 13 +
.../gcc.target/riscv/xtheadfmemidx.c | 13 +
gcc/testsuite/gcc.target/riscv/xtheadfmv.c | 14 +
gcc/testsuite/gcc.target/riscv/xtheadint.c | 14 +
gcc/testsuite/gcc.target/riscv/xtheadmac.c | 13 +
gcc/testsuite/gcc.target/riscv/xtheadmemidx.c | 13 +
gcc/testsuite/gcc.target/riscv/xtheadsync.c | 13 +
38 files changed, 1123 insertions(+), 17 deletions(-)
create mode 100644 gcc/config/riscv/thead.md
create mode 100644 gcc/testsuite/gcc.target/riscv/mcpu-thead-c906.c
create mode 100644 gcc/testsuite/gcc.target/riscv/thead-mula-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/thead-mula-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadba-addsl-64.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadba-addsl.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadba.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadbb-ext.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadbb-extu.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadbb-rev.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadbb-srri.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadbb.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadbs-tst.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadbs.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadcmo.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadcondmov-mveqz-reg-eqz.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadcondmov-mveqz-reg-not.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadcondmov-mvnez-reg-cond.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadcondmov-mvnez-reg-nez.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadcondmov.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadfmemidx.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadfmv.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadint.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadmac.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadmemidx.c
create mode 100644 gcc/testsuite/gcc.target/riscv/xtheadsync.c
--
2.38.1
next reply other threads:[~2022-11-13 21:46 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-13 21:46 Christoph Muellner [this message]
2022-11-13 21:46 ` [PATCH 1/7] riscv: Add basic XThead* vendor extension support Christoph Muellner
2022-11-13 21:46 ` [PATCH 2/7] riscv: riscv-cores.def: Add T-Head XuanTie C906 Christoph Muellner
2022-11-18 4:50 ` cooper.qu
2022-11-18 4:58 ` Palmer Dabbelt
2022-11-13 21:46 ` [PATCH 3/7] riscv: thead: Add support for XTheadBa and XTheadBs ISA extensions Christoph Muellner
2022-11-13 21:46 ` [PATCH 4/7] riscv: thead: Add support for XTheadCondMov " Christoph Muellner
2022-11-13 21:46 ` [PATCH 5/7] riscv: thead: Add support for XTheadBb ISA extension Christoph Muellner
2022-11-18 4:21 ` cooper.qu
2022-11-13 21:46 ` [PATCH 6/7] riscv: thead: Add support for XTheadMac " Christoph Muellner
2022-11-13 21:46 ` [PATCH 7/7] riscv: Add basic extension support for XTheadFmv and XTheadInt Christoph Muellner
2022-11-18 4:43 ` cooper.qu
2023-11-02 7:26 ` [RE] [7/7] " Jin Ma
2023-11-02 7:42 ` Christoph Müllner
2023-11-07 3:04 ` [PATCH] riscv: thead: Add support for the XTheadInt ISA extension Jin Ma
2023-11-10 15:05 ` Christoph Müllner
2023-11-17 7:33 ` [PATCH v2] RISC-V: T-HEAD: " Jin Ma
2024-01-09 9:35 ` Jin Ma
2024-01-09 17:59 ` [PATCH " Jeff Law
2024-01-10 17:56 ` Christoph Müllner
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