* [PATCH] RISC-V: Call DCE to remove redundant instructions created by the PASS
@ 2023-01-09 23:20 juzhe.zhong
2023-01-16 13:38 ` Kito Cheng
0 siblings, 1 reply; 2+ messages in thread
From: juzhe.zhong @ 2023-01-09 23:20 UTC (permalink / raw)
To: gcc-patches; +Cc: kito.cheng, palmer, Ju-Zhe Zhong
From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (pass_vsetvl::done): Add DCE.
* config/riscv/t-riscv: Add DCE.
---
gcc/config/riscv/riscv-vsetvl.cc | 2 ++
gcc/config/riscv/t-riscv | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index 7d8c3a32aaa..7aa2852b456 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -87,6 +87,7 @@ along with GCC; see the file COPYING3. If not see
#include "predict.h"
#include "profile-count.h"
#include "riscv-vsetvl.h"
+#include "dce.h"
using namespace rtl_ssa;
using namespace riscv_vector;
@@ -2627,6 +2628,7 @@ pass_vsetvl::done (void)
cleanup_cfg (0);
delete crtl->ssa;
crtl->ssa = nullptr;
+ run_fast_dce ();
}
m_vector_manager->release ();
delete m_vector_manager;
diff --git a/gcc/config/riscv/t-riscv b/gcc/config/riscv/t-riscv
index d30e0235356..c95f4aff358 100644
--- a/gcc/config/riscv/t-riscv
+++ b/gcc/config/riscv/t-riscv
@@ -54,7 +54,7 @@ riscv-c.o: $(srcdir)/config/riscv/riscv-c.cc $(CONFIG_H) $(SYSTEM_H) \
riscv-vsetvl.o: $(srcdir)/config/riscv/riscv-vsetvl.cc \
$(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) $(REGS_H) \
$(TARGET_H) tree-pass.h df.h rtl-ssa.h cfgcleanup.h insn-config.h \
- insn-attr.h insn-opinit.h tm-constrs.h cfgrtl.h cfganal.h lcm.h \
+ insn-attr.h insn-opinit.h tm-constrs.h cfgrtl.h cfganal.h lcm.h dce.h \
predict.h profile-count.h $(srcdir)/config/riscv/riscv-vsetvl.h
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
$(srcdir)/config/riscv/riscv-vsetvl.cc
--
2.36.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] RISC-V: Call DCE to remove redundant instructions created by the PASS
2023-01-09 23:20 [PATCH] RISC-V: Call DCE to remove redundant instructions created by the PASS juzhe.zhong
@ 2023-01-16 13:38 ` Kito Cheng
0 siblings, 0 replies; 2+ messages in thread
From: Kito Cheng @ 2023-01-16 13:38 UTC (permalink / raw)
To: juzhe.zhong; +Cc: gcc-patches, palmer
[-- Attachment #1: Type: text/plain, Size: 2034 bytes --]
After discussing with Ju.Zhe, we decided to rearrange the pass of vsetvl
insertion instead of call run_fast_dce within this pass.
On Tue, Jan 10, 2023 at 7:21 AM <juzhe.zhong@rivai.ai> wrote:
> From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-vsetvl.cc (pass_vsetvl::done): Add DCE.
> * config/riscv/t-riscv: Add DCE.
>
> ---
> gcc/config/riscv/riscv-vsetvl.cc | 2 ++
> gcc/config/riscv/t-riscv | 2 +-
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/config/riscv/riscv-vsetvl.cc
> b/gcc/config/riscv/riscv-vsetvl.cc
> index 7d8c3a32aaa..7aa2852b456 100644
> --- a/gcc/config/riscv/riscv-vsetvl.cc
> +++ b/gcc/config/riscv/riscv-vsetvl.cc
> @@ -87,6 +87,7 @@ along with GCC; see the file COPYING3. If not see
> #include "predict.h"
> #include "profile-count.h"
> #include "riscv-vsetvl.h"
> +#include "dce.h"
>
> using namespace rtl_ssa;
> using namespace riscv_vector;
> @@ -2627,6 +2628,7 @@ pass_vsetvl::done (void)
> cleanup_cfg (0);
> delete crtl->ssa;
> crtl->ssa = nullptr;
> + run_fast_dce ();
> }
> m_vector_manager->release ();
> delete m_vector_manager;
> diff --git a/gcc/config/riscv/t-riscv b/gcc/config/riscv/t-riscv
> index d30e0235356..c95f4aff358 100644
> --- a/gcc/config/riscv/t-riscv
> +++ b/gcc/config/riscv/t-riscv
> @@ -54,7 +54,7 @@ riscv-c.o: $(srcdir)/config/riscv/riscv-c.cc $(CONFIG_H)
> $(SYSTEM_H) \
> riscv-vsetvl.o: $(srcdir)/config/riscv/riscv-vsetvl.cc \
> $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) $(REGS_H) \
> $(TARGET_H) tree-pass.h df.h rtl-ssa.h cfgcleanup.h insn-config.h \
> - insn-attr.h insn-opinit.h tm-constrs.h cfgrtl.h cfganal.h lcm.h \
> + insn-attr.h insn-opinit.h tm-constrs.h cfgrtl.h cfganal.h lcm.h dce.h \
> predict.h profile-count.h $(srcdir)/config/riscv/riscv-vsetvl.h
> $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
> $(srcdir)/config/riscv/riscv-vsetvl.cc
> --
> 2.36.1
>
>
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2023-01-16 13:38 ` Kito Cheng
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