From: "Fei Gao" <gaofei@eswincomputing.com>
To: gcc-patches <gcc-patches@gcc.gnu.org>
Cc: jeffreyalaw <jeffreyalaw@gmail.com>,
"Kito Cheng" <kito.cheng@gmail.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>
Subject: [PING] [PATCH 3/3] RISC-V: make the stack manipulation codes more readable.
Date: Fri, 3 Feb 2023 16:52:49 +0800 [thread overview]
Message-ID: <20230203165249289806119@eswincomputing.com> (raw)
In-Reply-To: <20221201100332.22226-4-gaofei@eswincomputing.com>
Gentle ping.
The patch I previously submitted:
| Date: Wed, 30 Nov 2022 00:38:08 -0800
| Subject: [PATCH] RISC-V: optimize stack manipulation in save-restore
| Message-ID: <gaofei@eswincomputing.com>
I split the patches as per Palmer's review comment.
BR
Fei
>gcc/ChangeLog:
>
> * config/riscv/riscv.cc (riscv_first_stack_step): make codes more readable.
> (riscv_expand_epilogue): likewise.
>---
> gcc/config/riscv/riscv.cc | 17 ++++++++++-------
> 1 file changed, 10 insertions(+), 7 deletions(-)
>
>diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
>index a50f2303032..95da08ffb3b 100644
>--- a/gcc/config/riscv/riscv.cc
>+++ b/gcc/config/riscv/riscv.cc
>@@ -4926,8 +4926,11 @@ riscv_first_stack_step (struct riscv_frame_info *frame, poly_int64 remaining_siz
> if (SMALL_OPERAND (remaining_const_size))
> return remaining_const_size;
>
>+ poly_int64 callee_saved_first_step =
>+ remaining_size - frame->frame_pointer_offset;
>+ gcc_assert(callee_saved_first_step.is_constant ());
> HOST_WIDE_INT min_first_step =
>- riscv_stack_align ((remaining_size - frame->frame_pointer_offset).to_constant());
>+ riscv_stack_align (callee_saved_first_step.to_constant ());
> HOST_WIDE_INT max_first_step = IMM_REACH / 2 - PREFERRED_STACK_BOUNDARY / 8;
> HOST_WIDE_INT min_second_step = remaining_const_size - max_first_step;
> gcc_assert (min_first_step <= max_first_step);
>@@ -4935,7 +4938,7 @@ riscv_first_stack_step (struct riscv_frame_info *frame, poly_int64 remaining_siz
> /* As an optimization, use the least-significant bits of the total frame
> size, so that the second adjustment step is just LUI + ADD. */
> if (!SMALL_OPERAND (min_second_step)
>- && remaining_const_size % IMM_REACH < IMM_REACH / 2
>+ && remaining_const_size % IMM_REACH <= max_first_step
> && remaining_const_size % IMM_REACH >= min_first_step)
> return remaining_const_size % IMM_REACH;
>
>@@ -5129,14 +5132,14 @@ riscv_adjust_libcall_cfi_epilogue ()
> void
> riscv_expand_epilogue (int style)
> {
>- /* Split the frame into two. STEP1 is the amount of stack we should
>- deallocate before restoring the registers. STEP2 is the amount we
>- should deallocate afterwards.
>+ /* Split the frame into 3 steps. STEP1 is the amount of stack we should
>+ deallocate before restoring the registers. STEP2 is the amount we
>+ should deallocate afterwards including the callee saved regs. STEP3
>+ is the amount deallocated by save-restore libcall.
>
> Start off by assuming that no registers need to be restored. */
> struct riscv_frame_info *frame = &cfun->machine->frame;
> unsigned mask = frame->mask;
>- poly_int64 step1 = frame->total_size;
> HOST_WIDE_INT step2 = 0;
> bool use_restore_libcall = ((style == NORMAL_RETURN)
> && riscv_use_save_libcall (frame));
>@@ -5223,7 +5226,7 @@ riscv_expand_epilogue (int style)
> if (use_restore_libcall)
> frame->mask = mask; /* Undo the above fib. */
>
>- step1 -= step2 + libcall_size;
>+ poly_int64 step1 = frame->total_size - step2 - libcall_size;
>
> /* Set TARGET to BASE + STEP1. */
> if (known_gt (step1, 0))
>--
>2.17.1
next prev parent reply other threads:[~2023-02-03 8:52 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-01 10:03 [PATCH 0/3] RISC-V: optimize stack manipulation in save-restore Fei Gao
2022-12-01 10:03 ` [PATCH 1/3] RISC-V: add a new parameter in riscv_first_stack_step Fei Gao
2023-02-03 8:52 ` [PING][PATCH " Fei Gao
2023-04-16 16:40 ` [PATCH " Jeff Law
2023-04-17 18:09 ` Jeff Law
2022-12-01 10:03 ` [PATCH 2/3] RISC-V: optimize stack manipulation in save-restore Fei Gao
2023-02-03 8:52 ` [PING] " Fei Gao
2023-04-16 16:45 ` Jeff Law
2023-04-17 22:51 ` Jeff Law
2022-12-01 10:03 ` [PATCH 3/3] RISC-V: make the stack manipulation codes more readable Fei Gao
2023-02-03 8:52 ` Fei Gao [this message]
2023-04-18 0:14 ` Jeff Law
2023-02-03 8:52 ` [PING] [PATCH 0/3] RISC-V: optimize stack manipulation in save-restore Fei Gao
2023-02-09 2:21 ` [PING 2] " Fei Gao
2023-02-16 7:17 ` Fei Gao
2023-02-16 14:39 ` Jeff Law
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