* [PATCH 01/10] arm: [MVE intrinsics] add unary shape
@ 2023-05-05 16:48 Christophe Lyon
2023-05-05 16:48 ` [PATCH 02/10] arm: [MVE intrinsics] factorize several unary operations Christophe Lyon
` (9 more replies)
0 siblings, 10 replies; 11+ messages in thread
From: Christophe Lyon @ 2023-05-05 16:48 UTC (permalink / raw)
To: gcc-patches, kyrylo.tkachov, richard.earnshaw, richard.sandiford
Cc: Christophe Lyon
This patch adds the unary shape description.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/arm-mve-builtins-shapes.cc (unary): New.
* config/arm/arm-mve-builtins-shapes.h (unary): New.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 27 +++++++++++++++++++++++
gcc/config/arm/arm-mve-builtins-shapes.h | 1 +
2 files changed, 28 insertions(+)
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc b/gcc/config/arm/arm-mve-builtins-shapes.cc
index 7078f7d7220..7d39cf79aec 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.cc
+++ b/gcc/config/arm/arm-mve-builtins-shapes.cc
@@ -786,6 +786,33 @@ struct inherent_def : public nonoverloaded_base
};
SHAPE (inherent)
+/* <T0>_t vfoo[_t0](<T0>_t)
+
+ i.e. the standard shape for unary operations that operate on
+ uniform types.
+
+ Example: vabsq.
+ int8x16_t [__arm_]vabsq[_s8](int8x16_t a)
+ int8x16_t [__arm_]vabsq_m[_s8](int8x16_t inactive, int8x16_t a, mve_pred16_t p)
+ int8x16_t [__arm_]vabsq_x[_s8](int8x16_t a, mve_pred16_t p) */
+struct unary_def : public overloaded_base<0>
+{
+ void
+ build (function_builder &b, const function_group_info &group,
+ bool preserve_user_namespace) const override
+ {
+ b.add_overloaded_functions (group, MODE_none, preserve_user_namespace);
+ build_all (b, "v0,v0", group, MODE_none, preserve_user_namespace);
+ }
+
+ tree
+ resolve (function_resolver &r) const override
+ {
+ return r.resolve_unary ();
+ }
+};
+SHAPE (unary)
+
/* <T0>_t foo_t0[_t1](<T1>_t)
where the target type <t0> must be specified explicitly but the source
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.h b/gcc/config/arm/arm-mve-builtins-shapes.h
index 09e00b69e63..bd7e11b89f6 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.h
+++ b/gcc/config/arm/arm-mve-builtins-shapes.h
@@ -45,6 +45,7 @@ namespace arm_mve
extern const function_shape *const binary_rshift_narrow_unsigned;
extern const function_shape *const create;
extern const function_shape *const inherent;
+ extern const function_shape *const unary;
extern const function_shape *const unary_convert;
} /* end namespace arm_mve::shapes */
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 02/10] arm: [MVE intrinsics] factorize several unary operations
2023-05-05 16:48 [PATCH 01/10] arm: [MVE intrinsics] add unary shape Christophe Lyon
@ 2023-05-05 16:48 ` Christophe Lyon
2023-05-05 16:48 ` [PATCH 03/10] arm: [MVE intrinsics] rework vabsq vnegq vclsq vclzq, vqabsq, vqnegq Christophe Lyon
` (8 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Christophe Lyon @ 2023-05-05 16:48 UTC (permalink / raw)
To: gcc-patches, kyrylo.tkachov, richard.earnshaw, richard.sandiford
Cc: Christophe Lyon
Factorize vabs vcls vclz vneg vqabs vqneg vrnda vrndm vrndn vrndp vrnd
vrndx so that they use the same pattern.
This patch introduces the mve_mnemo iterator because some of the
involved intrinsics have a different name from their mnenonic: for
instance vrndq vs vrintz.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
(MVE_FP_UNARY, MVE_FP_M_UNARY): New.
(mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
vrndm, vrndn, vrndp, vrnd, vrndx.
(isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
VQABSQ_M_S, VQNEGQ_M_S.
(mve_mnemo): New.
* config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
(mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
(mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
(@mve_<mve_insn>q_f<mode>): ... this.
(mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
(mve_v<absneg_str>q_f<mode>): ... this.
(mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
(mve_v<absneg_str>q_s<mode>): ... this.
(mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
(@mve_<mve_insn>q_<supf><mode>): ... this.
(mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
(mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
(mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
(@mve_<mve_insn>q_m_<supf><mode>): ... this.
(mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
(mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
(mve_vrndxq_m_f<mode>): Merge into ...
(@mve_<mve_insn>q_m_f<mode>): ... this.
---
gcc/config/arm/iterators.md | 80 ++++++++
gcc/config/arm/mve.md | 383 +++++-------------------------------
2 files changed, 126 insertions(+), 337 deletions(-)
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index 53873704174..0b4f69ee874 100644
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -333,6 +333,42 @@ (define_code_iterator SSPLUSMINUS [ss_plus ss_minus])
;; Max/Min iterator, to factorize MVE patterns
(define_code_iterator MAX_MIN_SU [smax umax smin umin])
+;; MVE integer unary operations.
+(define_int_iterator MVE_INT_M_UNARY [
+ VABSQ_M_S
+ VCLSQ_M_S
+ VCLZQ_M_S VCLZQ_M_U
+ VNEGQ_M_S
+ VQABSQ_M_S
+ VQNEGQ_M_S
+ ])
+
+(define_int_iterator MVE_INT_UNARY [
+ VCLSQ_S
+ VQABSQ_S
+ VQNEGQ_S
+ ])
+
+(define_int_iterator MVE_FP_UNARY [
+ VRNDQ_F
+ VRNDAQ_F
+ VRNDMQ_F
+ VRNDNQ_F
+ VRNDPQ_F
+ VRNDXQ_F
+ ])
+
+(define_int_iterator MVE_FP_M_UNARY [
+ VABSQ_M_F
+ VNEGQ_M_F
+ VRNDAQ_M_F
+ VRNDMQ_M_F
+ VRNDNQ_M_F
+ VRNDPQ_M_F
+ VRNDQ_M_F
+ VRNDXQ_M_F
+ ])
+
;; MVE integer binary operations.
(define_code_iterator MVE_INT_BINARY_RTX [plus minus mult])
@@ -551,6 +587,8 @@ (define_code_attr mve_addsubmul [
(define_int_attr mve_insn [
(VABDQ_M_S "vabd") (VABDQ_M_U "vabd") (VABDQ_M_F "vabd")
(VABDQ_S "vabd") (VABDQ_U "vabd") (VABDQ_F "vabd")
+ (VABSQ_M_F "vabs")
+ (VABSQ_M_S "vabs")
(VADDQ_M_N_S "vadd") (VADDQ_M_N_U "vadd") (VADDQ_M_N_F "vadd")
(VADDQ_M_S "vadd") (VADDQ_M_U "vadd") (VADDQ_M_F "vadd")
(VADDQ_N_S "vadd") (VADDQ_N_U "vadd") (VADDQ_N_F "vadd")
@@ -558,6 +596,9 @@ (define_int_attr mve_insn [
(VBICQ_M_N_S "vbic") (VBICQ_M_N_U "vbic")
(VBICQ_M_S "vbic") (VBICQ_M_U "vbic") (VBICQ_M_F "vbic")
(VBICQ_N_S "vbic") (VBICQ_N_U "vbic")
+ (VCLSQ_M_S "vcls")
+ (VCLSQ_S "vcls")
+ (VCLZQ_M_S "vclz") (VCLZQ_M_U "vclz")
(VCREATEQ_S "vcreate") (VCREATEQ_U "vcreate") (VCREATEQ_F "vcreate")
(VEORQ_M_S "veor") (VEORQ_M_U "veor") (VEORQ_M_F "veor")
(VHADDQ_M_N_S "vhadd") (VHADDQ_M_N_U "vhadd")
@@ -577,9 +618,13 @@ (define_int_attr mve_insn [
(VMULQ_M_N_S "vmul") (VMULQ_M_N_U "vmul") (VMULQ_M_N_F "vmul")
(VMULQ_M_S "vmul") (VMULQ_M_U "vmul") (VMULQ_M_F "vmul")
(VMULQ_N_S "vmul") (VMULQ_N_U "vmul") (VMULQ_N_F "vmul")
+ (VNEGQ_M_F "vneg")
+ (VNEGQ_M_S "vneg")
(VORRQ_M_N_S "vorr") (VORRQ_M_N_U "vorr")
(VORRQ_M_S "vorr") (VORRQ_M_U "vorr") (VORRQ_M_F "vorr")
(VORRQ_N_S "vorr") (VORRQ_N_U "vorr")
+ (VQABSQ_M_S "vqabs")
+ (VQABSQ_S "vqabs")
(VQADDQ_M_N_S "vqadd") (VQADDQ_M_N_U "vqadd")
(VQADDQ_M_S "vqadd") (VQADDQ_M_U "vqadd")
(VQADDQ_N_S "vqadd") (VQADDQ_N_U "vqadd")
@@ -594,6 +639,8 @@ (define_int_attr mve_insn [
(VQDMULHQ_M_S "vqdmulh")
(VQDMULHQ_N_S "vqdmulh")
(VQDMULHQ_S "vqdmulh")
+ (VQNEGQ_M_S "vqneg")
+ (VQNEGQ_S "vqneg")
(VQRDMLADHQ_M_S "vqrdmladh")
(VQRDMLADHXQ_M_S "vqrdmladhx")
(VQRDMLAHQ_M_N_S "vqrdmlah")
@@ -638,6 +685,12 @@ (define_int_attr mve_insn [
(VRHADDQ_S "vrhadd") (VRHADDQ_U "vrhadd")
(VRMULHQ_M_S "vrmulh") (VRMULHQ_M_U "vrmulh")
(VRMULHQ_S "vrmulh") (VRMULHQ_U "vrmulh")
+ (VRNDAQ_F "vrnda") (VRNDAQ_M_F "vrnda")
+ (VRNDMQ_F "vrndm") (VRNDMQ_M_F "vrndm")
+ (VRNDNQ_F "vrndn") (VRNDNQ_M_F "vrndn")
+ (VRNDPQ_F "vrndp") (VRNDPQ_M_F "vrndp")
+ (VRNDQ_F "vrnd") (VRNDQ_M_F "vrnd")
+ (VRNDXQ_F "vrndx") (VRNDXQ_M_F "vrndx")
(VRSHLQ_M_N_S "vrshl") (VRSHLQ_M_N_U "vrshl")
(VRSHLQ_M_S "vrshl") (VRSHLQ_M_U "vrshl")
(VRSHLQ_N_S "vrshl") (VRSHLQ_N_U "vrshl")
@@ -666,6 +719,13 @@ (define_int_attr mve_insn [
])
(define_int_attr isu [
+ (VABSQ_M_S "s")
+ (VCLSQ_M_S "s")
+ (VCLZQ_M_S "i")
+ (VCLZQ_M_U "i")
+ (VNEGQ_M_S "s")
+ (VQABSQ_M_S "s")
+ (VQNEGQ_M_S "s")
(VQRSHRNBQ_M_N_S "s") (VQRSHRNBQ_M_N_U "u")
(VQRSHRNBQ_N_S "s") (VQRSHRNBQ_N_U "u")
(VQRSHRNTQ_M_N_S "s") (VQRSHRNTQ_M_N_U "u")
@@ -692,6 +752,17 @@ (define_int_attr isu [
(VSHRNTQ_N_S "i") (VSHRNTQ_N_U "i")
])
+(define_int_attr mve_mnemo [
+ (VABSQ_M_S "vabs") (VABSQ_M_F "vabs")
+ (VNEGQ_M_S "vneg") (VNEGQ_M_F "vneg")
+ (VRNDAQ_F "vrinta") (VRNDAQ_M_F "vrinta")
+ (VRNDMQ_F "vrintm") (VRNDMQ_M_F "vrintm")
+ (VRNDNQ_F "vrintn") (VRNDNQ_M_F "vrintn")
+ (VRNDPQ_F "vrintp") (VRNDPQ_M_F "vrintp")
+ (VRNDQ_F "vrintz") (VRNDQ_M_F "vrintz")
+ (VRNDXQ_F "vrintx") (VRNDXQ_M_F "vrintx")
+ ])
+
;; plus and minus are the only SHIFTABLE_OPS for which Thumb2 allows
;; a stack pointer operand. The minus operation is a candidate for an rsub
;; and hence only plus is supported.
@@ -1862,6 +1933,15 @@ (define_int_attr supf [(VCVTQ_TO_F_S "s") (VCVTQ_TO_F_U "u") (VREV16Q_S "s")
(VQSHRUNBQ_N_S "s")
(VQSHRUNTQ_M_N_S "s")
(VQSHRUNTQ_N_S "s")
+ (VABSQ_M_S "s")
+ (VCLSQ_M_S "s")
+ (VCLZQ_M_S "s") (VCLZQ_M_U "u")
+ (VNEGQ_M_S "s")
+ (VQABSQ_M_S "s")
+ (VQNEGQ_M_S "s")
+ (VCLSQ_S "s")
+ (VQABSQ_S "s")
+ (VQNEGQ_S "s")
])
;; Both kinds of return insn.
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index b5c89fd4105..7bf344d547a 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -130,102 +130,21 @@ (define_insn "mve_vst4q<mode>"
[(set_attr "length" "16")])
;;
-;; [vrndq_m_f])
+;; [vrndaq_f]
+;; [vrndmq_f]
+;; [vrndnq_f]
+;; [vrndpq_f]
+;; [vrndq_f]
+;; [vrndxq_f]
;;
-(define_insn "mve_vrndq_m_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
- (match_operand:MVE_0 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VRNDQ_M_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vpst\;vrintzt.f%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
-;;
-;; [vrndxq_f])
-;;
-(define_insn "mve_vrndxq_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
- VRNDXQ_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vrintx.f%#<V_sz_elem> %q0, %q1"
- [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vrndq_f])
-;;
-(define_insn "mve_vrndq_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
- VRNDQ_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vrintz.f%#<V_sz_elem> %q0, %q1"
- [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vrndpq_f])
-;;
-(define_insn "mve_vrndpq_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
- VRNDPQ_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vrintp.f%#<V_sz_elem> %q0, %q1"
- [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vrndnq_f])
-;;
-(define_insn "mve_vrndnq_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
- VRNDNQ_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vrintn.f%#<V_sz_elem> %q0, %q1"
- [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vrndmq_f])
-;;
-(define_insn "mve_vrndmq_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
- VRNDMQ_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vrintm.f%#<V_sz_elem> %q0, %q1"
- [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vrndaq_f])
-;;
-(define_insn "mve_vrndaq_f<mode>"
+(define_insn "@mve_<mve_insn>q_f<mode>"
[
(set (match_operand:MVE_0 0 "s_register_operand" "=w")
(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "w")]
- VRNDAQ_F))
+ MVE_FP_UNARY))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vrinta.f%#<V_sz_elem> %q0, %q1"
+ "<mve_mnemo>.f%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@@ -244,15 +163,16 @@ (define_insn "mve_vrev64q_f<mode>"
])
;;
-;; [vnegq_f])
+;; [vabsq_f]
+;; [vnegq_f]
;;
-(define_insn "mve_vnegq_f<mode>"
+(define_insn "mve_v<absneg_str>q_f<mode>"
[
(set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (neg:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
+ (ABSNEG:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vneg.f%#<V_sz_elem>\t%q0, %q1"
+ "v<absneg_str>.f%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@@ -270,19 +190,6 @@ (define_insn "mve_vdupq_n_f<mode>"
[(set_attr "type" "mve_move")
])
-;;
-;; [vabsq_f])
-;;
-(define_insn "mve_vabsq_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (abs:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vabs.f%#<V_sz_elem>\t%q0, %q1"
- [(set_attr "type" "mve_move")
-])
-
;;
;; [vrev32q_f])
;;
@@ -365,43 +272,18 @@ (define_insn "mve_vcvtq_from_f_<supf><mode>"
"vcvt.<supf>%#<V_sz_elem>.f%#<V_sz_elem> %q0, %q1"
[(set_attr "type" "mve_move")
])
-;; [vqnegq_s])
-;;
-(define_insn "mve_vqnegq_s<mode>"
- [
- (set (match_operand:MVE_2 0 "s_register_operand" "=w")
- (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")]
- VQNEGQ_S))
- ]
- "TARGET_HAVE_MVE"
- "vqneg.s%#<V_sz_elem>\t%q0, %q1"
- [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vqabsq_s])
-;;
-(define_insn "mve_vqabsq_s<mode>"
- [
- (set (match_operand:MVE_2 0 "s_register_operand" "=w")
- (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")]
- VQABSQ_S))
- ]
- "TARGET_HAVE_MVE"
- "vqabs.s%#<V_sz_elem>\t%q0, %q1"
- [(set_attr "type" "mve_move")
-])
;;
-;; [vnegq_s])
+;; [vabsq_s]
+;; [vnegq_s]
;;
-(define_insn "mve_vnegq_s<mode>"
+(define_insn "mve_v<absneg_str>q_s<mode>"
[
(set (match_operand:MVE_2 0 "s_register_operand" "=w")
- (neg:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
+ (ABSNEG:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE"
- "vneg.s%#<V_sz_elem>\t%q0, %q1"
+ "v<absneg_str>.s%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@@ -460,16 +342,18 @@ (define_expand "mve_vclzq_u<mode>"
)
;;
-;; [vclsq_s])
+;; [vclsq_s]
+;; [vqabsq_s]
+;; [vqnegq_s]
;;
-(define_insn "mve_vclsq_s<mode>"
+(define_insn "@mve_<mve_insn>q_<supf><mode>"
[
(set (match_operand:MVE_2 0 "s_register_operand" "=w")
(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "w")]
- VCLSQ_S))
+ MVE_INT_UNARY))
]
"TARGET_HAVE_MVE"
- "vcls.s%#<V_sz_elem>\t%q0, %q1"
+ "<mve_insn>.<supf>%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@@ -487,19 +371,6 @@ (define_insn "@mve_vaddvq_<supf><mode>"
[(set_attr "type" "mve_move")
])
-;;
-;; [vabsq_s])
-;;
-(define_insn "mve_vabsq_s<mode>"
- [
- (set (match_operand:MVE_2 0 "s_register_operand" "=w")
- (abs:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
- ]
- "TARGET_HAVE_MVE"
- "vabs.s%#<V_sz_elem>\t%q0, %q1"
- [(set_attr "type" "mve_move")
-])
-
;;
;; [vrev32q_u, vrev32q_s])
;;
@@ -2254,18 +2125,23 @@ (define_insn "mve_vshlcq_<supf><mode>"
"vshlc %q0, %1, %4")
;;
-;; [vabsq_m_s])
+;; [vabsq_m_s]
+;; [vclsq_m_s]
+;; [vclzq_m_s, vclzq_m_u]
+;; [vnegq_m_s]
+;; [vqabsq_m_s]
+;; [vqnegq_m_s]
;;
-(define_insn "mve_vabsq_m_s<mode>"
+(define_insn "@mve_<mve_insn>q_m_<supf><mode>"
[
(set (match_operand:MVE_2 0 "s_register_operand" "=w")
(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
(match_operand:MVE_2 2 "s_register_operand" "w")
(match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VABSQ_M_S))
+ MVE_INT_M_UNARY))
]
"TARGET_HAVE_MVE"
- "vpst\;vabst.s%#<V_sz_elem> %q0, %q2"
+ "vpst\;<mve_insn>t.<isu>%#<V_sz_elem>\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@@ -2285,38 +2161,6 @@ (define_insn "mve_vaddvaq_p_<supf><mode>"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
-;;
-;; [vclsq_m_s])
-;;
-(define_insn "mve_vclsq_m_s<mode>"
- [
- (set (match_operand:MVE_2 0 "s_register_operand" "=w")
- (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
- (match_operand:MVE_2 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VCLSQ_M_S))
- ]
- "TARGET_HAVE_MVE"
- "vpst\;vclst.s%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
-;;
-;; [vclzq_m_s, vclzq_m_u])
-;;
-(define_insn "mve_vclzq_m_<supf><mode>"
- [
- (set (match_operand:MVE_2 0 "s_register_operand" "=w")
- (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
- (match_operand:MVE_2 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VCLZQ_M))
- ]
- "TARGET_HAVE_MVE"
- "vpst\;vclzt.i%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
;;
;; [vcmpcsq_m_n_u])
;;
@@ -2813,22 +2657,6 @@ (define_insn "mve_vmvnq_m_<supf><mode>"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
-;;
-;; [vnegq_m_s])
-;;
-(define_insn "mve_vnegq_m_s<mode>"
- [
- (set (match_operand:MVE_2 0 "s_register_operand" "=w")
- (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
- (match_operand:MVE_2 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VNEGQ_M_S))
- ]
- "TARGET_HAVE_MVE"
- "vpst\;vnegt.s%#<V_sz_elem>\t%q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
;;
;; [vpselq_u, vpselq_s])
;;
@@ -2845,22 +2673,6 @@ (define_insn "@mve_vpselq_<supf><mode>"
[(set_attr "type" "mve_move")
])
-;;
-;; [vqabsq_m_s])
-;;
-(define_insn "mve_vqabsq_m_s<mode>"
- [
- (set (match_operand:MVE_2 0 "s_register_operand" "=w")
- (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
- (match_operand:MVE_2 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VQABSQ_M_S))
- ]
- "TARGET_HAVE_MVE"
- "vpst\;vqabst.s%#<V_sz_elem>\t%q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
;;
;; [vqdmlahq_n_s])
;;
@@ -2893,22 +2705,6 @@ (define_insn "mve_vqdmlashq_n_<supf><mode>"
[(set_attr "type" "mve_move")
])
-;;
-;; [vqnegq_m_s])
-;;
-(define_insn "mve_vqnegq_m_s<mode>"
- [
- (set (match_operand:MVE_2 0 "s_register_operand" "=w")
- (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
- (match_operand:MVE_2 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VQNEGQ_M_S))
- ]
- "TARGET_HAVE_MVE"
- "vpst\;vqnegt.s%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
;;
;; [vqrdmladhq_s])
;;
@@ -3198,19 +2994,27 @@ (define_insn "mve_vmladavaxq_s<mode>"
"vmladavax.s%#<V_sz_elem>\t%0, %q2, %q3"
[(set_attr "type" "mve_move")
])
+
;;
-;; [vabsq_m_f])
+;; [vabsq_m_f]
+;; [vnegq_m_f]
+;; [vrndaq_m_f]
+;; [vrndmq_m_f]
+;; [vrndnq_m_f]
+;; [vrndpq_m_f]
+;; [vrndq_m_f]
+;; [vrndxq_m_f]
;;
-(define_insn "mve_vabsq_m_f<mode>"
+(define_insn "@mve_<mve_insn>q_m_f<mode>"
[
(set (match_operand:MVE_0 0 "s_register_operand" "=w")
(unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
(match_operand:MVE_0 2 "s_register_operand" "w")
(match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VABSQ_M_F))
+ MVE_FP_M_UNARY))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vpst\;vabst.f%#<V_sz_elem> %q0, %q2"
+ "vpst\;<mve_mnemo>t.f%#<V_sz_elem>\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@@ -3863,21 +3667,6 @@ (define_insn "mve_vmvnq_m_n_<supf><mode>"
"vpst\;vmvnt.i%#<V_sz_elem> %q0, %2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
-;;
-;; [vnegq_m_f])
-;;
-(define_insn "mve_vnegq_m_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
- (match_operand:MVE_0 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VNEGQ_M_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vpst\;vnegt.f%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
;;
;; [vbicq_m_n_s, vbicq_m_n_u]
@@ -4104,86 +3893,6 @@ (define_insn "mve_vrmlsldavhxq_p_sv4si"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
-;;
-;; [vrndaq_m_f])
-;;
-(define_insn "mve_vrndaq_m_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
- (match_operand:MVE_0 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VRNDAQ_M_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vpst\;vrintat.f%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
-;;
-;; [vrndmq_m_f])
-;;
-(define_insn "mve_vrndmq_m_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
- (match_operand:MVE_0 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VRNDMQ_M_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vpst\;vrintmt.f%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
-;;
-;; [vrndnq_m_f])
-;;
-(define_insn "mve_vrndnq_m_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
- (match_operand:MVE_0 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VRNDNQ_M_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vpst\;vrintnt.f%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
-;;
-;; [vrndpq_m_f])
-;;
-(define_insn "mve_vrndpq_m_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
- (match_operand:MVE_0 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VRNDPQ_M_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vpst\;vrintpt.f%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
-;;
-;; [vrndxq_m_f])
-;;
-(define_insn "mve_vrndxq_m_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
- (match_operand:MVE_0 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VRNDXQ_M_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vpst\;vrintxt.f%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
;;
;; [vcvtmq_m_s, vcvtmq_m_u])
;;
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 03/10] arm: [MVE intrinsics] rework vabsq vnegq vclsq vclzq, vqabsq, vqnegq
2023-05-05 16:48 [PATCH 01/10] arm: [MVE intrinsics] add unary shape Christophe Lyon
2023-05-05 16:48 ` [PATCH 02/10] arm: [MVE intrinsics] factorize several unary operations Christophe Lyon
@ 2023-05-05 16:48 ` Christophe Lyon
2023-05-05 16:49 ` [PATCH 04/10] arm: [MVE intrinsics] rework vrndq vrndaq vrndmq vrndnq vrndpq vrndxq Christophe Lyon
` (7 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Christophe Lyon @ 2023-05-05 16:48 UTC (permalink / raw)
To: gcc-patches, kyrylo.tkachov, richard.earnshaw, richard.sandiford
Cc: Christophe Lyon
Implement vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq using the new MVE
builtins framework.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
(vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
* config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
(vclzq, vqabsq, vqnegq): New.
* config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
(vqabsq, vqnegq): New.
* config/arm/arm_mve.h (vabsq): Remove.
(vabsq_m): Remove.
(vabsq_x): Remove.
(vabsq_f16): Remove.
(vabsq_f32): Remove.
(vabsq_s8): Remove.
(vabsq_s16): Remove.
(vabsq_s32): Remove.
(vabsq_m_s8): Remove.
(vabsq_m_s16): Remove.
(vabsq_m_s32): Remove.
(vabsq_m_f16): Remove.
(vabsq_m_f32): Remove.
(vabsq_x_s8): Remove.
(vabsq_x_s16): Remove.
(vabsq_x_s32): Remove.
(vabsq_x_f16): Remove.
(vabsq_x_f32): Remove.
(__arm_vabsq_s8): Remove.
(__arm_vabsq_s16): Remove.
(__arm_vabsq_s32): Remove.
(__arm_vabsq_m_s8): Remove.
(__arm_vabsq_m_s16): Remove.
(__arm_vabsq_m_s32): Remove.
(__arm_vabsq_x_s8): Remove.
(__arm_vabsq_x_s16): Remove.
(__arm_vabsq_x_s32): Remove.
(__arm_vabsq_f16): Remove.
(__arm_vabsq_f32): Remove.
(__arm_vabsq_m_f16): Remove.
(__arm_vabsq_m_f32): Remove.
(__arm_vabsq_x_f16): Remove.
(__arm_vabsq_x_f32): Remove.
(__arm_vabsq): Remove.
(__arm_vabsq_m): Remove.
(__arm_vabsq_x): Remove.
(vnegq): Remove.
(vnegq_m): Remove.
(vnegq_x): Remove.
(vnegq_f16): Remove.
(vnegq_f32): Remove.
(vnegq_s8): Remove.
(vnegq_s16): Remove.
(vnegq_s32): Remove.
(vnegq_m_s8): Remove.
(vnegq_m_s16): Remove.
(vnegq_m_s32): Remove.
(vnegq_m_f16): Remove.
(vnegq_m_f32): Remove.
(vnegq_x_s8): Remove.
(vnegq_x_s16): Remove.
(vnegq_x_s32): Remove.
(vnegq_x_f16): Remove.
(vnegq_x_f32): Remove.
(__arm_vnegq_s8): Remove.
(__arm_vnegq_s16): Remove.
(__arm_vnegq_s32): Remove.
(__arm_vnegq_m_s8): Remove.
(__arm_vnegq_m_s16): Remove.
(__arm_vnegq_m_s32): Remove.
(__arm_vnegq_x_s8): Remove.
(__arm_vnegq_x_s16): Remove.
(__arm_vnegq_x_s32): Remove.
(__arm_vnegq_f16): Remove.
(__arm_vnegq_f32): Remove.
(__arm_vnegq_m_f16): Remove.
(__arm_vnegq_m_f32): Remove.
(__arm_vnegq_x_f16): Remove.
(__arm_vnegq_x_f32): Remove.
(__arm_vnegq): Remove.
(__arm_vnegq_m): Remove.
(__arm_vnegq_x): Remove.
(vclsq): Remove.
(vclsq_m): Remove.
(vclsq_x): Remove.
(vclsq_s8): Remove.
(vclsq_s16): Remove.
(vclsq_s32): Remove.
(vclsq_m_s8): Remove.
(vclsq_m_s16): Remove.
(vclsq_m_s32): Remove.
(vclsq_x_s8): Remove.
(vclsq_x_s16): Remove.
(vclsq_x_s32): Remove.
(__arm_vclsq_s8): Remove.
(__arm_vclsq_s16): Remove.
(__arm_vclsq_s32): Remove.
(__arm_vclsq_m_s8): Remove.
(__arm_vclsq_m_s16): Remove.
(__arm_vclsq_m_s32): Remove.
(__arm_vclsq_x_s8): Remove.
(__arm_vclsq_x_s16): Remove.
(__arm_vclsq_x_s32): Remove.
(__arm_vclsq): Remove.
(__arm_vclsq_m): Remove.
(__arm_vclsq_x): Remove.
(vclzq): Remove.
(vclzq_m): Remove.
(vclzq_x): Remove.
(vclzq_s8): Remove.
(vclzq_s16): Remove.
(vclzq_s32): Remove.
(vclzq_u8): Remove.
(vclzq_u16): Remove.
(vclzq_u32): Remove.
(vclzq_m_u8): Remove.
(vclzq_m_s8): Remove.
(vclzq_m_u16): Remove.
(vclzq_m_s16): Remove.
(vclzq_m_u32): Remove.
(vclzq_m_s32): Remove.
(vclzq_x_s8): Remove.
(vclzq_x_s16): Remove.
(vclzq_x_s32): Remove.
(vclzq_x_u8): Remove.
(vclzq_x_u16): Remove.
(vclzq_x_u32): Remove.
(__arm_vclzq_s8): Remove.
(__arm_vclzq_s16): Remove.
(__arm_vclzq_s32): Remove.
(__arm_vclzq_u8): Remove.
(__arm_vclzq_u16): Remove.
(__arm_vclzq_u32): Remove.
(__arm_vclzq_m_u8): Remove.
(__arm_vclzq_m_s8): Remove.
(__arm_vclzq_m_u16): Remove.
(__arm_vclzq_m_s16): Remove.
(__arm_vclzq_m_u32): Remove.
(__arm_vclzq_m_s32): Remove.
(__arm_vclzq_x_s8): Remove.
(__arm_vclzq_x_s16): Remove.
(__arm_vclzq_x_s32): Remove.
(__arm_vclzq_x_u8): Remove.
(__arm_vclzq_x_u16): Remove.
(__arm_vclzq_x_u32): Remove.
(__arm_vclzq): Remove.
(__arm_vclzq_m): Remove.
(__arm_vclzq_x): Remove.
(vqabsq): Remove.
(vqnegq): Remove.
(vqnegq_m): Remove.
(vqabsq_m): Remove.
(vqabsq_s8): Remove.
(vqabsq_s16): Remove.
(vqabsq_s32): Remove.
(vqnegq_s8): Remove.
(vqnegq_s16): Remove.
(vqnegq_s32): Remove.
(vqnegq_m_s8): Remove.
(vqabsq_m_s8): Remove.
(vqnegq_m_s16): Remove.
(vqabsq_m_s16): Remove.
(vqnegq_m_s32): Remove.
(vqabsq_m_s32): Remove.
(__arm_vqabsq_s8): Remove.
(__arm_vqabsq_s16): Remove.
(__arm_vqabsq_s32): Remove.
(__arm_vqnegq_s8): Remove.
(__arm_vqnegq_s16): Remove.
(__arm_vqnegq_s32): Remove.
(__arm_vqnegq_m_s8): Remove.
(__arm_vqabsq_m_s8): Remove.
(__arm_vqnegq_m_s16): Remove.
(__arm_vqabsq_m_s16): Remove.
(__arm_vqnegq_m_s32): Remove.
(__arm_vqabsq_m_s32): Remove.
(__arm_vqabsq): Remove.
(__arm_vqnegq): Remove.
(__arm_vqnegq_m): Remove.
(__arm_vqabsq_m): Remove.
---
gcc/config/arm/arm-mve-builtins-base.cc | 16 +
gcc/config/arm/arm-mve-builtins-base.def | 8 +
gcc/config/arm/arm-mve-builtins-base.h | 6 +
gcc/config/arm/arm_mve.h | 1272 +---------------------
4 files changed, 34 insertions(+), 1268 deletions(-)
diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc
index bb585a3921f..627553f1784 100644
--- a/gcc/config/arm/arm-mve-builtins-base.cc
+++ b/gcc/config/arm/arm-mve-builtins-base.cc
@@ -193,9 +193,22 @@ namespace arm_mve {
-1, -1, -1, \
UNSPEC##_M_N_S, -1, -1))
+ /* Helper for builtins with only unspec codes, _m predicated
+ overrides, but no _n version, no unsigned and no
+ floating-point. */
+#define FUNCTION_WITHOUT_N_NO_U_F(NAME, UNSPEC) FUNCTION \
+ (NAME, unspec_mve_function_exact_insn, \
+ (UNSPEC##_S, -1, -1, \
+ -1, -1, -1, \
+ UNSPEC##_M_S, -1, -1, \
+ -1, -1, -1))
+
FUNCTION_WITHOUT_N (vabdq, VABDQ)
+FUNCTION (vabsq, unspec_based_mve_function_exact_insn, (ABS, ABS, ABS, -1, -1, -1, VABSQ_M_S, -1, VABSQ_M_F, -1, -1, -1))
FUNCTION_WITH_RTX_M_N (vaddq, PLUS, VADDQ)
FUNCTION_WITH_RTX_M (vandq, AND, VANDQ)
+FUNCTION_WITHOUT_N_NO_U_F (vclsq, VCLSQ)
+FUNCTION (vclzq, unspec_based_mve_function_exact_insn, (CLZ, CLZ, CLZ, -1, -1, -1, VCLZQ_M_S, VCLZQ_M_U, -1, -1, -1 ,-1))
FUNCTION_WITHOUT_M_N (vcreateq, VCREATEQ)
FUNCTION_WITH_RTX_M (veorq, XOR, VEORQ)
FUNCTION_WITH_M_N_NO_F (vhaddq, VHADDQ)
@@ -204,9 +217,12 @@ FUNCTION_WITH_RTX_M_NO_F (vmaxq, SMAX, UMAX, VMAXQ)
FUNCTION_WITH_RTX_M_NO_F (vminq, SMIN, UMIN, VMINQ)
FUNCTION_WITHOUT_N_NO_F (vmulhq, VMULHQ)
FUNCTION_WITH_RTX_M_N (vmulq, MULT, VMULQ)
+FUNCTION (vnegq, unspec_based_mve_function_exact_insn, (NEG, NEG, NEG, -1, -1, -1, VNEGQ_M_S, -1, VNEGQ_M_F, -1, -1, -1))
FUNCTION_WITH_RTX_M_N_NO_N_F (vorrq, IOR, VORRQ)
+FUNCTION_WITHOUT_N_NO_U_F (vqabsq, VQABSQ)
FUNCTION_WITH_M_N_NO_F (vqaddq, VQADDQ)
FUNCTION_WITH_M_N_NO_U_F (vqdmulhq, VQDMULHQ)
+FUNCTION_WITHOUT_N_NO_U_F (vqnegq, VQNEGQ)
FUNCTION_WITH_M_N_NO_F (vqrshlq, VQRSHLQ)
FUNCTION_WITH_M_N_NO_U_F (vqrdmulhq, VQRDMULHQ)
FUNCTION_WITH_M_N_R (vqshlq, VQSHLQ)
diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def
index 33c95c02396..7a8f5ac78e4 100644
--- a/gcc/config/arm/arm-mve-builtins-base.def
+++ b/gcc/config/arm/arm-mve-builtins-base.def
@@ -19,8 +19,11 @@
#define REQUIRES_FLOAT false
DEF_MVE_FUNCTION (vabdq, binary, all_integer, mx_or_none)
+DEF_MVE_FUNCTION (vabsq, unary, all_signed, mx_or_none)
DEF_MVE_FUNCTION (vaddq, binary_opt_n, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vandq, binary, all_integer, mx_or_none)
+DEF_MVE_FUNCTION (vclsq, unary, all_signed, mx_or_none)
+DEF_MVE_FUNCTION (vclzq, unary, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vcreateq, create, all_integer_with_64, none)
DEF_MVE_FUNCTION (veorq, binary, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vhaddq, binary_opt_n, all_integer, mx_or_none)
@@ -29,9 +32,12 @@ DEF_MVE_FUNCTION (vmaxq, binary, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vminq, binary, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vmulhq, binary, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vmulq, binary_opt_n, all_integer, mx_or_none)
+DEF_MVE_FUNCTION (vnegq, unary, all_signed, mx_or_none)
DEF_MVE_FUNCTION (vorrq, binary_orrq, all_integer, mx_or_none)
+DEF_MVE_FUNCTION (vqabsq, unary, all_signed, m_or_none)
DEF_MVE_FUNCTION (vqaddq, binary_opt_n, all_integer, m_or_none)
DEF_MVE_FUNCTION (vqdmulhq, binary_opt_n, all_signed, m_or_none)
+DEF_MVE_FUNCTION (vqnegq, unary, all_signed, m_or_none)
DEF_MVE_FUNCTION (vqrdmulhq, binary_opt_n, all_signed, m_or_none)
DEF_MVE_FUNCTION (vqrshlq, binary_round_lshift, all_integer, m_or_none)
DEF_MVE_FUNCTION (vqrshrnbq, binary_rshift_narrow, integer_16_32, m_or_none)
@@ -63,11 +69,13 @@ DEF_MVE_FUNCTION (vuninitializedq, inherent, all_integer_with_64, none)
#define REQUIRES_FLOAT true
DEF_MVE_FUNCTION (vabdq, binary, all_float, mx_or_none)
+DEF_MVE_FUNCTION (vabsq, unary, all_float, mx_or_none)
DEF_MVE_FUNCTION (vaddq, binary_opt_n, all_float, mx_or_none)
DEF_MVE_FUNCTION (vandq, binary, all_float, mx_or_none)
DEF_MVE_FUNCTION (vcreateq, create, all_float, none)
DEF_MVE_FUNCTION (veorq, binary, all_float, mx_or_none)
DEF_MVE_FUNCTION (vmulq, binary_opt_n, all_float, mx_or_none)
+DEF_MVE_FUNCTION (vnegq, unary, all_float, mx_or_none)
DEF_MVE_FUNCTION (vorrq, binary_orrq, all_float, mx_or_none)
DEF_MVE_FUNCTION (vreinterpretq, unary_convert, reinterpret_float, none)
DEF_MVE_FUNCTION (vsubq, binary_opt_n, all_float, mx_or_none)
diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h
index 2a230f5f34d..8425a84b9ad 100644
--- a/gcc/config/arm/arm-mve-builtins-base.h
+++ b/gcc/config/arm/arm-mve-builtins-base.h
@@ -24,8 +24,11 @@ namespace arm_mve {
namespace functions {
extern const function_base *const vabdq;
+extern const function_base *const vabsq;
extern const function_base *const vaddq;
extern const function_base *const vandq;
+extern const function_base *const vclsq;
+extern const function_base *const vclzq;
extern const function_base *const vcreateq;
extern const function_base *const veorq;
extern const function_base *const vhaddq;
@@ -34,9 +37,12 @@ extern const function_base *const vmaxq;
extern const function_base *const vminq;
extern const function_base *const vmulhq;
extern const function_base *const vmulq;
+extern const function_base *const vnegq;
extern const function_base *const vorrq;
+extern const function_base *const vqabsq;
extern const function_base *const vqaddq;
extern const function_base *const vqdmulhq;
+extern const function_base *const vqnegq;
extern const function_base *const vqrdmulhq;
extern const function_base *const vqrshlq;
extern const function_base *const vqrshrnbq;
diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index 89de7e0e46b..8101515497b 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -43,10 +43,6 @@
#ifndef __ARM_MVE_PRESERVE_USER_NAMESPACE
#define vst4q(__addr, __value) __arm_vst4q(__addr, __value)
#define vdupq_n(__a) __arm_vdupq_n(__a)
-#define vabsq(__a) __arm_vabsq(__a)
-#define vclsq(__a) __arm_vclsq(__a)
-#define vclzq(__a) __arm_vclzq(__a)
-#define vnegq(__a) __arm_vnegq(__a)
#define vaddlvq(__a) __arm_vaddlvq(__a)
#define vaddvq(__a) __arm_vaddvq(__a)
#define vmovlbq(__a) __arm_vmovlbq(__a)
@@ -55,8 +51,6 @@
#define vrev16q(__a) __arm_vrev16q(__a)
#define vrev32q(__a) __arm_vrev32q(__a)
#define vrev64q(__a) __arm_vrev64q(__a)
-#define vqabsq(__a) __arm_vqabsq(__a)
-#define vqnegq(__a) __arm_vqnegq(__a)
#define vaddlvq_p(__a, __p) __arm_vaddlvq_p(__a, __p)
#define vcmpneq(__a, __b) __arm_vcmpneq(__a, __b)
#define vornq(__a, __b) __arm_vornq(__a, __b)
@@ -132,7 +126,6 @@
#define vcmpeqq_m(__a, __b, __p) __arm_vcmpeqq_m(__a, __b, __p)
#define vcmpcsq_m(__a, __b, __p) __arm_vcmpcsq_m(__a, __b, __p)
#define vcmpcsq_m_n(__a, __b, __p) __arm_vcmpcsq_m_n(__a, __b, __p)
-#define vclzq_m(__inactive, __a, __p) __arm_vclzq_m(__inactive, __a, __p)
#define vaddvaq_p(__a, __b, __p) __arm_vaddvaq_p(__a, __b, __p)
#define vsriq(__a, __b, __imm) __arm_vsriq(__a, __b, __imm)
#define vsliq(__a, __b, __imm) __arm_vsliq(__a, __b, __imm)
@@ -144,14 +137,9 @@
#define vcmpleq_m(__a, __b, __p) __arm_vcmpleq_m(__a, __b, __p)
#define vcmpgtq_m(__a, __b, __p) __arm_vcmpgtq_m(__a, __b, __p)
#define vcmpgeq_m(__a, __b, __p) __arm_vcmpgeq_m(__a, __b, __p)
-#define vqnegq_m(__inactive, __a, __p) __arm_vqnegq_m(__inactive, __a, __p)
-#define vqabsq_m(__inactive, __a, __p) __arm_vqabsq_m(__inactive, __a, __p)
-#define vnegq_m(__inactive, __a, __p) __arm_vnegq_m(__inactive, __a, __p)
#define vmlsdavxq_p(__a, __b, __p) __arm_vmlsdavxq_p(__a, __b, __p)
#define vmlsdavq_p(__a, __b, __p) __arm_vmlsdavq_p(__a, __b, __p)
#define vmladavxq_p(__a, __b, __p) __arm_vmladavxq_p(__a, __b, __p)
-#define vclsq_m(__inactive, __a, __p) __arm_vclsq_m(__inactive, __a, __p)
-#define vabsq_m(__inactive, __a, __p) __arm_vabsq_m(__inactive, __a, __p)
#define vqrdmlsdhxq(__inactive, __a, __b) __arm_vqrdmlsdhxq(__inactive, __a, __b)
#define vqrdmlsdhq(__inactive, __a, __b) __arm_vqrdmlsdhq(__inactive, __a, __b)
#define vqrdmladhxq(__inactive, __a, __b) __arm_vqrdmladhxq(__inactive, __a, __b)
@@ -307,10 +295,6 @@
#define viwdupq_x_u8(__a, __b, __imm, __p) __arm_viwdupq_x_u8(__a, __b, __imm, __p)
#define viwdupq_x_u16(__a, __b, __imm, __p) __arm_viwdupq_x_u16(__a, __b, __imm, __p)
#define viwdupq_x_u32(__a, __b, __imm, __p) __arm_viwdupq_x_u32(__a, __b, __imm, __p)
-#define vabsq_x(__a, __p) __arm_vabsq_x(__a, __p)
-#define vclsq_x(__a, __p) __arm_vclsq_x(__a, __p)
-#define vclzq_x(__a, __p) __arm_vclzq_x(__a, __p)
-#define vnegq_x(__a, __p) __arm_vnegq_x(__a, __p)
#define vmullbq_poly_x(__a, __b, __p) __arm_vmullbq_poly_x(__a, __b, __p)
#define vmullbq_int_x(__a, __b, __p) __arm_vmullbq_int_x(__a, __b, __p)
#define vmulltq_poly_x(__a, __b, __p) __arm_vmulltq_poly_x(__a, __b, __p)
@@ -446,12 +430,8 @@
#define vrndaq_f32(__a) __arm_vrndaq_f32(__a)
#define vrev64q_f16(__a) __arm_vrev64q_f16(__a)
#define vrev64q_f32(__a) __arm_vrev64q_f32(__a)
-#define vnegq_f16(__a) __arm_vnegq_f16(__a)
-#define vnegq_f32(__a) __arm_vnegq_f32(__a)
#define vdupq_n_f16(__a) __arm_vdupq_n_f16(__a)
#define vdupq_n_f32(__a) __arm_vdupq_n_f32(__a)
-#define vabsq_f16(__a) __arm_vabsq_f16(__a)
-#define vabsq_f32(__a) __arm_vabsq_f32(__a)
#define vrev32q_f16(__a) __arm_vrev32q_f16(__a)
#define vcvttq_f32_f16(__a) __arm_vcvttq_f32_f16(__a)
#define vcvtbq_f32_f16(__a) __arm_vcvtbq_f32_f16(__a)
@@ -462,18 +442,6 @@
#define vdupq_n_s8(__a) __arm_vdupq_n_s8(__a)
#define vdupq_n_s16(__a) __arm_vdupq_n_s16(__a)
#define vdupq_n_s32(__a) __arm_vdupq_n_s32(__a)
-#define vabsq_s8(__a) __arm_vabsq_s8(__a)
-#define vabsq_s16(__a) __arm_vabsq_s16(__a)
-#define vabsq_s32(__a) __arm_vabsq_s32(__a)
-#define vclsq_s8(__a) __arm_vclsq_s8(__a)
-#define vclsq_s16(__a) __arm_vclsq_s16(__a)
-#define vclsq_s32(__a) __arm_vclsq_s32(__a)
-#define vclzq_s8(__a) __arm_vclzq_s8(__a)
-#define vclzq_s16(__a) __arm_vclzq_s16(__a)
-#define vclzq_s32(__a) __arm_vclzq_s32(__a)
-#define vnegq_s8(__a) __arm_vnegq_s8(__a)
-#define vnegq_s16(__a) __arm_vnegq_s16(__a)
-#define vnegq_s32(__a) __arm_vnegq_s32(__a)
#define vaddlvq_s32(__a) __arm_vaddlvq_s32(__a)
#define vaddvq_s8(__a) __arm_vaddvq_s8(__a)
#define vaddvq_s16(__a) __arm_vaddvq_s16(__a)
@@ -493,12 +461,6 @@
#define vrev64q_s8(__a) __arm_vrev64q_s8(__a)
#define vrev64q_s16(__a) __arm_vrev64q_s16(__a)
#define vrev64q_s32(__a) __arm_vrev64q_s32(__a)
-#define vqabsq_s8(__a) __arm_vqabsq_s8(__a)
-#define vqabsq_s16(__a) __arm_vqabsq_s16(__a)
-#define vqabsq_s32(__a) __arm_vqabsq_s32(__a)
-#define vqnegq_s8(__a) __arm_vqnegq_s8(__a)
-#define vqnegq_s16(__a) __arm_vqnegq_s16(__a)
-#define vqnegq_s32(__a) __arm_vqnegq_s32(__a)
#define vcvtaq_s16_f16(__a) __arm_vcvtaq_s16_f16(__a)
#define vcvtaq_s32_f32(__a) __arm_vcvtaq_s32_f32(__a)
#define vcvtnq_s16_f16(__a) __arm_vcvtnq_s16_f16(__a)
@@ -518,9 +480,6 @@
#define vdupq_n_u8(__a) __arm_vdupq_n_u8(__a)
#define vdupq_n_u16(__a) __arm_vdupq_n_u16(__a)
#define vdupq_n_u32(__a) __arm_vdupq_n_u32(__a)
-#define vclzq_u8(__a) __arm_vclzq_u8(__a)
-#define vclzq_u16(__a) __arm_vclzq_u16(__a)
-#define vclzq_u32(__a) __arm_vclzq_u32(__a)
#define vaddvq_u8(__a) __arm_vaddvq_u8(__a)
#define vaddvq_u16(__a) __arm_vaddvq_u16(__a)
#define vaddvq_u32(__a) __arm_vaddvq_u32(__a)
@@ -893,7 +852,6 @@
#define vcmpeqq_m_n_u8(__a, __b, __p) __arm_vcmpeqq_m_n_u8(__a, __b, __p)
#define vcmpcsq_m_u8(__a, __b, __p) __arm_vcmpcsq_m_u8(__a, __b, __p)
#define vcmpcsq_m_n_u8(__a, __b, __p) __arm_vcmpcsq_m_n_u8(__a, __b, __p)
-#define vclzq_m_u8(__inactive, __a, __p) __arm_vclzq_m_u8(__inactive, __a, __p)
#define vaddvaq_p_u8(__a, __b, __p) __arm_vaddvaq_p_u8(__a, __b, __p)
#define vsriq_n_u8(__a, __b, __imm) __arm_vsriq_n_u8(__a, __b, __imm)
#define vsliq_n_u8(__a, __b, __imm) __arm_vsliq_n_u8(__a, __b, __imm)
@@ -914,9 +872,6 @@
#define vcmpeqq_m_s8(__a, __b, __p) __arm_vcmpeqq_m_s8(__a, __b, __p)
#define vcmpeqq_m_n_s8(__a, __b, __p) __arm_vcmpeqq_m_n_s8(__a, __b, __p)
#define vrev64q_m_s8(__inactive, __a, __p) __arm_vrev64q_m_s8(__inactive, __a, __p)
-#define vqnegq_m_s8(__inactive, __a, __p) __arm_vqnegq_m_s8(__inactive, __a, __p)
-#define vqabsq_m_s8(__inactive, __a, __p) __arm_vqabsq_m_s8(__inactive, __a, __p)
-#define vnegq_m_s8(__inactive, __a, __p) __arm_vnegq_m_s8(__inactive, __a, __p)
#define vmvnq_m_s8(__inactive, __a, __p) __arm_vmvnq_m_s8(__inactive, __a, __p)
#define vmlsdavxq_p_s8(__a, __b, __p) __arm_vmlsdavxq_p_s8(__a, __b, __p)
#define vmlsdavq_p_s8(__a, __b, __p) __arm_vmlsdavq_p_s8(__a, __b, __p)
@@ -925,10 +880,7 @@
#define vminvq_p_s8(__a, __b, __p) __arm_vminvq_p_s8(__a, __b, __p)
#define vmaxvq_p_s8(__a, __b, __p) __arm_vmaxvq_p_s8(__a, __b, __p)
#define vdupq_m_n_s8(__inactive, __a, __p) __arm_vdupq_m_n_s8(__inactive, __a, __p)
-#define vclzq_m_s8(__inactive, __a, __p) __arm_vclzq_m_s8(__inactive, __a, __p)
-#define vclsq_m_s8(__inactive, __a, __p) __arm_vclsq_m_s8(__inactive, __a, __p)
#define vaddvaq_p_s8(__a, __b, __p) __arm_vaddvaq_p_s8(__a, __b, __p)
-#define vabsq_m_s8(__inactive, __a, __p) __arm_vabsq_m_s8(__inactive, __a, __p)
#define vqrdmlsdhxq_s8(__inactive, __a, __b) __arm_vqrdmlsdhxq_s8(__inactive, __a, __b)
#define vqrdmlsdhq_s8(__inactive, __a, __b) __arm_vqrdmlsdhq_s8(__inactive, __a, __b)
#define vqrdmlashq_n_s8(__a, __b, __c) __arm_vqrdmlashq_n_s8(__a, __b, __c)
@@ -968,7 +920,6 @@
#define vcmpeqq_m_n_u16(__a, __b, __p) __arm_vcmpeqq_m_n_u16(__a, __b, __p)
#define vcmpcsq_m_u16(__a, __b, __p) __arm_vcmpcsq_m_u16(__a, __b, __p)
#define vcmpcsq_m_n_u16(__a, __b, __p) __arm_vcmpcsq_m_n_u16(__a, __b, __p)
-#define vclzq_m_u16(__inactive, __a, __p) __arm_vclzq_m_u16(__inactive, __a, __p)
#define vaddvaq_p_u16(__a, __b, __p) __arm_vaddvaq_p_u16(__a, __b, __p)
#define vsriq_n_u16(__a, __b, __imm) __arm_vsriq_n_u16(__a, __b, __imm)
#define vsliq_n_u16(__a, __b, __imm) __arm_vsliq_n_u16(__a, __b, __imm)
@@ -989,9 +940,6 @@
#define vcmpeqq_m_s16(__a, __b, __p) __arm_vcmpeqq_m_s16(__a, __b, __p)
#define vcmpeqq_m_n_s16(__a, __b, __p) __arm_vcmpeqq_m_n_s16(__a, __b, __p)
#define vrev64q_m_s16(__inactive, __a, __p) __arm_vrev64q_m_s16(__inactive, __a, __p)
-#define vqnegq_m_s16(__inactive, __a, __p) __arm_vqnegq_m_s16(__inactive, __a, __p)
-#define vqabsq_m_s16(__inactive, __a, __p) __arm_vqabsq_m_s16(__inactive, __a, __p)
-#define vnegq_m_s16(__inactive, __a, __p) __arm_vnegq_m_s16(__inactive, __a, __p)
#define vmvnq_m_s16(__inactive, __a, __p) __arm_vmvnq_m_s16(__inactive, __a, __p)
#define vmlsdavxq_p_s16(__a, __b, __p) __arm_vmlsdavxq_p_s16(__a, __b, __p)
#define vmlsdavq_p_s16(__a, __b, __p) __arm_vmlsdavq_p_s16(__a, __b, __p)
@@ -1000,10 +948,7 @@
#define vminvq_p_s16(__a, __b, __p) __arm_vminvq_p_s16(__a, __b, __p)
#define vmaxvq_p_s16(__a, __b, __p) __arm_vmaxvq_p_s16(__a, __b, __p)
#define vdupq_m_n_s16(__inactive, __a, __p) __arm_vdupq_m_n_s16(__inactive, __a, __p)
-#define vclzq_m_s16(__inactive, __a, __p) __arm_vclzq_m_s16(__inactive, __a, __p)
-#define vclsq_m_s16(__inactive, __a, __p) __arm_vclsq_m_s16(__inactive, __a, __p)
#define vaddvaq_p_s16(__a, __b, __p) __arm_vaddvaq_p_s16(__a, __b, __p)
-#define vabsq_m_s16(__inactive, __a, __p) __arm_vabsq_m_s16(__inactive, __a, __p)
#define vqrdmlsdhxq_s16(__inactive, __a, __b) __arm_vqrdmlsdhxq_s16(__inactive, __a, __b)
#define vqrdmlsdhq_s16(__inactive, __a, __b) __arm_vqrdmlsdhq_s16(__inactive, __a, __b)
#define vqrdmlashq_n_s16(__a, __b, __c) __arm_vqrdmlashq_n_s16(__a, __b, __c)
@@ -1043,7 +988,6 @@
#define vcmpeqq_m_n_u32(__a, __b, __p) __arm_vcmpeqq_m_n_u32(__a, __b, __p)
#define vcmpcsq_m_u32(__a, __b, __p) __arm_vcmpcsq_m_u32(__a, __b, __p)
#define vcmpcsq_m_n_u32(__a, __b, __p) __arm_vcmpcsq_m_n_u32(__a, __b, __p)
-#define vclzq_m_u32(__inactive, __a, __p) __arm_vclzq_m_u32(__inactive, __a, __p)
#define vaddvaq_p_u32(__a, __b, __p) __arm_vaddvaq_p_u32(__a, __b, __p)
#define vsriq_n_u32(__a, __b, __imm) __arm_vsriq_n_u32(__a, __b, __imm)
#define vsliq_n_u32(__a, __b, __imm) __arm_vsliq_n_u32(__a, __b, __imm)
@@ -1064,9 +1008,6 @@
#define vcmpeqq_m_s32(__a, __b, __p) __arm_vcmpeqq_m_s32(__a, __b, __p)
#define vcmpeqq_m_n_s32(__a, __b, __p) __arm_vcmpeqq_m_n_s32(__a, __b, __p)
#define vrev64q_m_s32(__inactive, __a, __p) __arm_vrev64q_m_s32(__inactive, __a, __p)
-#define vqnegq_m_s32(__inactive, __a, __p) __arm_vqnegq_m_s32(__inactive, __a, __p)
-#define vqabsq_m_s32(__inactive, __a, __p) __arm_vqabsq_m_s32(__inactive, __a, __p)
-#define vnegq_m_s32(__inactive, __a, __p) __arm_vnegq_m_s32(__inactive, __a, __p)
#define vmvnq_m_s32(__inactive, __a, __p) __arm_vmvnq_m_s32(__inactive, __a, __p)
#define vmlsdavxq_p_s32(__a, __b, __p) __arm_vmlsdavxq_p_s32(__a, __b, __p)
#define vmlsdavq_p_s32(__a, __b, __p) __arm_vmlsdavq_p_s32(__a, __b, __p)
@@ -1075,10 +1016,7 @@
#define vminvq_p_s32(__a, __b, __p) __arm_vminvq_p_s32(__a, __b, __p)
#define vmaxvq_p_s32(__a, __b, __p) __arm_vmaxvq_p_s32(__a, __b, __p)
#define vdupq_m_n_s32(__inactive, __a, __p) __arm_vdupq_m_n_s32(__inactive, __a, __p)
-#define vclzq_m_s32(__inactive, __a, __p) __arm_vclzq_m_s32(__inactive, __a, __p)
-#define vclsq_m_s32(__inactive, __a, __p) __arm_vclsq_m_s32(__inactive, __a, __p)
#define vaddvaq_p_s32(__a, __b, __p) __arm_vaddvaq_p_s32(__a, __b, __p)
-#define vabsq_m_s32(__inactive, __a, __p) __arm_vabsq_m_s32(__inactive, __a, __p)
#define vqrdmlsdhxq_s32(__inactive, __a, __b) __arm_vqrdmlsdhxq_s32(__inactive, __a, __b)
#define vqrdmlsdhq_s32(__inactive, __a, __b) __arm_vqrdmlsdhq_s32(__inactive, __a, __b)
#define vqrdmlashq_n_s32(__a, __b, __c) __arm_vqrdmlashq_n_s32(__a, __b, __c)
@@ -1131,7 +1069,6 @@
#define vmlaldavaxq_s16(__a, __b, __c) __arm_vmlaldavaxq_s16(__a, __b, __c)
#define vmlsldavaq_s16(__a, __b, __c) __arm_vmlsldavaq_s16(__a, __b, __c)
#define vmlsldavaxq_s16(__a, __b, __c) __arm_vmlsldavaxq_s16(__a, __b, __c)
-#define vabsq_m_f16(__inactive, __a, __p) __arm_vabsq_m_f16(__inactive, __a, __p)
#define vcvtmq_m_s16_f16(__inactive, __a, __p) __arm_vcvtmq_m_s16_f16(__inactive, __a, __p)
#define vcvtnq_m_s16_f16(__inactive, __a, __p) __arm_vcvtnq_m_s16_f16(__inactive, __a, __p)
#define vcvtpq_m_s16_f16(__inactive, __a, __p) __arm_vcvtpq_m_s16_f16(__inactive, __a, __p)
@@ -1151,7 +1088,6 @@
#define vmovltq_m_s8(__inactive, __a, __p) __arm_vmovltq_m_s8(__inactive, __a, __p)
#define vmovnbq_m_s16(__a, __b, __p) __arm_vmovnbq_m_s16(__a, __b, __p)
#define vmovntq_m_s16(__a, __b, __p) __arm_vmovntq_m_s16(__a, __b, __p)
-#define vnegq_m_f16(__inactive, __a, __p) __arm_vnegq_m_f16(__inactive, __a, __p)
#define vpselq_f16(__a, __b, __p) __arm_vpselq_f16(__a, __b, __p)
#define vqmovnbq_m_s16(__a, __b, __p) __arm_vqmovnbq_m_s16(__a, __b, __p)
#define vqmovntq_m_s16(__a, __b, __p) __arm_vqmovntq_m_s16(__a, __b, __p)
@@ -1203,7 +1139,6 @@
#define vmlaldavaxq_s32(__a, __b, __c) __arm_vmlaldavaxq_s32(__a, __b, __c)
#define vmlsldavaq_s32(__a, __b, __c) __arm_vmlsldavaq_s32(__a, __b, __c)
#define vmlsldavaxq_s32(__a, __b, __c) __arm_vmlsldavaxq_s32(__a, __b, __c)
-#define vabsq_m_f32(__inactive, __a, __p) __arm_vabsq_m_f32(__inactive, __a, __p)
#define vcvtmq_m_s32_f32(__inactive, __a, __p) __arm_vcvtmq_m_s32_f32(__inactive, __a, __p)
#define vcvtnq_m_s32_f32(__inactive, __a, __p) __arm_vcvtnq_m_s32_f32(__inactive, __a, __p)
#define vcvtpq_m_s32_f32(__inactive, __a, __p) __arm_vcvtpq_m_s32_f32(__inactive, __a, __p)
@@ -1223,7 +1158,6 @@
#define vmovltq_m_s16(__inactive, __a, __p) __arm_vmovltq_m_s16(__inactive, __a, __p)
#define vmovnbq_m_s32(__a, __b, __p) __arm_vmovnbq_m_s32(__a, __b, __p)
#define vmovntq_m_s32(__a, __b, __p) __arm_vmovntq_m_s32(__a, __b, __p)
-#define vnegq_m_f32(__inactive, __a, __p) __arm_vnegq_m_f32(__inactive, __a, __p)
#define vpselq_f32(__a, __b, __p) __arm_vpselq_f32(__a, __b, __p)
#define vqmovnbq_m_s32(__a, __b, __p) __arm_vqmovnbq_m_s32(__a, __b, __p)
#define vqmovntq_m_s32(__a, __b, __p) __arm_vqmovntq_m_s32(__a, __b, __p)
@@ -1779,21 +1713,6 @@
#define vdupq_x_n_u8(__a, __p) __arm_vdupq_x_n_u8(__a, __p)
#define vdupq_x_n_u16(__a, __p) __arm_vdupq_x_n_u16(__a, __p)
#define vdupq_x_n_u32(__a, __p) __arm_vdupq_x_n_u32(__a, __p)
-#define vabsq_x_s8(__a, __p) __arm_vabsq_x_s8(__a, __p)
-#define vabsq_x_s16(__a, __p) __arm_vabsq_x_s16(__a, __p)
-#define vabsq_x_s32(__a, __p) __arm_vabsq_x_s32(__a, __p)
-#define vclsq_x_s8(__a, __p) __arm_vclsq_x_s8(__a, __p)
-#define vclsq_x_s16(__a, __p) __arm_vclsq_x_s16(__a, __p)
-#define vclsq_x_s32(__a, __p) __arm_vclsq_x_s32(__a, __p)
-#define vclzq_x_s8(__a, __p) __arm_vclzq_x_s8(__a, __p)
-#define vclzq_x_s16(__a, __p) __arm_vclzq_x_s16(__a, __p)
-#define vclzq_x_s32(__a, __p) __arm_vclzq_x_s32(__a, __p)
-#define vclzq_x_u8(__a, __p) __arm_vclzq_x_u8(__a, __p)
-#define vclzq_x_u16(__a, __p) __arm_vclzq_x_u16(__a, __p)
-#define vclzq_x_u32(__a, __p) __arm_vclzq_x_u32(__a, __p)
-#define vnegq_x_s8(__a, __p) __arm_vnegq_x_s8(__a, __p)
-#define vnegq_x_s16(__a, __p) __arm_vnegq_x_s16(__a, __p)
-#define vnegq_x_s32(__a, __p) __arm_vnegq_x_s32(__a, __p)
#define vmullbq_poly_x_p8(__a, __b, __p) __arm_vmullbq_poly_x_p8(__a, __b, __p)
#define vmullbq_poly_x_p16(__a, __b, __p) __arm_vmullbq_poly_x_p16(__a, __b, __p)
#define vmullbq_int_x_s8(__a, __b, __p) __arm_vmullbq_int_x_s8(__a, __b, __p)
@@ -1890,10 +1809,6 @@
#define vminnmq_x_f32(__a, __b, __p) __arm_vminnmq_x_f32(__a, __b, __p)
#define vmaxnmq_x_f16(__a, __b, __p) __arm_vmaxnmq_x_f16(__a, __b, __p)
#define vmaxnmq_x_f32(__a, __b, __p) __arm_vmaxnmq_x_f32(__a, __b, __p)
-#define vabsq_x_f16(__a, __p) __arm_vabsq_x_f16(__a, __p)
-#define vabsq_x_f32(__a, __p) __arm_vabsq_x_f32(__a, __p)
-#define vnegq_x_f16(__a, __p) __arm_vnegq_x_f16(__a, __p)
-#define vnegq_x_f32(__a, __p) __arm_vnegq_x_f32(__a, __p)
#define vcaddq_rot90_x_f16(__a, __b, __p) __arm_vcaddq_rot90_x_f16(__a, __b, __p)
#define vcaddq_rot90_x_f32(__a, __b, __p) __arm_vcaddq_rot90_x_f32(__a, __b, __p)
#define vcaddq_rot270_x_f16(__a, __b, __p) __arm_vcaddq_rot270_x_f16(__a, __b, __p)
@@ -2148,90 +2063,6 @@ __arm_vdupq_n_s32 (int32_t __a)
return __builtin_mve_vdupq_n_sv4si (__a);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_s8 (int8x16_t __a)
-{
- return __builtin_mve_vabsq_sv16qi (__a);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_s16 (int16x8_t __a)
-{
- return __builtin_mve_vabsq_sv8hi (__a);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_s32 (int32x4_t __a)
-{
- return __builtin_mve_vabsq_sv4si (__a);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_s8 (int8x16_t __a)
-{
- return __builtin_mve_vclsq_sv16qi (__a);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_s16 (int16x8_t __a)
-{
- return __builtin_mve_vclsq_sv8hi (__a);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_s32 (int32x4_t __a)
-{
- return __builtin_mve_vclsq_sv4si (__a);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_s8 (int8x16_t __a)
-{
- return __builtin_mve_vclzq_sv16qi (__a);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_s16 (int16x8_t __a)
-{
- return __builtin_mve_vclzq_sv8hi (__a);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_s32 (int32x4_t __a)
-{
- return __builtin_mve_vclzq_sv4si (__a);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_s8 (int8x16_t __a)
-{
- return __builtin_mve_vnegq_sv16qi (__a);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_s16 (int16x8_t __a)
-{
- return __builtin_mve_vnegq_sv8hi (__a);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_s32 (int32x4_t __a)
-{
- return __builtin_mve_vnegq_sv4si (__a);
-}
-
__extension__ extern __inline int64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddlvq_s32 (int32x4_t __a)
@@ -2365,48 +2196,6 @@ __arm_vrev64q_s32 (int32x4_t __a)
return __builtin_mve_vrev64q_sv4si (__a);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqabsq_s8 (int8x16_t __a)
-{
- return __builtin_mve_vqabsq_sv16qi (__a);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqabsq_s16 (int16x8_t __a)
-{
- return __builtin_mve_vqabsq_sv8hi (__a);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqabsq_s32 (int32x4_t __a)
-{
- return __builtin_mve_vqabsq_sv4si (__a);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqnegq_s8 (int8x16_t __a)
-{
- return __builtin_mve_vqnegq_sv16qi (__a);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqnegq_s16 (int16x8_t __a)
-{
- return __builtin_mve_vqnegq_sv8hi (__a);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqnegq_s32 (int32x4_t __a)
-{
- return __builtin_mve_vqnegq_sv4si (__a);
-}
-
__extension__ extern __inline uint8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev64q_u8 (uint8x16_t __a)
@@ -2470,27 +2259,6 @@ __arm_vdupq_n_u32 (uint32_t __a)
return __builtin_mve_vdupq_n_uv4si (__a);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_u8 (uint8x16_t __a)
-{
- return __builtin_mve_vclzq_uv16qi (__a);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_u16 (uint16x8_t __a)
-{
- return __builtin_mve_vclzq_uv8hi (__a);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_u32 (uint32x4_t __a)
-{
- return __builtin_mve_vclzq_uv4si (__a);
-}
-
__extension__ extern __inline uint32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvq_u8 (uint8x16_t __a)
@@ -4497,13 +4265,6 @@ __arm_vcmpcsq_m_n_u8 (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
return __builtin_mve_vcmpcsq_m_n_uv16qi (__a, __b, __p);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_m_u8 (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclzq_m_uv16qi (__inactive, __a, __p);
-}
-
__extension__ extern __inline uint32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvaq_p_u8 (uint32_t __a, uint8x16_t __b, mve_pred16_t __p)
@@ -4644,28 +4405,6 @@ __arm_vrev64q_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
return __builtin_mve_vrev64q_m_sv16qi (__inactive, __a, __p);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqnegq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vqnegq_m_sv16qi (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqabsq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vqabsq_m_sv16qi (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vnegq_m_sv16qi (__inactive, __a, __p);
-}
-
-
__extension__ extern __inline int8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmvnq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
@@ -4722,20 +4461,6 @@ __arm_vdupq_m_n_s8 (int8x16_t __inactive, int8_t __a, mve_pred16_t __p)
return __builtin_mve_vdupq_m_n_sv16qi (__inactive, __a, __p);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclzq_m_sv16qi (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclsq_m_sv16qi (__inactive, __a, __p);
-}
-
__extension__ extern __inline int32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvaq_p_s8 (int32_t __a, int8x16_t __b, mve_pred16_t __p)
@@ -4743,13 +4468,6 @@ __arm_vaddvaq_p_s8 (int32_t __a, int8x16_t __b, mve_pred16_t __p)
return __builtin_mve_vaddvaq_p_sv16qi (__a, __b, __p);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vabsq_m_sv16qi (__inactive, __a, __p);
-}
-
__extension__ extern __inline int8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vqrdmlsdhxq_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
@@ -5023,13 +4741,6 @@ __arm_vcmpcsq_m_n_u16 (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
return __builtin_mve_vcmpcsq_m_n_uv8hi (__a, __b, __p);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_m_u16 (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclzq_m_uv8hi (__inactive, __a, __p);
-}
-
__extension__ extern __inline uint32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvaq_p_u16 (uint32_t __a, uint16x8_t __b, mve_pred16_t __p)
@@ -5170,27 +4881,6 @@ __arm_vrev64q_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
return __builtin_mve_vrev64q_m_sv8hi (__inactive, __a, __p);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqnegq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vqnegq_m_sv8hi (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqabsq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vqabsq_m_sv8hi (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vnegq_m_sv8hi (__inactive, __a, __p);
-}
-
__extension__ extern __inline int16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmvnq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
@@ -5247,20 +4937,6 @@ __arm_vdupq_m_n_s16 (int16x8_t __inactive, int16_t __a, mve_pred16_t __p)
return __builtin_mve_vdupq_m_n_sv8hi (__inactive, __a, __p);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclzq_m_sv8hi (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclsq_m_sv8hi (__inactive, __a, __p);
-}
-
__extension__ extern __inline int32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvaq_p_s16 (int32_t __a, int16x8_t __b, mve_pred16_t __p)
@@ -5268,13 +4944,6 @@ __arm_vaddvaq_p_s16 (int32_t __a, int16x8_t __b, mve_pred16_t __p)
return __builtin_mve_vaddvaq_p_sv8hi (__a, __b, __p);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vabsq_m_sv8hi (__inactive, __a, __p);
-}
-
__extension__ extern __inline int16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vqrdmlsdhxq_s16 (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
@@ -5548,13 +5217,6 @@ __arm_vcmpcsq_m_n_u32 (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
return __builtin_mve_vcmpcsq_m_n_uv4si (__a, __b, __p);
}
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_m_u32 (uint32x4_t __inactive, uint32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclzq_m_uv4si (__inactive, __a, __p);
-}
-
__extension__ extern __inline uint32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvaq_p_u32 (uint32_t __a, uint32x4_t __b, mve_pred16_t __p)
@@ -5695,27 +5357,6 @@ __arm_vrev64q_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
return __builtin_mve_vrev64q_m_sv4si (__inactive, __a, __p);
}
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqnegq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vqnegq_m_sv4si (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqabsq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vqabsq_m_sv4si (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vnegq_m_sv4si (__inactive, __a, __p);
-}
-
__extension__ extern __inline int32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmvnq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
@@ -5772,20 +5413,6 @@ __arm_vdupq_m_n_s32 (int32x4_t __inactive, int32_t __a, mve_pred16_t __p)
return __builtin_mve_vdupq_m_n_sv4si (__inactive, __a, __p);
}
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclzq_m_sv4si (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclsq_m_sv4si (__inactive, __a, __p);
-}
-
__extension__ extern __inline int32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvaq_p_s32 (int32_t __a, int32x4_t __b, mve_pred16_t __p)
@@ -5793,13 +5420,6 @@ __arm_vaddvaq_p_s32 (int32_t __a, int32x4_t __b, mve_pred16_t __p)
return __builtin_mve_vaddvaq_p_sv4si (__a, __b, __p);
}
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_m_s32 (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vabsq_m_sv4si (__inactive, __a, __p);
-}
-
__extension__ extern __inline int32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vqrdmlsdhxq_s32 (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
@@ -9552,111 +9172,6 @@ __arm_vdupq_x_n_u32 (uint32_t __a, mve_pred16_t __p)
return __builtin_mve_vdupq_m_n_uv4si (__arm_vuninitializedq_u32 (), __a, __p);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_x_s8 (int8x16_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vabsq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_x_s16 (int16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vabsq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_x_s32 (int32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vabsq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_x_s8 (int8x16_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclsq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_x_s16 (int16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclsq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_x_s32 (int32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclsq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_x_s8 (int8x16_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclzq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_x_s16 (int16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclzq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_x_s32 (int32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclzq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_x_u8 (uint8x16_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclzq_m_uv16qi (__arm_vuninitializedq_u8 (), __a, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_x_u16 (uint16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclzq_m_uv8hi (__arm_vuninitializedq_u16 (), __a, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_x_u32 (uint32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vclzq_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_x_s8 (int8x16_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vnegq_m_sv16qi (__arm_vuninitializedq_s8 (), __a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_x_s16 (int16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vnegq_m_sv8hi (__arm_vuninitializedq_s16 (), __a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_x_s32 (int32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vnegq_m_sv4si (__arm_vuninitializedq_s32 (), __a, __p);
-}
-
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmullbq_poly_x_p8 (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
@@ -11105,20 +10620,6 @@ __arm_vrev64q_f32 (float32x4_t __a)
return __builtin_mve_vrev64q_fv4sf (__a);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_f16 (float16x8_t __a)
-{
- return __builtin_mve_vnegq_fv8hf (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_f32 (float32x4_t __a)
-{
- return __builtin_mve_vnegq_fv4sf (__a);
-}
-
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vdupq_n_f16 (float16_t __a)
@@ -11133,20 +10634,6 @@ __arm_vdupq_n_f32 (float32_t __a)
return __builtin_mve_vdupq_n_fv4sf (__a);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_f16 (float16x8_t __a)
-{
- return __builtin_mve_vabsq_fv8hf (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_f32 (float32x4_t __a)
-{
- return __builtin_mve_vabsq_fv4sf (__a);
-}
-
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev32q_f16 (float16x8_t __a)
@@ -11974,13 +11461,6 @@ __arm_vfmsq_f16 (float16x8_t __a, float16x8_t __b, float16x8_t __c)
return __builtin_mve_vfmsq_fv8hf (__a, __b, __c);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vabsq_m_fv8hf (__inactive, __a, __p);
-}
-
__extension__ extern __inline int16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcvtmq_m_s16_f16 (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
@@ -12058,13 +11538,6 @@ __arm_vminnmvq_p_f16 (float16_t __a, float16x8_t __b, mve_pred16_t __p)
return __builtin_mve_vminnmvq_p_fv8hf (__a, __b, __p);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vnegq_m_fv8hf (__inactive, __a, __p);
-}
-
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vpselq_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
@@ -12282,13 +11755,6 @@ __arm_vfmsq_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c)
return __builtin_mve_vfmsq_fv4sf (__a, __b, __c);
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vabsq_m_fv4sf (__inactive, __a, __p);
-}
-
__extension__ extern __inline int32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcvtmq_m_s32_f32 (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
@@ -12366,13 +11832,6 @@ __arm_vminnmvq_p_f32 (float32_t __a, float32x4_t __b, mve_pred16_t __p)
return __builtin_mve_vminnmvq_p_fv4sf (__a, __b, __p);
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vnegq_m_fv4sf (__inactive, __a, __p);
-}
-
__extension__ extern __inline float32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vpselq_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
@@ -13156,34 +12615,6 @@ __arm_vmaxnmq_x_f32 (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
return __builtin_mve_vmaxnmq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __b, __p);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_x_f16 (float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vabsq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_x_f32 (float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vabsq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_x_f16 (float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vnegq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_x_f32 (float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vnegq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
-}
-
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcaddq_rot90_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
@@ -13834,90 +13265,6 @@ __arm_vdupq_n (int32_t __a)
return __arm_vdupq_n_s32 (__a);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq (int8x16_t __a)
-{
- return __arm_vabsq_s8 (__a);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq (int16x8_t __a)
-{
- return __arm_vabsq_s16 (__a);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq (int32x4_t __a)
-{
- return __arm_vabsq_s32 (__a);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq (int8x16_t __a)
-{
- return __arm_vclsq_s8 (__a);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq (int16x8_t __a)
-{
- return __arm_vclsq_s16 (__a);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq (int32x4_t __a)
-{
- return __arm_vclsq_s32 (__a);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq (int8x16_t __a)
-{
- return __arm_vclzq_s8 (__a);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq (int16x8_t __a)
-{
- return __arm_vclzq_s16 (__a);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq (int32x4_t __a)
-{
- return __arm_vclzq_s32 (__a);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq (int8x16_t __a)
-{
- return __arm_vnegq_s8 (__a);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq (int16x8_t __a)
-{
- return __arm_vnegq_s16 (__a);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq (int32x4_t __a)
-{
- return __arm_vnegq_s32 (__a);
-}
-
__extension__ extern __inline int64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddlvq (int32x4_t __a)
@@ -14037,48 +13384,6 @@ __arm_vrev64q (int32x4_t __a)
return __arm_vrev64q_s32 (__a);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqabsq (int8x16_t __a)
-{
- return __arm_vqabsq_s8 (__a);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqabsq (int16x8_t __a)
-{
- return __arm_vqabsq_s16 (__a);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqabsq (int32x4_t __a)
-{
- return __arm_vqabsq_s32 (__a);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqnegq (int8x16_t __a)
-{
- return __arm_vqnegq_s8 (__a);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqnegq (int16x8_t __a)
-{
- return __arm_vqnegq_s16 (__a);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqnegq (int32x4_t __a)
-{
- return __arm_vqnegq_s32 (__a);
-}
-
__extension__ extern __inline uint8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev64q (uint8x16_t __a)
@@ -14142,27 +13447,6 @@ __arm_vdupq_n (uint32_t __a)
return __arm_vdupq_n_u32 (__a);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq (uint8x16_t __a)
-{
- return __arm_vclzq_u8 (__a);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq (uint16x8_t __a)
-{
- return __arm_vclzq_u16 (__a);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq (uint32x4_t __a)
-{
- return __arm_vclzq_u32 (__a);
-}
-
__extension__ extern __inline uint32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvq (uint8x16_t __a)
@@ -16074,13 +15358,6 @@ __arm_vcmpcsq_m (uint8x16_t __a, uint8_t __b, mve_pred16_t __p)
return __arm_vcmpcsq_m_n_u8 (__a, __b, __p);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_m (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
-{
- return __arm_vclzq_m_u8 (__inactive, __a, __p);
-}
-
__extension__ extern __inline uint32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvaq_p (uint32_t __a, uint8x16_t __b, mve_pred16_t __p)
@@ -16221,27 +15498,6 @@ __arm_vrev64q_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
return __arm_vrev64q_m_s8 (__inactive, __a, __p);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqnegq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
-{
- return __arm_vqnegq_m_s8 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqabsq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
-{
- return __arm_vqabsq_m_s8 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
-{
- return __arm_vnegq_m_s8 (__inactive, __a, __p);
-}
-
__extension__ extern __inline int8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmvnq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
@@ -16298,20 +15554,6 @@ __arm_vdupq_m (int8x16_t __inactive, int8_t __a, mve_pred16_t __p)
return __arm_vdupq_m_n_s8 (__inactive, __a, __p);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
-{
- return __arm_vclzq_m_s8 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
-{
- return __arm_vclsq_m_s8 (__inactive, __a, __p);
-}
-
__extension__ extern __inline int32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvaq_p (int32_t __a, int8x16_t __b, mve_pred16_t __p)
@@ -16319,13 +15561,6 @@ __arm_vaddvaq_p (int32_t __a, int8x16_t __b, mve_pred16_t __p)
return __arm_vaddvaq_p_s8 (__a, __b, __p);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
-{
- return __arm_vabsq_m_s8 (__inactive, __a, __p);
-}
-
__extension__ extern __inline int8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vqrdmlsdhxq (int8x16_t __inactive, int8x16_t __a, int8x16_t __b)
@@ -16599,13 +15834,6 @@ __arm_vcmpcsq_m (uint16x8_t __a, uint16_t __b, mve_pred16_t __p)
return __arm_vcmpcsq_m_n_u16 (__a, __b, __p);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_m (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vclzq_m_u16 (__inactive, __a, __p);
-}
-
__extension__ extern __inline uint32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvaq_p (uint32_t __a, uint16x8_t __b, mve_pred16_t __p)
@@ -16734,37 +15962,16 @@ __arm_vcmpeqq_m (int16x8_t __a, int16x8_t __b, mve_pred16_t __p)
__extension__ extern __inline mve_pred16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vcmpeqq_m (int16x8_t __a, int16_t __b, mve_pred16_t __p)
-{
- return __arm_vcmpeqq_m_n_s16 (__a, __b, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrev64q_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrev64q_m_s16 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqnegq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vqnegq_m_s16 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqabsq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+__arm_vcmpeqq_m (int16x8_t __a, int16_t __b, mve_pred16_t __p)
{
- return __arm_vqabsq_m_s16 (__inactive, __a, __p);
+ return __arm_vcmpeqq_m_n_s16 (__a, __b, __p);
}
__extension__ extern __inline int16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
+__arm_vrev64q_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
{
- return __arm_vnegq_m_s16 (__inactive, __a, __p);
+ return __arm_vrev64q_m_s16 (__inactive, __a, __p);
}
__extension__ extern __inline int16x8_t
@@ -16823,20 +16030,6 @@ __arm_vdupq_m (int16x8_t __inactive, int16_t __a, mve_pred16_t __p)
return __arm_vdupq_m_n_s16 (__inactive, __a, __p);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vclzq_m_s16 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vclsq_m_s16 (__inactive, __a, __p);
-}
-
__extension__ extern __inline int32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvaq_p (int32_t __a, int16x8_t __b, mve_pred16_t __p)
@@ -16844,13 +16037,6 @@ __arm_vaddvaq_p (int32_t __a, int16x8_t __b, mve_pred16_t __p)
return __arm_vaddvaq_p_s16 (__a, __b, __p);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vabsq_m_s16 (__inactive, __a, __p);
-}
-
__extension__ extern __inline int16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vqrdmlsdhxq (int16x8_t __inactive, int16x8_t __a, int16x8_t __b)
@@ -17124,13 +16310,6 @@ __arm_vcmpcsq_m (uint32x4_t __a, uint32_t __b, mve_pred16_t __p)
return __arm_vcmpcsq_m_n_u32 (__a, __b, __p);
}
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_m (uint32x4_t __inactive, uint32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vclzq_m_u32 (__inactive, __a, __p);
-}
-
__extension__ extern __inline uint32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvaq_p (uint32_t __a, uint32x4_t __b, mve_pred16_t __p)
@@ -17271,27 +16450,6 @@ __arm_vrev64q_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
return __arm_vrev64q_m_s32 (__inactive, __a, __p);
}
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqnegq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vqnegq_m_s32 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqabsq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vqabsq_m_s32 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vnegq_m_s32 (__inactive, __a, __p);
-}
-
__extension__ extern __inline int32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmvnq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
@@ -17348,20 +16506,6 @@ __arm_vdupq_m (int32x4_t __inactive, int32_t __a, mve_pred16_t __p)
return __arm_vdupq_m_n_s32 (__inactive, __a, __p);
}
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vclzq_m_s32 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vclsq_m_s32 (__inactive, __a, __p);
-}
-
__extension__ extern __inline int32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vaddvaq_p (int32_t __a, int32x4_t __b, mve_pred16_t __p)
@@ -17369,13 +16513,6 @@ __arm_vaddvaq_p (int32_t __a, int32x4_t __b, mve_pred16_t __p)
return __arm_vaddvaq_p_s32 (__a, __b, __p);
}
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_m (int32x4_t __inactive, int32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vabsq_m_s32 (__inactive, __a, __p);
-}
-
__extension__ extern __inline int32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vqrdmlsdhxq (int32x4_t __inactive, int32x4_t __a, int32x4_t __b)
@@ -20659,111 +19796,6 @@ __arm_viwdupq_x_u32 (uint32_t *__a, uint32_t __b, const int __imm, mve_pred16_t
return __arm_viwdupq_x_wb_u32 (__a, __b, __imm, __p);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_x (int8x16_t __a, mve_pred16_t __p)
-{
- return __arm_vabsq_x_s8 (__a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_x (int16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vabsq_x_s16 (__a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_x (int32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vabsq_x_s32 (__a, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_x (int8x16_t __a, mve_pred16_t __p)
-{
- return __arm_vclsq_x_s8 (__a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_x (int16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vclsq_x_s16 (__a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclsq_x (int32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vclsq_x_s32 (__a, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_x (int8x16_t __a, mve_pred16_t __p)
-{
- return __arm_vclzq_x_s8 (__a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_x (int16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vclzq_x_s16 (__a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_x (int32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vclzq_x_s32 (__a, __p);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_x (uint8x16_t __a, mve_pred16_t __p)
-{
- return __arm_vclzq_x_u8 (__a, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_x (uint16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vclzq_x_u16 (__a, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vclzq_x (uint32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vclzq_x_u32 (__a, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_x (int8x16_t __a, mve_pred16_t __p)
-{
- return __arm_vnegq_x_s8 (__a, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_x (int16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vnegq_x_s16 (__a, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_x (int32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vnegq_x_s32 (__a, __p);
-}
-
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmullbq_poly_x (uint8x16_t __a, uint8x16_t __b, mve_pred16_t __p)
@@ -21956,20 +20988,6 @@ __arm_vrev64q (float32x4_t __a)
return __arm_vrev64q_f32 (__a);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq (float16x8_t __a)
-{
- return __arm_vnegq_f16 (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq (float32x4_t __a)
-{
- return __arm_vnegq_f32 (__a);
-}
-
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vdupq_n (float16_t __a)
@@ -21984,20 +21002,6 @@ __arm_vdupq_n (float32_t __a)
return __arm_vdupq_n_f32 (__a);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq (float16x8_t __a)
-{
- return __arm_vabsq_f16 (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq (float32x4_t __a)
-{
- return __arm_vabsq_f32 (__a);
-}
-
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev32q (float16x8_t __a)
@@ -22642,13 +21646,6 @@ __arm_vfmsq (float16x8_t __a, float16x8_t __b, float16x8_t __c)
return __arm_vfmsq_f16 (__a, __b, __c);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vabsq_m_f16 (__inactive, __a, __p);
-}
-
__extension__ extern __inline int16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcvtmq_m (int16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
@@ -22726,13 +21723,6 @@ __arm_vminnmvq_p (float16_t __a, float16x8_t __b, mve_pred16_t __p)
return __arm_vminnmvq_p_f16 (__a, __b, __p);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vnegq_m_f16 (__inactive, __a, __p);
-}
-
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vpselq (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
@@ -22950,13 +21940,6 @@ __arm_vfmsq (float32x4_t __a, float32x4_t __b, float32x4_t __c)
return __arm_vfmsq_f32 (__a, __b, __c);
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vabsq_m_f32 (__inactive, __a, __p);
-}
-
__extension__ extern __inline int32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcvtmq_m (int32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
@@ -23034,13 +22017,6 @@ __arm_vminnmvq_p (float32_t __a, float32x4_t __b, mve_pred16_t __p)
return __arm_vminnmvq_p_f32 (__a, __b, __p);
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vnegq_m_f32 (__inactive, __a, __p);
-}
-
__extension__ extern __inline float32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vpselq (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
@@ -23748,34 +22724,6 @@ __arm_vmaxnmq_x (float32x4_t __a, float32x4_t __b, mve_pred16_t __p)
return __arm_vmaxnmq_x_f32 (__a, __b, __p);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_x (float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vabsq_x_f16 (__a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vabsq_x (float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vabsq_x_f32 (__a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_x (float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vnegq_x_f16 (__a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vnegq_x (float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vnegq_x_f32 (__a, __p);
-}
-
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcaddq_rot90_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
@@ -24477,27 +23425,11 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_float16x8_t]: __arm_vrev64q_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
int (*)[__ARM_mve_type_float32x4_t]: __arm_vrev64q_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
-#define __arm_vnegq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vnegq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vnegq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vnegq_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vnegq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vnegq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
-
#define __arm_vdupq_n(p0) ({ __typeof(p0) __p0 = (p0); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
int (*)[__ARM_mve_type_float16x8_t]: __arm_vdupq_n_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
int (*)[__ARM_mve_type_float32x4_t]: __arm_vdupq_n_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
-#define __arm_vabsq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vabsq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vabsq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vabsq_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vabsq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vabsq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
-
#define __arm_vrev32q(p0) ({ __typeof(p0) __p0 = (p0); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev32q_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
@@ -24519,18 +23451,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev16q_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev16q_u8 (__ARM_mve_coerce(__p0, uint8x16_t)));})
-#define __arm_vqabsq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vqabsq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vqabsq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vqabsq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
-
-#define __arm_vqnegq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vqnegq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vqnegq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vqnegq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
-
#define __arm_vmvnq(p0) ({ __typeof(p0) __p0 = (p0); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
int (*)[__ARM_mve_type_int8x16_t]: __arm_vmvnq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
@@ -24554,21 +23474,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint8x16_t]: __arm_vmovltq_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
int (*)[__ARM_mve_type_uint16x8_t]: __arm_vmovltq_u16 (__ARM_mve_coerce(__p0, uint16x8_t)));})
-#define __arm_vclzq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vclzq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vclzq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vclzq_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
- int (*)[__ARM_mve_type_uint8x16_t]: __arm_vclzq_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
- int (*)[__ARM_mve_type_uint16x8_t]: __arm_vclzq_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
- int (*)[__ARM_mve_type_uint32x4_t]: __arm_vclzq_u32 (__ARM_mve_coerce(__p0, uint32x4_t)));})
-
-#define __arm_vclsq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vclsq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vclsq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vclsq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
-
#define __arm_vcvtq(p0) ({ __typeof(p0) __p0 = (p0); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
int (*)[__ARM_mve_type_int16x8_t]: __arm_vcvtq_f16_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
@@ -24988,23 +23893,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlcq_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1, p2), \
int (*)[__ARM_mve_type_uint32x4_t]: __arm_vshlcq_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1, p2));})
-#define __arm_vclsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vclsq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vclsq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vclsq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
-#define __arm_vclzq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vclzq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vclzq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vclzq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vclzq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vclzq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vclzq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
-
#define __arm_vmaxaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -25125,13 +24013,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmladhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmladhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
-#define __arm_vqnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqnegq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqnegq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqnegq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
#define __arm_vqdmlsdhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
__typeof(p2) __p2 = (p2); \
@@ -25228,15 +24109,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vcvtq_m_n_f16_u16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3), \
int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vcvtq_m_n_f32_u32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2, p3));})
-#define __arm_vabsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabsq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabsq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabsq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vabsq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vabsq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
-
#define __arm_vcmlaq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
__typeof(p2) __p2 = (p2); \
@@ -25566,15 +24438,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-#define __arm_vnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vnegq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vnegq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vnegq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vnegq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vnegq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
-
#define __arm_vcmpgeq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -26058,14 +24921,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint32x4_t]: __arm_vstrwq_scatter_base_wb_p_u32 (p0, p1, __ARM_mve_coerce(__p2, uint32x4_t), p3), \
int (*)[__ARM_mve_type_float32x4_t]: __arm_vstrwq_scatter_base_wb_p_f32 (p0, p1, __ARM_mve_coerce(__p2, float32x4_t), p3));})
-#define __arm_vabsq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vabsq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vabsq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vabsq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vabsq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vabsq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
-
#define __arm_vbicq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
__typeof(p2) __p2 = (p2); \
_Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
@@ -26157,14 +25012,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vminnmq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t), p3), \
int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vminnmq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t), p3));})
-#define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vnegq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vnegq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vnegq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vnegq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vnegq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
-
#define __arm_vornq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
__typeof(p2) __p2 = (p2); \
_Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
@@ -26280,33 +25127,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint16_t_ptr][__ARM_mve_type_uint16x8x4_t]: __arm_vst4q_u16 (__ARM_mve_coerce(p0, uint16_t *), __ARM_mve_coerce(__p1, uint16x8x4_t)), \
int (*)[__ARM_mve_type_uint32_t_ptr][__ARM_mve_type_uint32x4x4_t]: __arm_vst4q_u32 (__ARM_mve_coerce(p0, uint32_t *), __ARM_mve_coerce(__p1, uint32x4x4_t)));})
-#define __arm_vabsq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vabsq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vabsq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vabsq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
-
-#define __arm_vclsq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vclsq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vclsq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vclsq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
-
-#define __arm_vclzq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vclzq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vclzq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vclzq_s32 (__ARM_mve_coerce(__p0, int32x4_t)), \
- int (*)[__ARM_mve_type_uint8x16_t]: __arm_vclzq_u8 (__ARM_mve_coerce(__p0, uint8x16_t)), \
- int (*)[__ARM_mve_type_uint16x8_t]: __arm_vclzq_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
- int (*)[__ARM_mve_type_uint32x4_t]: __arm_vclzq_u32 (__ARM_mve_coerce(__p0, uint32x4_t)));})
-
-#define __arm_vnegq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vnegq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vnegq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vnegq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
-
#define __arm_vmovlbq(p0) ({ __typeof(p0) __p0 = (p0); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
int (*)[__ARM_mve_type_int8x16_t]: __arm_vmovlbq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
@@ -26351,18 +25171,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint16x8_t]: __arm_vrev64q_u16 (__ARM_mve_coerce(__p0, uint16x8_t)), \
int (*)[__ARM_mve_type_uint32x4_t]: __arm_vrev64q_u32 (__ARM_mve_coerce(__p0, uint32x4_t)));})
-#define __arm_vqabsq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vqabsq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vqabsq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vqabsq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
-
-#define __arm_vqnegq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vqnegq_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vqnegq_s16 (__ARM_mve_coerce(__p0, int16x8_t)), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vqnegq_s32 (__ARM_mve_coerce(__p0, int32x4_t)));})
-
#define __arm_vcmpneq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -26768,13 +25576,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmladhq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmladhq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
-#define __arm_vqnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqnegq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqnegq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqnegq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
#define __arm_vqdmlsdhxq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
__typeof(p2) __p2 = (p2); \
@@ -26783,30 +25584,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmlsdhxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t)), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmlsdhxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t)));})
-#define __arm_vabsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vabsq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vabsq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vabsq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
-#define __arm_vclsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vclsq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vclsq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vclsq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
-#define __arm_vclzq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vclzq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vclzq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vclzq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vclzq_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vclzq_m_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t]: __arm_vclzq_m_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
-
#define __arm_vcmpgeq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -26903,13 +25680,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce3(p2, int)), \
int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vmlasq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce3(p2, int)));})
-#define __arm_vnegq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vnegq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vnegq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vnegq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
#define __arm_vpselq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -27349,12 +26119,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint32x4_t]: __arm_vuninitializedq_u32 (), \
int (*)[__ARM_mve_type_uint64x2_t]: __arm_vuninitializedq_u64 ());})
-#define __arm_vabsq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vabsq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vabsq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vabsq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2));})
-
#define __arm_vcaddq_rot270_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
__typeof(p2) __p2 = (p2); \
_Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
@@ -27421,12 +26185,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmulltq_poly_x_p8 (__ARM_mve_coerce(__p1, uint8x16_t), __ARM_mve_coerce(__p2, uint8x16_t), p3), \
int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmulltq_poly_x_p16 (__ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16x8_t), p3));})
-#define __arm_vnegq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vnegq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vnegq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vnegq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2));})
-
#define __arm_vornq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
__typeof(p2) __p2 = (p2); \
_Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
@@ -27626,21 +26384,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vhcaddq_rot90_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vhcaddq_rot90_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
-#define __arm_vclsq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vclsq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vclsq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vclsq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2));})
-
-#define __arm_vclzq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vclzq_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vclzq_x_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t]: __arm_vclzq_x_s32 (__ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_uint8x16_t]: __arm_vclzq_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t]: __arm_vclzq_x_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2), \
- int (*)[__ARM_mve_type_uint32x4_t]: __arm_vclzq_x_u32 (__ARM_mve_coerce(__p1, uint32x4_t), p2));})
-
#define __arm_vadciq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -27868,13 +26611,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmlsdhxq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmlsdhxq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
-#define __arm_vqabsq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vqabsq_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqabsq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqabsq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
#define __arm_vmvnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 04/10] arm: [MVE intrinsics] rework vrndq vrndaq vrndmq vrndnq vrndpq vrndxq
2023-05-05 16:48 [PATCH 01/10] arm: [MVE intrinsics] add unary shape Christophe Lyon
2023-05-05 16:48 ` [PATCH 02/10] arm: [MVE intrinsics] factorize several unary operations Christophe Lyon
2023-05-05 16:48 ` [PATCH 03/10] arm: [MVE intrinsics] rework vabsq vnegq vclsq vclzq, vqabsq, vqnegq Christophe Lyon
@ 2023-05-05 16:49 ` Christophe Lyon
2023-05-05 16:49 ` [PATCH 05/10] arm: [MVE intrinsics] add binary_move_narrow and binary_move_narrow_unsigned shapes Christophe Lyon
` (6 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Christophe Lyon @ 2023-05-05 16:49 UTC (permalink / raw)
To: gcc-patches, kyrylo.tkachov, richard.earnshaw, richard.sandiford
Cc: Christophe Lyon
Implement vrndq, vrndaq, vrndmq, vrndnq, vrndpq, vrndxq using the new
MVE builtins framework.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
(vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
* config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
(vrndpq, vrndq, vrndxq): New.
* config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
(vrndpq, vrndq, vrndxq): New.
* config/arm/arm_mve.h (vrndxq): Remove.
(vrndq): Remove.
(vrndpq): Remove.
(vrndnq): Remove.
(vrndmq): Remove.
(vrndaq): Remove.
(vrndaq_m): Remove.
(vrndmq_m): Remove.
(vrndnq_m): Remove.
(vrndpq_m): Remove.
(vrndq_m): Remove.
(vrndxq_m): Remove.
(vrndq_x): Remove.
(vrndnq_x): Remove.
(vrndmq_x): Remove.
(vrndpq_x): Remove.
(vrndaq_x): Remove.
(vrndxq_x): Remove.
(vrndxq_f16): Remove.
(vrndxq_f32): Remove.
(vrndq_f16): Remove.
(vrndq_f32): Remove.
(vrndpq_f16): Remove.
(vrndpq_f32): Remove.
(vrndnq_f16): Remove.
(vrndnq_f32): Remove.
(vrndmq_f16): Remove.
(vrndmq_f32): Remove.
(vrndaq_f16): Remove.
(vrndaq_f32): Remove.
(vrndaq_m_f16): Remove.
(vrndmq_m_f16): Remove.
(vrndnq_m_f16): Remove.
(vrndpq_m_f16): Remove.
(vrndq_m_f16): Remove.
(vrndxq_m_f16): Remove.
(vrndaq_m_f32): Remove.
(vrndmq_m_f32): Remove.
(vrndnq_m_f32): Remove.
(vrndpq_m_f32): Remove.
(vrndq_m_f32): Remove.
(vrndxq_m_f32): Remove.
(vrndq_x_f16): Remove.
(vrndq_x_f32): Remove.
(vrndnq_x_f16): Remove.
(vrndnq_x_f32): Remove.
(vrndmq_x_f16): Remove.
(vrndmq_x_f32): Remove.
(vrndpq_x_f16): Remove.
(vrndpq_x_f32): Remove.
(vrndaq_x_f16): Remove.
(vrndaq_x_f32): Remove.
(vrndxq_x_f16): Remove.
(vrndxq_x_f32): Remove.
(__arm_vrndxq_f16): Remove.
(__arm_vrndxq_f32): Remove.
(__arm_vrndq_f16): Remove.
(__arm_vrndq_f32): Remove.
(__arm_vrndpq_f16): Remove.
(__arm_vrndpq_f32): Remove.
(__arm_vrndnq_f16): Remove.
(__arm_vrndnq_f32): Remove.
(__arm_vrndmq_f16): Remove.
(__arm_vrndmq_f32): Remove.
(__arm_vrndaq_f16): Remove.
(__arm_vrndaq_f32): Remove.
(__arm_vrndaq_m_f16): Remove.
(__arm_vrndmq_m_f16): Remove.
(__arm_vrndnq_m_f16): Remove.
(__arm_vrndpq_m_f16): Remove.
(__arm_vrndq_m_f16): Remove.
(__arm_vrndxq_m_f16): Remove.
(__arm_vrndaq_m_f32): Remove.
(__arm_vrndmq_m_f32): Remove.
(__arm_vrndnq_m_f32): Remove.
(__arm_vrndpq_m_f32): Remove.
(__arm_vrndq_m_f32): Remove.
(__arm_vrndxq_m_f32): Remove.
(__arm_vrndq_x_f16): Remove.
(__arm_vrndq_x_f32): Remove.
(__arm_vrndnq_x_f16): Remove.
(__arm_vrndnq_x_f32): Remove.
(__arm_vrndmq_x_f16): Remove.
(__arm_vrndmq_x_f32): Remove.
(__arm_vrndpq_x_f16): Remove.
(__arm_vrndpq_x_f32): Remove.
(__arm_vrndaq_x_f16): Remove.
(__arm_vrndaq_x_f32): Remove.
(__arm_vrndxq_x_f16): Remove.
(__arm_vrndxq_x_f32): Remove.
(__arm_vrndxq): Remove.
(__arm_vrndq): Remove.
(__arm_vrndpq): Remove.
(__arm_vrndnq): Remove.
(__arm_vrndmq): Remove.
(__arm_vrndaq): Remove.
(__arm_vrndaq_m): Remove.
(__arm_vrndmq_m): Remove.
(__arm_vrndnq_m): Remove.
(__arm_vrndpq_m): Remove.
(__arm_vrndq_m): Remove.
(__arm_vrndxq_m): Remove.
(__arm_vrndq_x): Remove.
(__arm_vrndnq_x): Remove.
(__arm_vrndmq_x): Remove.
(__arm_vrndpq_x): Remove.
(__arm_vrndaq_x): Remove.
(__arm_vrndxq_x): Remove.
---
gcc/config/arm/arm-mve-builtins-base.cc | 15 +
gcc/config/arm/arm-mve-builtins-base.def | 6 +
gcc/config/arm/arm-mve-builtins-base.h | 6 +
gcc/config/arm/arm_mve.h | 655 -----------------------
4 files changed, 27 insertions(+), 655 deletions(-)
diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc
index 627553f1784..4cf4464a48e 100644
--- a/gcc/config/arm/arm-mve-builtins-base.cc
+++ b/gcc/config/arm/arm-mve-builtins-base.cc
@@ -203,6 +203,15 @@ namespace arm_mve {
UNSPEC##_M_S, -1, -1, \
-1, -1, -1))
+ /* Helper for builtins with only unspec codes, _m predicated
+ overrides, only floating-point. */
+#define FUNCTION_ONLY_F(NAME, UNSPEC) FUNCTION \
+ (NAME, unspec_mve_function_exact_insn, \
+ (-1, -1, UNSPEC##_F, \
+ -1, -1, -1, \
+ -1, -1, UNSPEC##_M_F, \
+ -1, -1, -1))
+
FUNCTION_WITHOUT_N (vabdq, VABDQ)
FUNCTION (vabsq, unspec_based_mve_function_exact_insn, (ABS, ABS, ABS, -1, -1, -1, VABSQ_M_S, -1, VABSQ_M_F, -1, -1, -1))
FUNCTION_WITH_RTX_M_N (vaddq, PLUS, VADDQ)
@@ -238,6 +247,12 @@ FUNCTION_WITH_M_N_NO_F (vqsubq, VQSUBQ)
FUNCTION (vreinterpretq, vreinterpretq_impl,)
FUNCTION_WITHOUT_N_NO_F (vrhaddq, VRHADDQ)
FUNCTION_WITHOUT_N_NO_F (vrmulhq, VRMULHQ)
+FUNCTION_ONLY_F (vrndq, VRNDQ)
+FUNCTION_ONLY_F (vrndaq, VRNDAQ)
+FUNCTION_ONLY_F (vrndmq, VRNDMQ)
+FUNCTION_ONLY_F (vrndnq, VRNDNQ)
+FUNCTION_ONLY_F (vrndpq, VRNDPQ)
+FUNCTION_ONLY_F (vrndxq, VRNDXQ)
FUNCTION_WITH_M_N_NO_F (vrshlq, VRSHLQ)
FUNCTION_ONLY_N_NO_F (vrshrnbq, VRSHRNBQ)
FUNCTION_ONLY_N_NO_F (vrshrntq, VRSHRNTQ)
diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def
index 7a8f5ac78e4..2928a554a11 100644
--- a/gcc/config/arm/arm-mve-builtins-base.def
+++ b/gcc/config/arm/arm-mve-builtins-base.def
@@ -78,6 +78,12 @@ DEF_MVE_FUNCTION (vmulq, binary_opt_n, all_float, mx_or_none)
DEF_MVE_FUNCTION (vnegq, unary, all_float, mx_or_none)
DEF_MVE_FUNCTION (vorrq, binary_orrq, all_float, mx_or_none)
DEF_MVE_FUNCTION (vreinterpretq, unary_convert, reinterpret_float, none)
+DEF_MVE_FUNCTION (vrndaq, unary, all_float, mx_or_none)
+DEF_MVE_FUNCTION (vrndmq, unary, all_float, mx_or_none)
+DEF_MVE_FUNCTION (vrndnq, unary, all_float, mx_or_none)
+DEF_MVE_FUNCTION (vrndpq, unary, all_float, mx_or_none)
+DEF_MVE_FUNCTION (vrndq, unary, all_float, mx_or_none)
+DEF_MVE_FUNCTION (vrndxq, unary, all_float, mx_or_none)
DEF_MVE_FUNCTION (vsubq, binary_opt_n, all_float, mx_or_none)
DEF_MVE_FUNCTION (vuninitializedq, inherent, all_float, none)
#undef REQUIRES_FLOAT
diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h
index 8425a84b9ad..b432011978e 100644
--- a/gcc/config/arm/arm-mve-builtins-base.h
+++ b/gcc/config/arm/arm-mve-builtins-base.h
@@ -58,6 +58,12 @@ extern const function_base *const vqsubq;
extern const function_base *const vreinterpretq;
extern const function_base *const vrhaddq;
extern const function_base *const vrmulhq;
+extern const function_base *const vrndq;
+extern const function_base *const vrndaq;
+extern const function_base *const vrndmq;
+extern const function_base *const vrndnq;
+extern const function_base *const vrndpq;
+extern const function_base *const vrndxq;
extern const function_base *const vrshlq;
extern const function_base *const vrshrnbq;
extern const function_base *const vrshrntq;
diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index 8101515497b..aae1f8bf639 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -330,12 +330,6 @@
#define vsetq_lane(__a, __b, __idx) __arm_vsetq_lane(__a, __b, __idx)
#define vgetq_lane(__a, __idx) __arm_vgetq_lane(__a, __idx)
#define vshlcq_m(__a, __b, __imm, __p) __arm_vshlcq_m(__a, __b, __imm, __p)
-#define vrndxq(__a) __arm_vrndxq(__a)
-#define vrndq(__a) __arm_vrndq(__a)
-#define vrndpq(__a) __arm_vrndpq(__a)
-#define vrndnq(__a) __arm_vrndnq(__a)
-#define vrndmq(__a) __arm_vrndmq(__a)
-#define vrndaq(__a) __arm_vrndaq(__a)
#define vcvttq_f32(__a) __arm_vcvttq_f32(__a)
#define vcvtbq_f32(__a) __arm_vcvtbq_f32(__a)
#define vcvtq(__a) __arm_vcvtq(__a)
@@ -372,12 +366,6 @@
#define vminnmaq_m(__a, __b, __p) __arm_vminnmaq_m(__a, __b, __p)
#define vminnmavq_p(__a, __b, __p) __arm_vminnmavq_p(__a, __b, __p)
#define vminnmvq_p(__a, __b, __p) __arm_vminnmvq_p(__a, __b, __p)
-#define vrndaq_m(__inactive, __a, __p) __arm_vrndaq_m(__inactive, __a, __p)
-#define vrndmq_m(__inactive, __a, __p) __arm_vrndmq_m(__inactive, __a, __p)
-#define vrndnq_m(__inactive, __a, __p) __arm_vrndnq_m(__inactive, __a, __p)
-#define vrndpq_m(__inactive, __a, __p) __arm_vrndpq_m(__inactive, __a, __p)
-#define vrndq_m(__inactive, __a, __p) __arm_vrndq_m(__inactive, __a, __p)
-#define vrndxq_m(__inactive, __a, __p) __arm_vrndxq_m(__inactive, __a, __p)
#define vcvtq_m_n(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n(__inactive, __a, __imm6, __p)
#define vcmlaq_m(__a, __b, __c, __p) __arm_vcmlaq_m(__a, __b, __c, __p)
#define vcmlaq_rot180_m(__a, __b, __c, __p) __arm_vcmlaq_rot180_m(__a, __b, __c, __p)
@@ -400,12 +388,6 @@
#define vcmulq_rot270_x(__a, __b, __p) __arm_vcmulq_rot270_x(__a, __b, __p)
#define vcvtq_x(__a, __p) __arm_vcvtq_x(__a, __p)
#define vcvtq_x_n(__a, __imm6, __p) __arm_vcvtq_x_n(__a, __imm6, __p)
-#define vrndq_x(__a, __p) __arm_vrndq_x(__a, __p)
-#define vrndnq_x(__a, __p) __arm_vrndnq_x(__a, __p)
-#define vrndmq_x(__a, __p) __arm_vrndmq_x(__a, __p)
-#define vrndpq_x(__a, __p) __arm_vrndpq_x(__a, __p)
-#define vrndaq_x(__a, __p) __arm_vrndaq_x(__a, __p)
-#define vrndxq_x(__a, __p) __arm_vrndxq_x(__a, __p)
#define vst4q_s8( __addr, __value) __arm_vst4q_s8( __addr, __value)
@@ -416,18 +398,6 @@
#define vst4q_u32( __addr, __value) __arm_vst4q_u32( __addr, __value)
#define vst4q_f16( __addr, __value) __arm_vst4q_f16( __addr, __value)
#define vst4q_f32( __addr, __value) __arm_vst4q_f32( __addr, __value)
-#define vrndxq_f16(__a) __arm_vrndxq_f16(__a)
-#define vrndxq_f32(__a) __arm_vrndxq_f32(__a)
-#define vrndq_f16(__a) __arm_vrndq_f16(__a)
-#define vrndq_f32(__a) __arm_vrndq_f32(__a)
-#define vrndpq_f16(__a) __arm_vrndpq_f16(__a)
-#define vrndpq_f32(__a) __arm_vrndpq_f32(__a)
-#define vrndnq_f16(__a) __arm_vrndnq_f16(__a)
-#define vrndnq_f32(__a) __arm_vrndnq_f32(__a)
-#define vrndmq_f16(__a) __arm_vrndmq_f16(__a)
-#define vrndmq_f32(__a) __arm_vrndmq_f32(__a)
-#define vrndaq_f16(__a) __arm_vrndaq_f16(__a)
-#define vrndaq_f32(__a) __arm_vrndaq_f32(__a)
#define vrev64q_f16(__a) __arm_vrev64q_f16(__a)
#define vrev64q_f32(__a) __arm_vrev64q_f32(__a)
#define vdupq_n_f16(__a) __arm_vdupq_n_f16(__a)
@@ -1093,12 +1063,6 @@
#define vqmovntq_m_s16(__a, __b, __p) __arm_vqmovntq_m_s16(__a, __b, __p)
#define vrev32q_m_s8(__inactive, __a, __p) __arm_vrev32q_m_s8(__inactive, __a, __p)
#define vrev64q_m_f16(__inactive, __a, __p) __arm_vrev64q_m_f16(__inactive, __a, __p)
-#define vrndaq_m_f16(__inactive, __a, __p) __arm_vrndaq_m_f16(__inactive, __a, __p)
-#define vrndmq_m_f16(__inactive, __a, __p) __arm_vrndmq_m_f16(__inactive, __a, __p)
-#define vrndnq_m_f16(__inactive, __a, __p) __arm_vrndnq_m_f16(__inactive, __a, __p)
-#define vrndpq_m_f16(__inactive, __a, __p) __arm_vrndpq_m_f16(__inactive, __a, __p)
-#define vrndq_m_f16(__inactive, __a, __p) __arm_vrndq_m_f16(__inactive, __a, __p)
-#define vrndxq_m_f16(__inactive, __a, __p) __arm_vrndxq_m_f16(__inactive, __a, __p)
#define vcmpeqq_m_n_f16(__a, __b, __p) __arm_vcmpeqq_m_n_f16(__a, __b, __p)
#define vcmpgeq_m_f16(__a, __b, __p) __arm_vcmpgeq_m_f16(__a, __b, __p)
#define vcmpgeq_m_n_f16(__a, __b, __p) __arm_vcmpgeq_m_n_f16(__a, __b, __p)
@@ -1163,12 +1127,6 @@
#define vqmovntq_m_s32(__a, __b, __p) __arm_vqmovntq_m_s32(__a, __b, __p)
#define vrev32q_m_s16(__inactive, __a, __p) __arm_vrev32q_m_s16(__inactive, __a, __p)
#define vrev64q_m_f32(__inactive, __a, __p) __arm_vrev64q_m_f32(__inactive, __a, __p)
-#define vrndaq_m_f32(__inactive, __a, __p) __arm_vrndaq_m_f32(__inactive, __a, __p)
-#define vrndmq_m_f32(__inactive, __a, __p) __arm_vrndmq_m_f32(__inactive, __a, __p)
-#define vrndnq_m_f32(__inactive, __a, __p) __arm_vrndnq_m_f32(__inactive, __a, __p)
-#define vrndpq_m_f32(__inactive, __a, __p) __arm_vrndpq_m_f32(__inactive, __a, __p)
-#define vrndq_m_f32(__inactive, __a, __p) __arm_vrndq_m_f32(__inactive, __a, __p)
-#define vrndxq_m_f32(__inactive, __a, __p) __arm_vrndxq_m_f32(__inactive, __a, __p)
#define vcmpeqq_m_n_f32(__a, __b, __p) __arm_vcmpeqq_m_n_f32(__a, __b, __p)
#define vcmpgeq_m_f32(__a, __b, __p) __arm_vcmpgeq_m_f32(__a, __b, __p)
#define vcmpgeq_m_n_f32(__a, __b, __p) __arm_vcmpgeq_m_n_f32(__a, __b, __p)
@@ -1855,18 +1813,6 @@
#define vcvtq_x_n_s32_f32(__a, __imm6, __p) __arm_vcvtq_x_n_s32_f32(__a, __imm6, __p)
#define vcvtq_x_n_u16_f16(__a, __imm6, __p) __arm_vcvtq_x_n_u16_f16(__a, __imm6, __p)
#define vcvtq_x_n_u32_f32(__a, __imm6, __p) __arm_vcvtq_x_n_u32_f32(__a, __imm6, __p)
-#define vrndq_x_f16(__a, __p) __arm_vrndq_x_f16(__a, __p)
-#define vrndq_x_f32(__a, __p) __arm_vrndq_x_f32(__a, __p)
-#define vrndnq_x_f16(__a, __p) __arm_vrndnq_x_f16(__a, __p)
-#define vrndnq_x_f32(__a, __p) __arm_vrndnq_x_f32(__a, __p)
-#define vrndmq_x_f16(__a, __p) __arm_vrndmq_x_f16(__a, __p)
-#define vrndmq_x_f32(__a, __p) __arm_vrndmq_x_f32(__a, __p)
-#define vrndpq_x_f16(__a, __p) __arm_vrndpq_x_f16(__a, __p)
-#define vrndpq_x_f32(__a, __p) __arm_vrndpq_x_f32(__a, __p)
-#define vrndaq_x_f16(__a, __p) __arm_vrndaq_x_f16(__a, __p)
-#define vrndaq_x_f32(__a, __p) __arm_vrndaq_x_f32(__a, __p)
-#define vrndxq_x_f16(__a, __p) __arm_vrndxq_x_f16(__a, __p)
-#define vrndxq_x_f32(__a, __p) __arm_vrndxq_x_f32(__a, __p)
#define vbicq_x_f16(__a, __b, __p) __arm_vbicq_x_f16(__a, __b, __p)
#define vbicq_x_f32(__a, __b, __p) __arm_vbicq_x_f32(__a, __b, __p)
#define vbrsrq_x_n_f16(__a, __b, __p) __arm_vbrsrq_x_n_f16(__a, __b, __p)
@@ -10522,90 +10468,6 @@ __arm_vst4q_f32 (float32_t * __addr, float32x4x4_t __value)
__builtin_mve_vst4qv4sf (__addr, __rv.__o);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndxq_f16 (float16x8_t __a)
-{
- return __builtin_mve_vrndxq_fv8hf (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndxq_f32 (float32x4_t __a)
-{
- return __builtin_mve_vrndxq_fv4sf (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndq_f16 (float16x8_t __a)
-{
- return __builtin_mve_vrndq_fv8hf (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndq_f32 (float32x4_t __a)
-{
- return __builtin_mve_vrndq_fv4sf (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndpq_f16 (float16x8_t __a)
-{
- return __builtin_mve_vrndpq_fv8hf (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndpq_f32 (float32x4_t __a)
-{
- return __builtin_mve_vrndpq_fv4sf (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndnq_f16 (float16x8_t __a)
-{
- return __builtin_mve_vrndnq_fv8hf (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndnq_f32 (float32x4_t __a)
-{
- return __builtin_mve_vrndnq_fv4sf (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndmq_f16 (float16x8_t __a)
-{
- return __builtin_mve_vrndmq_fv8hf (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndmq_f32 (float32x4_t __a)
-{
- return __builtin_mve_vrndmq_fv4sf (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndaq_f16 (float16x8_t __a)
-{
- return __builtin_mve_vrndaq_fv8hf (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndaq_f32 (float32x4_t __a)
-{
- return __builtin_mve_vrndaq_fv4sf (__a);
-}
-
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev64q_f16 (float16x8_t __a)
@@ -11552,48 +11414,6 @@ __arm_vrev64q_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
return __builtin_mve_vrev64q_m_fv8hf (__inactive, __a, __p);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndaq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndaq_m_fv8hf (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndmq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndmq_m_fv8hf (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndnq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndnq_m_fv8hf (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndpq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndpq_m_fv8hf (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndq_m_fv8hf (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndxq_m_f16 (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndxq_m_fv8hf (__inactive, __a, __p);
-}
-
__extension__ extern __inline mve_pred16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmpeqq_m_n_f16 (float16x8_t __a, float16_t __b, mve_pred16_t __p)
@@ -11846,48 +11666,6 @@ __arm_vrev64q_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
return __builtin_mve_vrev64q_m_fv4sf (__inactive, __a, __p);
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndaq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndaq_m_fv4sf (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndmq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndmq_m_fv4sf (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndnq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndnq_m_fv4sf (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndpq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndpq_m_fv4sf (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndq_m_fv4sf (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndxq_m_f32 (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndxq_m_fv4sf (__inactive, __a, __p);
-}
-
__extension__ extern __inline mve_pred16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmpeqq_m_n_f32 (float32x4_t __a, float32_t __b, mve_pred16_t __p)
@@ -12937,90 +12715,6 @@ __arm_vcvtq_x_n_u32_f32 (float32x4_t __a, const int __imm6, mve_pred16_t __p)
return __builtin_mve_vcvtq_m_n_from_f_uv4si (__arm_vuninitializedq_u32 (), __a, __imm6, __p);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndq_x_f16 (float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndq_x_f32 (float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndnq_x_f16 (float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndnq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndnq_x_f32 (float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndnq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndmq_x_f16 (float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndmq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndmq_x_f32 (float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndmq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndpq_x_f16 (float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndpq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndpq_x_f32 (float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndpq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndaq_x_f16 (float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndaq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndaq_x_f32 (float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndaq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndxq_x_f16 (float16x8_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndxq_m_fv8hf (__arm_vuninitializedq_f16 (), __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndxq_x_f32 (float32x4_t __a, mve_pred16_t __p)
-{
- return __builtin_mve_vrndxq_m_fv4sf (__arm_vuninitializedq_f32 (), __a, __p);
-}
-
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbicq_x_f16 (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
@@ -20890,90 +20584,6 @@ __arm_vst4q (float32_t * __addr, float32x4x4_t __value)
__arm_vst4q_f32 (__addr, __value);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndxq (float16x8_t __a)
-{
- return __arm_vrndxq_f16 (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndxq (float32x4_t __a)
-{
- return __arm_vrndxq_f32 (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndq (float16x8_t __a)
-{
- return __arm_vrndq_f16 (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndq (float32x4_t __a)
-{
- return __arm_vrndq_f32 (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndpq (float16x8_t __a)
-{
- return __arm_vrndpq_f16 (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndpq (float32x4_t __a)
-{
- return __arm_vrndpq_f32 (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndnq (float16x8_t __a)
-{
- return __arm_vrndnq_f16 (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndnq (float32x4_t __a)
-{
- return __arm_vrndnq_f32 (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndmq (float16x8_t __a)
-{
- return __arm_vrndmq_f16 (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndmq (float32x4_t __a)
-{
- return __arm_vrndmq_f32 (__a);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndaq (float16x8_t __a)
-{
- return __arm_vrndaq_f16 (__a);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndaq (float32x4_t __a)
-{
- return __arm_vrndaq_f32 (__a);
-}
-
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev64q (float16x8_t __a)
@@ -21737,48 +21347,6 @@ __arm_vrev64q_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
return __arm_vrev64q_m_f16 (__inactive, __a, __p);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndaq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrndaq_m_f16 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndmq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrndmq_m_f16 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndnq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrndnq_m_f16 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndpq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrndpq_m_f16 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrndq_m_f16 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndxq_m (float16x8_t __inactive, float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrndxq_m_f16 (__inactive, __a, __p);
-}
-
__extension__ extern __inline mve_pred16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmpeqq_m (float16x8_t __a, float16_t __b, mve_pred16_t __p)
@@ -22031,48 +21599,6 @@ __arm_vrev64q_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
return __arm_vrev64q_m_f32 (__inactive, __a, __p);
}
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndaq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vrndaq_m_f32 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndmq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vrndmq_m_f32 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndnq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vrndnq_m_f32 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndpq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vrndpq_m_f32 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vrndq_m_f32 (__inactive, __a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndxq_m (float32x4_t __inactive, float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vrndxq_m_f32 (__inactive, __a, __p);
-}
-
__extension__ extern __inline mve_pred16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vcmpeqq_m (float32x4_t __a, float32_t __b, mve_pred16_t __p)
@@ -22864,90 +22390,6 @@ __arm_vcvtq_x_n (uint32x4_t __a, const int __imm6, mve_pred16_t __p)
return __arm_vcvtq_x_n_f32_u32 (__a, __imm6, __p);
}
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndq_x (float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrndq_x_f16 (__a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndq_x (float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vrndq_x_f32 (__a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndnq_x (float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrndnq_x_f16 (__a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndnq_x (float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vrndnq_x_f32 (__a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndmq_x (float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrndmq_x_f16 (__a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndmq_x (float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vrndmq_x_f32 (__a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndpq_x (float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrndpq_x_f16 (__a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndpq_x (float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vrndpq_x_f32 (__a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndaq_x (float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrndaq_x_f16 (__a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndaq_x (float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vrndaq_x_f32 (__a, __p);
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndxq_x (float16x8_t __a, mve_pred16_t __p)
-{
- return __arm_vrndxq_x_f16 (__a, __p);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vrndxq_x (float32x4_t __a, mve_pred16_t __p)
-{
- return __arm_vrndxq_x_f32 (__a, __p);
-}
-
__extension__ extern __inline float16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbicq_x (float16x8_t __a, float16x8_t __b, mve_pred16_t __p)
@@ -23384,36 +22826,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_float16_t_ptr][__ARM_mve_type_float16x8x4_t]: __arm_vst4q_f16 (__ARM_mve_coerce(__p0, float16_t *), __ARM_mve_coerce(__p1, float16x8x4_t)), \
int (*)[__ARM_mve_type_float32_t_ptr][__ARM_mve_type_float32x4x4_t]: __arm_vst4q_f32 (__ARM_mve_coerce(__p0, float32_t *), __ARM_mve_coerce(__p1, float32x4x4_t)));})
-#define __arm_vrndxq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndxq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndxq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
-
-#define __arm_vrndq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
-
-#define __arm_vrndpq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndpq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndpq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
-
-#define __arm_vrndnq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndnq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndnq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
-
-#define __arm_vrndmq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndmq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndmq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
-
-#define __arm_vrndaq(p0) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndaq_f16 (__ARM_mve_coerce(__p0, float16x8_t)), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndaq_f32 (__ARM_mve_coerce(__p0, float32x4_t)));})
-
#define __arm_vrev64q(p0) ({ __typeof(p0) __p0 = (p0); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev64q_s8 (__ARM_mve_coerce(__p0, int8x16_t)), \
@@ -24137,24 +23549,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vcmlaq_rot90_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), __ARM_mve_coerce(__p2, float16x8_t)), \
int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vcmlaq_rot90_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __ARM_mve_coerce(__p2, float32x4_t)));})
-#define __arm_vrndxq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrndxq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrndxq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
-
-#define __arm_vrndq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrndq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrndq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
-
-#define __arm_vrndpq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrndpq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrndpq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
-
#define __arm_vcmpgtq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -24336,25 +23730,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_p_f16 (__ARM_mve_coerce2(p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_p_f32 (__ARM_mve_coerce2(p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
-#define __arm_vrndnq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- __typeof(p2) __p2 = (p2); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrndnq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrndnq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), __p2));})
-
-#define __arm_vrndaq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrndaq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrndaq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
-
-#define __arm_vrndmq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_float16x8_t][__ARM_mve_type_float16x8_t]: __arm_vrndmq_m_f16 (__ARM_mve_coerce(__p0, float16x8_t), __ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t][__ARM_mve_type_float32x4_t]: __arm_vrndmq_m_f32 (__ARM_mve_coerce(__p0, float32x4_t), __ARM_mve_coerce(__p1, float32x4_t), p2));})
-
#define __arm_vrev64q_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -25043,36 +24418,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_float16x8_t]: __arm_vrev64q_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
int (*)[__ARM_mve_type_float32x4_t]: __arm_vrev64q_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
-#define __arm_vrndaq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndaq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndaq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
-
-#define __arm_vrndmq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndmq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndmq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
-
-#define __arm_vrndnq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndnq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndnq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
-
-#define __arm_vrndpq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndpq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndpq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
-
-#define __arm_vrndq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
-
-#define __arm_vrndxq_x(p1,p2) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_float16x8_t]: __arm_vrndxq_x_f16 (__ARM_mve_coerce(__p1, float16x8_t), p2), \
- int (*)[__ARM_mve_type_float32x4_t]: __arm_vrndxq_x_f32 (__ARM_mve_coerce(__p1, float32x4_t), p2));})
-
#define __arm_vcmulq_rot90_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
__typeof(p2) __p2 = (p2); \
_Generic( (int (*)[__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 05/10] arm: [MVE intrinsics] add binary_move_narrow and binary_move_narrow_unsigned shapes
2023-05-05 16:48 [PATCH 01/10] arm: [MVE intrinsics] add unary shape Christophe Lyon
` (2 preceding siblings ...)
2023-05-05 16:49 ` [PATCH 04/10] arm: [MVE intrinsics] rework vrndq vrndaq vrndmq vrndnq vrndpq vrndxq Christophe Lyon
@ 2023-05-05 16:49 ` Christophe Lyon
2023-05-05 16:49 ` [PATCH 06/10] arm: [MVE intrinsics] factorize vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq Christophe Lyon
` (5 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Christophe Lyon @ 2023-05-05 16:49 UTC (permalink / raw)
To: gcc-patches, kyrylo.tkachov, richard.earnshaw, richard.sandiford
Cc: Christophe Lyon
This patch adds the binary_move_narrow and binary_move_narrow_unsigned
shapes descriptions.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
(binary_move_narrow_unsigned): New.
* config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
(binary_move_narrow_unsigned): New.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 73 +++++++++++++++++++++++
gcc/config/arm/arm-mve-builtins-shapes.h | 2 +
2 files changed, 75 insertions(+)
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc b/gcc/config/arm/arm-mve-builtins-shapes.cc
index 7d39cf79aec..e26604510a2 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.cc
+++ b/gcc/config/arm/arm-mve-builtins-shapes.cc
@@ -401,6 +401,79 @@ struct binary_rshift_def : public overloaded_base<0>
};
SHAPE (binary_rshift)
+/* <T0:half>_t vfoo[_t0](<T0:half>_t, <T0>_t)
+
+ Example: vmovnbq.
+ int8x16_t [__arm_]vmovnbq[_s16](int8x16_t a, int16x8_t b)
+ int8x16_t [__arm_]vmovnbq_m[_s16](int8x16_t a, int16x8_t b, mve_pred16_t p) */
+struct binary_move_narrow_def : public overloaded_base<0>
+{
+ void
+ build (function_builder &b, const function_group_info &group,
+ bool preserve_user_namespace) const override
+ {
+ b.add_overloaded_functions (group, MODE_none, preserve_user_namespace);
+ build_all (b, "vh0,vh0,v0", group, MODE_none, preserve_user_namespace);
+ }
+
+ tree
+ resolve (function_resolver &r) const override
+ {
+ unsigned int i, nargs;
+ type_suffix_index type;
+ if (!r.check_gp_argument (2, i, nargs)
+ || (type = r.infer_vector_type (1)) == NUM_TYPE_SUFFIXES)
+ return error_mark_node;
+
+ type_suffix_index narrow_suffix
+ = find_type_suffix (type_suffixes[type].tclass,
+ type_suffixes[type].element_bits / 2);
+
+
+ if (!r.require_matching_vector_type (0, narrow_suffix))
+ return error_mark_node;
+
+ return r.resolve_to (r.mode_suffix_id, type);
+ }
+};
+SHAPE (binary_move_narrow)
+
+/* <uT0:half>_t vfoo[_t0](<uT0:half>_t, <T0>_t)
+
+ Example: vqmovunbq.
+ uint8x16_t [__arm_]vqmovunbq[_s16](uint8x16_t a, int16x8_t b)
+ uint8x16_t [__arm_]vqmovunbq_m[_s16](uint8x16_t a, int16x8_t b, mve_pred16_t p) */
+struct binary_move_narrow_unsigned_def : public overloaded_base<0>
+{
+ void
+ build (function_builder &b, const function_group_info &group,
+ bool preserve_user_namespace) const override
+ {
+ b.add_overloaded_functions (group, MODE_none, preserve_user_namespace);
+ build_all (b, "vhu0,vhu0,v0", group, MODE_none, preserve_user_namespace);
+ }
+
+ tree
+ resolve (function_resolver &r) const override
+ {
+ unsigned int i, nargs;
+ type_suffix_index type;
+ if (!r.check_gp_argument (2, i, nargs)
+ || (type = r.infer_vector_type (1)) == NUM_TYPE_SUFFIXES)
+ return error_mark_node;
+
+ type_suffix_index narrow_suffix
+ = find_type_suffix (TYPE_unsigned,
+ type_suffixes[type].element_bits / 2);
+
+ if (!r.require_matching_vector_type (0, narrow_suffix))
+ return error_mark_node;
+
+ return r.resolve_to (r.mode_suffix_id, type);
+ }
+};
+SHAPE (binary_move_narrow_unsigned)
+
/* <T0>_t vfoo[_t0](<T0>_t, <T0>_t)
<T0>_t vfoo[_n_t0](<T0>_t, <S0>_t)
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.h b/gcc/config/arm/arm-mve-builtins-shapes.h
index bd7e11b89f6..825e1bb2a3c 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.h
+++ b/gcc/config/arm/arm-mve-builtins-shapes.h
@@ -37,6 +37,8 @@ namespace arm_mve
extern const function_shape *const binary;
extern const function_shape *const binary_lshift;
extern const function_shape *const binary_lshift_r;
+ extern const function_shape *const binary_move_narrow;
+ extern const function_shape *const binary_move_narrow_unsigned;
extern const function_shape *const binary_opt_n;
extern const function_shape *const binary_orrq;
extern const function_shape *const binary_round_lshift;
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 06/10] arm: [MVE intrinsics] factorize vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq
2023-05-05 16:48 [PATCH 01/10] arm: [MVE intrinsics] add unary shape Christophe Lyon
` (3 preceding siblings ...)
2023-05-05 16:49 ` [PATCH 05/10] arm: [MVE intrinsics] add binary_move_narrow and binary_move_narrow_unsigned shapes Christophe Lyon
@ 2023-05-05 16:49 ` Christophe Lyon
2023-05-05 16:49 ` [PATCH 07/10] arm: [MVE intrinsics] rework " Christophe Lyon
` (4 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Christophe Lyon @ 2023-05-05 16:49 UTC (permalink / raw)
To: gcc-patches, kyrylo.tkachov, richard.earnshaw, richard.sandiford
Cc: Christophe Lyon
Factorize vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq so
that they use the same pattern.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
(mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
vqmovunt.
(isu): Likewise.
(supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
VQMOVUNTQ_S.
* config/arm/mve.md (mve_vmovnbq_<supf><mode>)
(mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
(mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
(mve_vqmovuntq_s<mode>): Merge into ...
(@mve_<mve_insn>q_<supf><mode>): ... this.
(mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
(mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
(mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
(@mve_<mve_insn>q_m_<supf><mode>): ... this.
---
gcc/config/arm/iterators.md | 46 +++++++++
gcc/config/arm/mve.md | 180 ++++--------------------------------
2 files changed, 64 insertions(+), 162 deletions(-)
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index 0b4f69ee874..20735284979 100644
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -578,6 +578,24 @@ (define_int_iterator MVE_FP_CREATE_ONLY [
VCREATEQ_F
])
+(define_int_iterator MVE_MOVN [
+ VMOVNBQ_S VMOVNBQ_U
+ VMOVNTQ_S VMOVNTQ_U
+ VQMOVNBQ_S VQMOVNBQ_U
+ VQMOVNTQ_S VQMOVNTQ_U
+ VQMOVUNBQ_S
+ VQMOVUNTQ_S
+ ])
+
+(define_int_iterator MVE_MOVN_M [
+ VMOVNBQ_M_S VMOVNBQ_M_U
+ VMOVNTQ_M_S VMOVNTQ_M_U
+ VQMOVNBQ_M_S VQMOVNBQ_M_U
+ VQMOVNTQ_M_S VQMOVNTQ_M_U
+ VQMOVUNBQ_M_S
+ VQMOVUNTQ_M_S
+ ])
+
(define_code_attr mve_addsubmul [
(minus "vsub")
(mult "vmul")
@@ -613,6 +631,10 @@ (define_int_attr mve_insn [
(VMINQ_M_S "vmin") (VMINQ_M_U "vmin")
(VMLAQ_M_N_S "vmla") (VMLAQ_M_N_U "vmla")
(VMLASQ_M_N_S "vmlas") (VMLASQ_M_N_U "vmlas")
+ (VMOVNBQ_M_S "vmovnb") (VMOVNBQ_M_U "vmovnb")
+ (VMOVNBQ_S "vmovnb") (VMOVNBQ_U "vmovnb")
+ (VMOVNTQ_M_S "vmovnt") (VMOVNTQ_M_U "vmovnt")
+ (VMOVNTQ_S "vmovnt") (VMOVNTQ_U "vmovnt")
(VMULHQ_M_S "vmulh") (VMULHQ_M_U "vmulh")
(VMULHQ_S "vmulh") (VMULHQ_U "vmulh")
(VMULQ_M_N_S "vmul") (VMULQ_M_N_U "vmul") (VMULQ_M_N_F "vmul")
@@ -639,6 +661,14 @@ (define_int_attr mve_insn [
(VQDMULHQ_M_S "vqdmulh")
(VQDMULHQ_N_S "vqdmulh")
(VQDMULHQ_S "vqdmulh")
+ (VQMOVNBQ_M_S "vqmovnb") (VQMOVNBQ_M_U "vqmovnb")
+ (VQMOVNBQ_S "vqmovnb") (VQMOVNBQ_U "vqmovnb")
+ (VQMOVNTQ_M_S "vqmovnt") (VQMOVNTQ_M_U "vqmovnt")
+ (VQMOVNTQ_S "vqmovnt") (VQMOVNTQ_U "vqmovnt")
+ (VQMOVUNBQ_M_S "vqmovunb")
+ (VQMOVUNBQ_S "vqmovunb")
+ (VQMOVUNTQ_M_S "vqmovunt")
+ (VQMOVUNTQ_S "vqmovunt")
(VQNEGQ_M_S "vqneg")
(VQNEGQ_S "vqneg")
(VQRDMLADHQ_M_S "vqrdmladh")
@@ -723,8 +753,20 @@ (define_int_attr isu [
(VCLSQ_M_S "s")
(VCLZQ_M_S "i")
(VCLZQ_M_U "i")
+ (VMOVNBQ_M_S "i") (VMOVNBQ_M_U "i")
+ (VMOVNBQ_S "i") (VMOVNBQ_U "i")
+ (VMOVNTQ_M_S "i") (VMOVNTQ_M_U "i")
+ (VMOVNTQ_S "i") (VMOVNTQ_U "i")
(VNEGQ_M_S "s")
(VQABSQ_M_S "s")
+ (VQMOVNBQ_M_S "s") (VQMOVNBQ_M_U "u")
+ (VQMOVNBQ_S "s") (VQMOVNBQ_U "u")
+ (VQMOVNTQ_M_S "s") (VQMOVNTQ_M_U "u")
+ (VQMOVNTQ_S "s") (VQMOVNTQ_U "u")
+ (VQMOVUNBQ_M_S "s")
+ (VQMOVUNBQ_S "s")
+ (VQMOVUNTQ_M_S "s")
+ (VQMOVUNTQ_S "s")
(VQNEGQ_M_S "s")
(VQRSHRNBQ_M_N_S "s") (VQRSHRNBQ_M_N_U "u")
(VQRSHRNBQ_N_S "s") (VQRSHRNBQ_N_U "u")
@@ -1942,6 +1984,10 @@ (define_int_attr supf [(VCVTQ_TO_F_S "s") (VCVTQ_TO_F_U "u") (VREV16Q_S "s")
(VCLSQ_S "s")
(VQABSQ_S "s")
(VQNEGQ_S "s")
+ (VQMOVUNBQ_M_S "s")
+ (VQMOVUNBQ_S "s")
+ (VQMOVUNTQ_M_S "s")
+ (VQMOVUNTQ_S "s")
])
;; Both kinds of return insn.
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 7bf344d547a..2273078807b 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -1645,32 +1645,22 @@ (define_insn "mve_vmlsldavxq_s<mode>"
])
;;
-;; [vmovnbq_u, vmovnbq_s])
+;; [vmovnbq_u, vmovnbq_s]
+;; [vmovntq_s, vmovntq_u]
+;; [vqmovnbq_u, vqmovnbq_s]
+;; [vqmovntq_u, vqmovntq_s]
+;; [vqmovunbq_s]
+;; [vqmovuntq_s]
;;
-(define_insn "mve_vmovnbq_<supf><mode>"
- [
- (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
- (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
- (match_operand:MVE_5 2 "s_register_operand" "w")]
- VMOVNBQ))
- ]
- "TARGET_HAVE_MVE"
- "vmovnb.i%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vmovntq_s, vmovntq_u])
-;;
-(define_insn "mve_vmovntq_<supf><mode>"
+(define_insn "@mve_<mve_insn>q_<supf><mode>"
[
(set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
(match_operand:MVE_5 2 "s_register_operand" "w")]
- VMOVNTQ))
+ MVE_MOVN))
]
"TARGET_HAVE_MVE"
- "vmovnt.i%#<V_sz_elem> %q0, %q2"
+ "<mve_insn>.<isu>%#<V_sz_elem>\t%q0, %q2"
[(set_attr "type" "mve_move")
])
@@ -1794,66 +1784,6 @@ (define_insn "mve_vqdmulltq_s<mode>"
[(set_attr "type" "mve_move")
])
-;;
-;; [vqmovnbq_u, vqmovnbq_s])
-;;
-(define_insn "mve_vqmovnbq_<supf><mode>"
- [
- (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
- (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
- (match_operand:MVE_5 2 "s_register_operand" "w")]
- VQMOVNBQ))
- ]
- "TARGET_HAVE_MVE"
- "vqmovnb.<supf>%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vqmovntq_u, vqmovntq_s])
-;;
-(define_insn "mve_vqmovntq_<supf><mode>"
- [
- (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
- (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
- (match_operand:MVE_5 2 "s_register_operand" "w")]
- VQMOVNTQ))
- ]
- "TARGET_HAVE_MVE"
- "vqmovnt.<supf>%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vqmovunbq_s])
-;;
-(define_insn "mve_vqmovunbq_s<mode>"
- [
- (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
- (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
- (match_operand:MVE_5 2 "s_register_operand" "w")]
- VQMOVUNBQ_S))
- ]
- "TARGET_HAVE_MVE"
- "vqmovunb.s%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vqmovuntq_s])
-;;
-(define_insn "mve_vqmovuntq_s<mode>"
- [
- (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
- (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
- (match_operand:MVE_5 2 "s_register_operand" "w")]
- VQMOVUNTQ_S))
- ]
- "TARGET_HAVE_MVE"
- "vqmovunt.s%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
-])
-
;;
;; [vrmlaldavhxq_s])
;;
@@ -3620,35 +3550,25 @@ (define_insn "mve_vmovltq_m_<supf><mode>"
"vpst\;vmovltt.<supf>%#<V_sz_elem> %q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
-;;
-;; [vmovnbq_m_u, vmovnbq_m_s])
-;;
-(define_insn "mve_vmovnbq_m_<supf><mode>"
- [
- (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
- (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
- (match_operand:MVE_5 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VMOVNBQ_M))
- ]
- "TARGET_HAVE_MVE"
- "vpst\;vmovnbt.i%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
;;
-;; [vmovntq_m_u, vmovntq_m_s])
+;; [vmovnbq_m_u, vmovnbq_m_s]
+;; [vmovntq_m_u, vmovntq_m_s]
+;; [vqmovnbq_m_s, vqmovnbq_m_u]
+;; [vqmovntq_m_u, vqmovntq_m_s]
+;; [vqmovunbq_m_s]
+;; [vqmovuntq_m_s]
;;
-(define_insn "mve_vmovntq_m_<supf><mode>"
+(define_insn "@mve_<mve_insn>q_m_<supf><mode>"
[
(set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
(unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
(match_operand:MVE_5 2 "s_register_operand" "w")
(match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VMOVNTQ_M))
+ MVE_MOVN_M))
]
"TARGET_HAVE_MVE"
- "vpst\;vmovntt.i%#<V_sz_elem> %q0, %q2"
+ "vpst\;<mve_insn>t.<isu>%#<V_sz_elem>\t%q0, %q2"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
@@ -3701,70 +3621,6 @@ (define_insn "@mve_vpselq_f<mode>"
[(set_attr "type" "mve_move")
])
-;;
-;; [vqmovnbq_m_s, vqmovnbq_m_u])
-;;
-(define_insn "mve_vqmovnbq_m_<supf><mode>"
- [
- (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
- (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
- (match_operand:MVE_5 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VQMOVNBQ_M))
- ]
- "TARGET_HAVE_MVE"
- "vpst\;vqmovnbt.<supf>%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
-;;
-;; [vqmovntq_m_u, vqmovntq_m_s])
-;;
-(define_insn "mve_vqmovntq_m_<supf><mode>"
- [
- (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
- (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
- (match_operand:MVE_5 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VQMOVNTQ_M))
- ]
- "TARGET_HAVE_MVE"
- "vpst\;vqmovntt.<supf>%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
-;;
-;; [vqmovunbq_m_s])
-;;
-(define_insn "mve_vqmovunbq_m_s<mode>"
- [
- (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
- (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
- (match_operand:MVE_5 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VQMOVUNBQ_M_S))
- ]
- "TARGET_HAVE_MVE"
- "vpst\;vqmovunbt.s%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
-;;
-;; [vqmovuntq_m_s])
-;;
-(define_insn "mve_vqmovuntq_m_s<mode>"
- [
- (set (match_operand:<V_narrow_pack> 0 "s_register_operand" "=w")
- (unspec:<V_narrow_pack> [(match_operand:<V_narrow_pack> 1 "s_register_operand" "0")
- (match_operand:MVE_5 2 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
- VQMOVUNTQ_M_S))
- ]
- "TARGET_HAVE_MVE"
- "vpst\;vqmovuntt.s%#<V_sz_elem> %q0, %q2"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
;;
;; [vrev32q_m_f])
;;
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 07/10] arm: [MVE intrinsics] rework vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq
2023-05-05 16:48 [PATCH 01/10] arm: [MVE intrinsics] add unary shape Christophe Lyon
` (4 preceding siblings ...)
2023-05-05 16:49 ` [PATCH 06/10] arm: [MVE intrinsics] factorize vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq Christophe Lyon
@ 2023-05-05 16:49 ` Christophe Lyon
2023-05-05 16:49 ` [PATCH 08/10] arm: [MVE intrinsics] add binary_widen_n shape Christophe Lyon
` (3 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Christophe Lyon @ 2023-05-05 16:49 UTC (permalink / raw)
To: gcc-patches, kyrylo.tkachov, richard.earnshaw, richard.sandiford
Cc: Christophe Lyon
Implement vmovnbq, vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq
using the new MVE builtins framework.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
(vqmovntq, vqmovunbq, vqmovuntq): New.
* config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
(vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
* config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
(vqmovntq, vqmovunbq, vqmovuntq): New.
* config/arm/arm-mve-builtins.cc
(function_instance::has_inactive_argument): Handle vmovnbq,
vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
* config/arm/arm_mve.h (vqmovntq): Remove.
(vqmovnbq): Remove.
(vqmovnbq_m): Remove.
(vqmovntq_m): Remove.
(vqmovntq_u16): Remove.
(vqmovnbq_u16): Remove.
(vqmovntq_s16): Remove.
(vqmovnbq_s16): Remove.
(vqmovntq_u32): Remove.
(vqmovnbq_u32): Remove.
(vqmovntq_s32): Remove.
(vqmovnbq_s32): Remove.
(vqmovnbq_m_s16): Remove.
(vqmovntq_m_s16): Remove.
(vqmovnbq_m_u16): Remove.
(vqmovntq_m_u16): Remove.
(vqmovnbq_m_s32): Remove.
(vqmovntq_m_s32): Remove.
(vqmovnbq_m_u32): Remove.
(vqmovntq_m_u32): Remove.
(__arm_vqmovntq_u16): Remove.
(__arm_vqmovnbq_u16): Remove.
(__arm_vqmovntq_s16): Remove.
(__arm_vqmovnbq_s16): Remove.
(__arm_vqmovntq_u32): Remove.
(__arm_vqmovnbq_u32): Remove.
(__arm_vqmovntq_s32): Remove.
(__arm_vqmovnbq_s32): Remove.
(__arm_vqmovnbq_m_s16): Remove.
(__arm_vqmovntq_m_s16): Remove.
(__arm_vqmovnbq_m_u16): Remove.
(__arm_vqmovntq_m_u16): Remove.
(__arm_vqmovnbq_m_s32): Remove.
(__arm_vqmovntq_m_s32): Remove.
(__arm_vqmovnbq_m_u32): Remove.
(__arm_vqmovntq_m_u32): Remove.
(__arm_vqmovntq): Remove.
(__arm_vqmovnbq): Remove.
(__arm_vqmovnbq_m): Remove.
(__arm_vqmovntq_m): Remove.
(vmovntq): Remove.
(vmovnbq): Remove.
(vmovnbq_m): Remove.
(vmovntq_m): Remove.
(vmovntq_u16): Remove.
(vmovnbq_u16): Remove.
(vmovntq_s16): Remove.
(vmovnbq_s16): Remove.
(vmovntq_u32): Remove.
(vmovnbq_u32): Remove.
(vmovntq_s32): Remove.
(vmovnbq_s32): Remove.
(vmovnbq_m_s16): Remove.
(vmovntq_m_s16): Remove.
(vmovnbq_m_u16): Remove.
(vmovntq_m_u16): Remove.
(vmovnbq_m_s32): Remove.
(vmovntq_m_s32): Remove.
(vmovnbq_m_u32): Remove.
(vmovntq_m_u32): Remove.
(__arm_vmovntq_u16): Remove.
(__arm_vmovnbq_u16): Remove.
(__arm_vmovntq_s16): Remove.
(__arm_vmovnbq_s16): Remove.
(__arm_vmovntq_u32): Remove.
(__arm_vmovnbq_u32): Remove.
(__arm_vmovntq_s32): Remove.
(__arm_vmovnbq_s32): Remove.
(__arm_vmovnbq_m_s16): Remove.
(__arm_vmovntq_m_s16): Remove.
(__arm_vmovnbq_m_u16): Remove.
(__arm_vmovntq_m_u16): Remove.
(__arm_vmovnbq_m_s32): Remove.
(__arm_vmovntq_m_s32): Remove.
(__arm_vmovnbq_m_u32): Remove.
(__arm_vmovntq_m_u32): Remove.
(__arm_vmovntq): Remove.
(__arm_vmovnbq): Remove.
(__arm_vmovnbq_m): Remove.
(__arm_vmovntq_m): Remove.
(vqmovuntq): Remove.
(vqmovunbq): Remove.
(vqmovunbq_m): Remove.
(vqmovuntq_m): Remove.
(vqmovuntq_s16): Remove.
(vqmovunbq_s16): Remove.
(vqmovuntq_s32): Remove.
(vqmovunbq_s32): Remove.
(vqmovunbq_m_s16): Remove.
(vqmovuntq_m_s16): Remove.
(vqmovunbq_m_s32): Remove.
(vqmovuntq_m_s32): Remove.
(__arm_vqmovuntq_s16): Remove.
(__arm_vqmovunbq_s16): Remove.
(__arm_vqmovuntq_s32): Remove.
(__arm_vqmovunbq_s32): Remove.
(__arm_vqmovunbq_m_s16): Remove.
(__arm_vqmovuntq_m_s16): Remove.
(__arm_vqmovunbq_m_s32): Remove.
(__arm_vqmovuntq_m_s32): Remove.
(__arm_vqmovuntq): Remove.
(__arm_vqmovunbq): Remove.
(__arm_vqmovunbq_m): Remove.
(__arm_vqmovuntq_m): Remove.
---
gcc/config/arm/arm-mve-builtins-base.cc | 6 +
gcc/config/arm/arm-mve-builtins-base.def | 6 +
gcc/config/arm/arm-mve-builtins-base.h | 8 +-
gcc/config/arm/arm-mve-builtins.cc | 6 +
gcc/config/arm/arm_mve.h | 788 -----------------------
5 files changed, 25 insertions(+), 789 deletions(-)
diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc
index 4cf4464a48e..1dae12b445b 100644
--- a/gcc/config/arm/arm-mve-builtins-base.cc
+++ b/gcc/config/arm/arm-mve-builtins-base.cc
@@ -224,12 +224,18 @@ FUNCTION_WITH_M_N_NO_F (vhaddq, VHADDQ)
FUNCTION_WITH_M_N_NO_F (vhsubq, VHSUBQ)
FUNCTION_WITH_RTX_M_NO_F (vmaxq, SMAX, UMAX, VMAXQ)
FUNCTION_WITH_RTX_M_NO_F (vminq, SMIN, UMIN, VMINQ)
+FUNCTION_WITHOUT_N_NO_F (vmovnbq, VMOVNBQ)
+FUNCTION_WITHOUT_N_NO_F (vmovntq, VMOVNTQ)
FUNCTION_WITHOUT_N_NO_F (vmulhq, VMULHQ)
FUNCTION_WITH_RTX_M_N (vmulq, MULT, VMULQ)
FUNCTION (vnegq, unspec_based_mve_function_exact_insn, (NEG, NEG, NEG, -1, -1, -1, VNEGQ_M_S, -1, VNEGQ_M_F, -1, -1, -1))
FUNCTION_WITH_RTX_M_N_NO_N_F (vorrq, IOR, VORRQ)
FUNCTION_WITHOUT_N_NO_U_F (vqabsq, VQABSQ)
FUNCTION_WITH_M_N_NO_F (vqaddq, VQADDQ)
+FUNCTION_WITHOUT_N_NO_F (vqmovnbq, VQMOVNBQ)
+FUNCTION_WITHOUT_N_NO_F (vqmovntq, VQMOVNTQ)
+FUNCTION_WITHOUT_N_NO_U_F (vqmovunbq, VQMOVUNBQ)
+FUNCTION_WITHOUT_N_NO_U_F (vqmovuntq, VQMOVUNTQ)
FUNCTION_WITH_M_N_NO_U_F (vqdmulhq, VQDMULHQ)
FUNCTION_WITHOUT_N_NO_U_F (vqnegq, VQNEGQ)
FUNCTION_WITH_M_N_NO_F (vqrshlq, VQRSHLQ)
diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def
index 2928a554a11..f868614fb6b 100644
--- a/gcc/config/arm/arm-mve-builtins-base.def
+++ b/gcc/config/arm/arm-mve-builtins-base.def
@@ -30,6 +30,8 @@ DEF_MVE_FUNCTION (vhaddq, binary_opt_n, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vhsubq, binary_opt_n, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vmaxq, binary, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vminq, binary, all_integer, mx_or_none)
+DEF_MVE_FUNCTION (vmovnbq, binary_move_narrow, integer_16_32, m_or_none)
+DEF_MVE_FUNCTION (vmovntq, binary_move_narrow, integer_16_32, m_or_none)
DEF_MVE_FUNCTION (vmulhq, binary, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vmulq, binary_opt_n, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vnegq, unary, all_signed, mx_or_none)
@@ -37,6 +39,10 @@ DEF_MVE_FUNCTION (vorrq, binary_orrq, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vqabsq, unary, all_signed, m_or_none)
DEF_MVE_FUNCTION (vqaddq, binary_opt_n, all_integer, m_or_none)
DEF_MVE_FUNCTION (vqdmulhq, binary_opt_n, all_signed, m_or_none)
+DEF_MVE_FUNCTION (vqmovnbq, binary_move_narrow, integer_16_32, m_or_none)
+DEF_MVE_FUNCTION (vqmovntq, binary_move_narrow, integer_16_32, m_or_none)
+DEF_MVE_FUNCTION (vqmovunbq, binary_move_narrow_unsigned, signed_16_32, m_or_none)
+DEF_MVE_FUNCTION (vqmovuntq, binary_move_narrow_unsigned, signed_16_32, m_or_none)
DEF_MVE_FUNCTION (vqnegq, unary, all_signed, m_or_none)
DEF_MVE_FUNCTION (vqrdmulhq, binary_opt_n, all_signed, m_or_none)
DEF_MVE_FUNCTION (vqrshlq, binary_round_lshift, all_integer, m_or_none)
diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h
index b432011978e..f4960cbbea2 100644
--- a/gcc/config/arm/arm-mve-builtins-base.h
+++ b/gcc/config/arm/arm-mve-builtins-base.h
@@ -35,6 +35,8 @@ extern const function_base *const vhaddq;
extern const function_base *const vhsubq;
extern const function_base *const vmaxq;
extern const function_base *const vminq;
+extern const function_base *const vmovnbq;
+extern const function_base *const vmovntq;
extern const function_base *const vmulhq;
extern const function_base *const vmulq;
extern const function_base *const vnegq;
@@ -42,6 +44,10 @@ extern const function_base *const vorrq;
extern const function_base *const vqabsq;
extern const function_base *const vqaddq;
extern const function_base *const vqdmulhq;
+extern const function_base *const vqmovnbq;
+extern const function_base *const vqmovntq;
+extern const function_base *const vqmovunbq;
+extern const function_base *const vqmovuntq;
extern const function_base *const vqnegq;
extern const function_base *const vqrdmulhq;
extern const function_base *const vqrshlq;
@@ -58,11 +64,11 @@ extern const function_base *const vqsubq;
extern const function_base *const vreinterpretq;
extern const function_base *const vrhaddq;
extern const function_base *const vrmulhq;
-extern const function_base *const vrndq;
extern const function_base *const vrndaq;
extern const function_base *const vrndmq;
extern const function_base *const vrndnq;
extern const function_base *const vrndpq;
+extern const function_base *const vrndq;
extern const function_base *const vrndxq;
extern const function_base *const vrshlq;
extern const function_base *const vrshrnbq;
diff --git a/gcc/config/arm/arm-mve-builtins.cc b/gcc/config/arm/arm-mve-builtins.cc
index 7c34d2a94de..38639f75785 100644
--- a/gcc/config/arm/arm-mve-builtins.cc
+++ b/gcc/config/arm/arm-mve-builtins.cc
@@ -670,6 +670,12 @@ function_instance::has_inactive_argument () const
return false;
if (mode_suffix_id == MODE_r
+ || base == functions::vmovnbq
+ || base == functions::vmovntq
+ || base == functions::vqmovnbq
+ || base == functions::vqmovntq
+ || base == functions::vqmovunbq
+ || base == functions::vqmovuntq
|| (base == functions::vorrq && mode_suffix_id == MODE_n)
|| (base == functions::vqrshlq && mode_suffix_id == MODE_n)
|| base == functions::vqrshrnbq
diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index aae1f8bf639..97f0ef93ee9 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -82,15 +82,9 @@
#define vmladavxq(__a, __b) __arm_vmladavxq(__a, __b)
#define vhcaddq_rot90(__a, __b) __arm_vhcaddq_rot90(__a, __b)
#define vhcaddq_rot270(__a, __b) __arm_vhcaddq_rot270(__a, __b)
-#define vqmovntq(__a, __b) __arm_vqmovntq(__a, __b)
-#define vqmovnbq(__a, __b) __arm_vqmovnbq(__a, __b)
#define vmulltq_poly(__a, __b) __arm_vmulltq_poly(__a, __b)
#define vmullbq_poly(__a, __b) __arm_vmullbq_poly(__a, __b)
-#define vmovntq(__a, __b) __arm_vmovntq(__a, __b)
-#define vmovnbq(__a, __b) __arm_vmovnbq(__a, __b)
#define vmlaldavq(__a, __b) __arm_vmlaldavq(__a, __b)
-#define vqmovuntq(__a, __b) __arm_vqmovuntq(__a, __b)
-#define vqmovunbq(__a, __b) __arm_vqmovunbq(__a, __b)
#define vshlltq(__a, __imm) __arm_vshlltq(__a, __imm)
#define vshllbq(__a, __imm) __arm_vshllbq(__a, __imm)
#define vqdmulltq(__a, __b) __arm_vqdmulltq(__a, __b)
@@ -170,13 +164,7 @@
#define vmlsldavxq_p(__a, __b, __p) __arm_vmlsldavxq_p(__a, __b, __p)
#define vmovlbq_m(__inactive, __a, __p) __arm_vmovlbq_m(__inactive, __a, __p)
#define vmovltq_m(__inactive, __a, __p) __arm_vmovltq_m(__inactive, __a, __p)
-#define vmovnbq_m(__a, __b, __p) __arm_vmovnbq_m(__a, __b, __p)
-#define vmovntq_m(__a, __b, __p) __arm_vmovntq_m(__a, __b, __p)
-#define vqmovnbq_m(__a, __b, __p) __arm_vqmovnbq_m(__a, __b, __p)
-#define vqmovntq_m(__a, __b, __p) __arm_vqmovntq_m(__a, __b, __p)
#define vrev32q_m(__inactive, __a, __p) __arm_vrev32q_m(__inactive, __a, __p)
-#define vqmovunbq_m(__a, __b, __p) __arm_vqmovunbq_m(__a, __b, __p)
-#define vqmovuntq_m(__a, __b, __p) __arm_vqmovuntq_m(__a, __b, __p)
#define vsriq_m(__a, __b, __imm, __p) __arm_vsriq_m(__a, __b, __imm, __p)
#define vqshluq_m(__inactive, __a, __imm, __p) __arm_vqshluq_m(__inactive, __a, __imm, __p)
#define vabavq_p(__a, __b, __c, __p) __arm_vabavq_p(__a, __b, __c, __p)
@@ -652,15 +640,9 @@
#define vbrsrq_n_s32(__a, __b) __arm_vbrsrq_n_s32(__a, __b)
#define vbicq_s32(__a, __b) __arm_vbicq_s32(__a, __b)
#define vaddvaq_s32(__a, __b) __arm_vaddvaq_s32(__a, __b)
-#define vqmovntq_u16(__a, __b) __arm_vqmovntq_u16(__a, __b)
-#define vqmovnbq_u16(__a, __b) __arm_vqmovnbq_u16(__a, __b)
#define vmulltq_poly_p8(__a, __b) __arm_vmulltq_poly_p8(__a, __b)
#define vmullbq_poly_p8(__a, __b) __arm_vmullbq_poly_p8(__a, __b)
-#define vmovntq_u16(__a, __b) __arm_vmovntq_u16(__a, __b)
-#define vmovnbq_u16(__a, __b) __arm_vmovnbq_u16(__a, __b)
#define vmlaldavq_u16(__a, __b) __arm_vmlaldavq_u16(__a, __b)
-#define vqmovuntq_s16(__a, __b) __arm_vqmovuntq_s16(__a, __b)
-#define vqmovunbq_s16(__a, __b) __arm_vqmovunbq_s16(__a, __b)
#define vshlltq_n_u8(__a, __imm) __arm_vshlltq_n_u8(__a, __imm)
#define vshllbq_n_u8(__a, __imm) __arm_vshllbq_n_u8(__a, __imm)
#define vbicq_n_u16(__a, __imm) __arm_vbicq_n_u16(__a, __imm)
@@ -676,15 +658,11 @@
#define vcmpgeq_f16(__a, __b) __arm_vcmpgeq_f16(__a, __b)
#define vcmpeqq_n_f16(__a, __b) __arm_vcmpeqq_n_f16(__a, __b)
#define vcmpeqq_f16(__a, __b) __arm_vcmpeqq_f16(__a, __b)
-#define vqmovntq_s16(__a, __b) __arm_vqmovntq_s16(__a, __b)
-#define vqmovnbq_s16(__a, __b) __arm_vqmovnbq_s16(__a, __b)
#define vqdmulltq_s16(__a, __b) __arm_vqdmulltq_s16(__a, __b)
#define vqdmulltq_n_s16(__a, __b) __arm_vqdmulltq_n_s16(__a, __b)
#define vqdmullbq_s16(__a, __b) __arm_vqdmullbq_s16(__a, __b)
#define vqdmullbq_n_s16(__a, __b) __arm_vqdmullbq_n_s16(__a, __b)
#define vornq_f16(__a, __b) __arm_vornq_f16(__a, __b)
-#define vmovntq_s16(__a, __b) __arm_vmovntq_s16(__a, __b)
-#define vmovnbq_s16(__a, __b) __arm_vmovnbq_s16(__a, __b)
#define vmlsldavxq_s16(__a, __b) __arm_vmlsldavxq_s16(__a, __b)
#define vmlsldavq_s16(__a, __b) __arm_vmlsldavq_s16(__a, __b)
#define vmlaldavxq_s16(__a, __b) __arm_vmlaldavxq_s16(__a, __b)
@@ -707,15 +685,9 @@
#define vshlltq_n_s8(__a, __imm) __arm_vshlltq_n_s8(__a, __imm)
#define vshllbq_n_s8(__a, __imm) __arm_vshllbq_n_s8(__a, __imm)
#define vbicq_n_s16(__a, __imm) __arm_vbicq_n_s16(__a, __imm)
-#define vqmovntq_u32(__a, __b) __arm_vqmovntq_u32(__a, __b)
-#define vqmovnbq_u32(__a, __b) __arm_vqmovnbq_u32(__a, __b)
#define vmulltq_poly_p16(__a, __b) __arm_vmulltq_poly_p16(__a, __b)
#define vmullbq_poly_p16(__a, __b) __arm_vmullbq_poly_p16(__a, __b)
-#define vmovntq_u32(__a, __b) __arm_vmovntq_u32(__a, __b)
-#define vmovnbq_u32(__a, __b) __arm_vmovnbq_u32(__a, __b)
#define vmlaldavq_u32(__a, __b) __arm_vmlaldavq_u32(__a, __b)
-#define vqmovuntq_s32(__a, __b) __arm_vqmovuntq_s32(__a, __b)
-#define vqmovunbq_s32(__a, __b) __arm_vqmovunbq_s32(__a, __b)
#define vshlltq_n_u16(__a, __imm) __arm_vshlltq_n_u16(__a, __imm)
#define vshllbq_n_u16(__a, __imm) __arm_vshllbq_n_u16(__a, __imm)
#define vbicq_n_u32(__a, __imm) __arm_vbicq_n_u32(__a, __imm)
@@ -731,15 +703,11 @@
#define vcmpgeq_f32(__a, __b) __arm_vcmpgeq_f32(__a, __b)
#define vcmpeqq_n_f32(__a, __b) __arm_vcmpeqq_n_f32(__a, __b)
#define vcmpeqq_f32(__a, __b) __arm_vcmpeqq_f32(__a, __b)
-#define vqmovntq_s32(__a, __b) __arm_vqmovntq_s32(__a, __b)
-#define vqmovnbq_s32(__a, __b) __arm_vqmovnbq_s32(__a, __b)
#define vqdmulltq_s32(__a, __b) __arm_vqdmulltq_s32(__a, __b)
#define vqdmulltq_n_s32(__a, __b) __arm_vqdmulltq_n_s32(__a, __b)
#define vqdmullbq_s32(__a, __b) __arm_vqdmullbq_s32(__a, __b)
#define vqdmullbq_n_s32(__a, __b) __arm_vqdmullbq_n_s32(__a, __b)
#define vornq_f32(__a, __b) __arm_vornq_f32(__a, __b)
-#define vmovntq_s32(__a, __b) __arm_vmovntq_s32(__a, __b)
-#define vmovnbq_s32(__a, __b) __arm_vmovnbq_s32(__a, __b)
#define vmlsldavxq_s32(__a, __b) __arm_vmlsldavxq_s32(__a, __b)
#define vmlsldavq_s32(__a, __b) __arm_vmlsldavq_s32(__a, __b)
#define vmlaldavxq_s32(__a, __b) __arm_vmlaldavxq_s32(__a, __b)
@@ -1056,11 +1024,7 @@
#define vmlsldavxq_p_s16(__a, __b, __p) __arm_vmlsldavxq_p_s16(__a, __b, __p)
#define vmovlbq_m_s8(__inactive, __a, __p) __arm_vmovlbq_m_s8(__inactive, __a, __p)
#define vmovltq_m_s8(__inactive, __a, __p) __arm_vmovltq_m_s8(__inactive, __a, __p)
-#define vmovnbq_m_s16(__a, __b, __p) __arm_vmovnbq_m_s16(__a, __b, __p)
-#define vmovntq_m_s16(__a, __b, __p) __arm_vmovntq_m_s16(__a, __b, __p)
#define vpselq_f16(__a, __b, __p) __arm_vpselq_f16(__a, __b, __p)
-#define vqmovnbq_m_s16(__a, __b, __p) __arm_vqmovnbq_m_s16(__a, __b, __p)
-#define vqmovntq_m_s16(__a, __b, __p) __arm_vqmovntq_m_s16(__a, __b, __p)
#define vrev32q_m_s8(__inactive, __a, __p) __arm_vrev32q_m_s8(__inactive, __a, __p)
#define vrev64q_m_f16(__inactive, __a, __p) __arm_vrev64q_m_f16(__inactive, __a, __p)
#define vcmpeqq_m_n_f16(__a, __b, __p) __arm_vcmpeqq_m_n_f16(__a, __b, __p)
@@ -1079,16 +1043,10 @@
#define vcvtnq_m_u16_f16(__inactive, __a, __p) __arm_vcvtnq_m_u16_f16(__inactive, __a, __p)
#define vcvtpq_m_u16_f16(__inactive, __a, __p) __arm_vcvtpq_m_u16_f16(__inactive, __a, __p)
#define vcvtq_m_u16_f16(__inactive, __a, __p) __arm_vcvtq_m_u16_f16(__inactive, __a, __p)
-#define vqmovunbq_m_s16(__a, __b, __p) __arm_vqmovunbq_m_s16(__a, __b, __p)
-#define vqmovuntq_m_s16(__a, __b, __p) __arm_vqmovuntq_m_s16(__a, __b, __p)
#define vmlaldavaq_u16(__a, __b, __c) __arm_vmlaldavaq_u16(__a, __b, __c)
#define vmlaldavq_p_u16(__a, __b, __p) __arm_vmlaldavq_p_u16(__a, __b, __p)
#define vmovlbq_m_u8(__inactive, __a, __p) __arm_vmovlbq_m_u8(__inactive, __a, __p)
#define vmovltq_m_u8(__inactive, __a, __p) __arm_vmovltq_m_u8(__inactive, __a, __p)
-#define vmovnbq_m_u16(__a, __b, __p) __arm_vmovnbq_m_u16(__a, __b, __p)
-#define vmovntq_m_u16(__a, __b, __p) __arm_vmovntq_m_u16(__a, __b, __p)
-#define vqmovnbq_m_u16(__a, __b, __p) __arm_vqmovnbq_m_u16(__a, __b, __p)
-#define vqmovntq_m_u16(__a, __b, __p) __arm_vqmovntq_m_u16(__a, __b, __p)
#define vrev32q_m_u8(__inactive, __a, __p) __arm_vrev32q_m_u8(__inactive, __a, __p)
#define vmvnq_m_n_s32(__inactive, __imm, __p) __arm_vmvnq_m_n_s32(__inactive, __imm, __p)
#define vcmlaq_f32(__a, __b, __c) __arm_vcmlaq_f32(__a, __b, __c)
@@ -1120,11 +1078,7 @@
#define vmlsldavxq_p_s32(__a, __b, __p) __arm_vmlsldavxq_p_s32(__a, __b, __p)
#define vmovlbq_m_s16(__inactive, __a, __p) __arm_vmovlbq_m_s16(__inactive, __a, __p)
#define vmovltq_m_s16(__inactive, __a, __p) __arm_vmovltq_m_s16(__inactive, __a, __p)
-#define vmovnbq_m_s32(__a, __b, __p) __arm_vmovnbq_m_s32(__a, __b, __p)
-#define vmovntq_m_s32(__a, __b, __p) __arm_vmovntq_m_s32(__a, __b, __p)
#define vpselq_f32(__a, __b, __p) __arm_vpselq_f32(__a, __b, __p)
-#define vqmovnbq_m_s32(__a, __b, __p) __arm_vqmovnbq_m_s32(__a, __b, __p)
-#define vqmovntq_m_s32(__a, __b, __p) __arm_vqmovntq_m_s32(__a, __b, __p)
#define vrev32q_m_s16(__inactive, __a, __p) __arm_vrev32q_m_s16(__inactive, __a, __p)
#define vrev64q_m_f32(__inactive, __a, __p) __arm_vrev64q_m_f32(__inactive, __a, __p)
#define vcmpeqq_m_n_f32(__a, __b, __p) __arm_vcmpeqq_m_n_f32(__a, __b, __p)
@@ -1143,16 +1097,10 @@
#define vcvtnq_m_u32_f32(__inactive, __a, __p) __arm_vcvtnq_m_u32_f32(__inactive, __a, __p)
#define vcvtpq_m_u32_f32(__inactive, __a, __p) __arm_vcvtpq_m_u32_f32(__inactive, __a, __p)
#define vcvtq_m_u32_f32(__inactive, __a, __p) __arm_vcvtq_m_u32_f32(__inactive, __a, __p)
-#define vqmovunbq_m_s32(__a, __b, __p) __arm_vqmovunbq_m_s32(__a, __b, __p)
-#define vqmovuntq_m_s32(__a, __b, __p) __arm_vqmovuntq_m_s32(__a, __b, __p)
#define vmlaldavaq_u32(__a, __b, __c) __arm_vmlaldavaq_u32(__a, __b, __c)
#define vmlaldavq_p_u32(__a, __b, __p) __arm_vmlaldavq_p_u32(__a, __b, __p)
#define vmovlbq_m_u16(__inactive, __a, __p) __arm_vmovlbq_m_u16(__inactive, __a, __p)
#define vmovltq_m_u16(__inactive, __a, __p) __arm_vmovltq_m_u16(__inactive, __a, __p)
-#define vmovnbq_m_u32(__a, __b, __p) __arm_vmovnbq_m_u32(__a, __b, __p)
-#define vmovntq_m_u32(__a, __b, __p) __arm_vmovntq_m_u32(__a, __b, __p)
-#define vqmovnbq_m_u32(__a, __b, __p) __arm_vqmovnbq_m_u32(__a, __b, __p)
-#define vqmovntq_m_u32(__a, __b, __p) __arm_vqmovntq_m_u32(__a, __b, __p)
#define vrev32q_m_u16(__inactive, __a, __p) __arm_vrev32q_m_u16(__inactive, __a, __p)
#define vsriq_m_n_s8(__a, __b, __imm, __p) __arm_vsriq_m_n_s8(__a, __b, __imm, __p)
#define vcvtq_m_n_f16_u16(__inactive, __a, __imm6, __p) __arm_vcvtq_m_n_f16_u16(__inactive, __a, __imm6, __p)
@@ -3485,20 +3433,6 @@ __arm_vaddvaq_s32 (int32_t __a, int32x4_t __b)
return __builtin_mve_vaddvaq_sv4si (__a, __b);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq_u16 (uint8x16_t __a, uint16x8_t __b)
-{
- return __builtin_mve_vqmovntq_uv8hi (__a, __b);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq_u16 (uint8x16_t __a, uint16x8_t __b)
-{
- return __builtin_mve_vqmovnbq_uv8hi (__a, __b);
-}
-
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmulltq_poly_p8 (uint8x16_t __a, uint8x16_t __b)
@@ -3513,20 +3447,6 @@ __arm_vmullbq_poly_p8 (uint8x16_t __a, uint8x16_t __b)
return __builtin_mve_vmullbq_poly_pv16qi (__a, __b);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq_u16 (uint8x16_t __a, uint16x8_t __b)
-{
- return __builtin_mve_vmovntq_uv8hi (__a, __b);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq_u16 (uint8x16_t __a, uint16x8_t __b)
-{
- return __builtin_mve_vmovnbq_uv8hi (__a, __b);
-}
-
__extension__ extern __inline uint64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmlaldavq_u16 (uint16x8_t __a, uint16x8_t __b)
@@ -3534,20 +3454,6 @@ __arm_vmlaldavq_u16 (uint16x8_t __a, uint16x8_t __b)
return __builtin_mve_vmlaldavq_uv8hi (__a, __b);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovuntq_s16 (uint8x16_t __a, int16x8_t __b)
-{
- return __builtin_mve_vqmovuntq_sv8hi (__a, __b);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovunbq_s16 (uint8x16_t __a, int16x8_t __b)
-{
- return __builtin_mve_vqmovunbq_sv8hi (__a, __b);
-}
-
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vshlltq_n_u8 (uint8x16_t __a, const int __imm)
@@ -3569,20 +3475,6 @@ __arm_vbicq_n_u16 (uint16x8_t __a, const int __imm)
return __builtin_mve_vbicq_n_uv8hi (__a, __imm);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq_s16 (int8x16_t __a, int16x8_t __b)
-{
- return __builtin_mve_vqmovntq_sv8hi (__a, __b);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq_s16 (int8x16_t __a, int16x8_t __b)
-{
- return __builtin_mve_vqmovnbq_sv8hi (__a, __b);
-}
-
__extension__ extern __inline int32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vqdmulltq_s16 (int16x8_t __a, int16x8_t __b)
@@ -3611,20 +3503,6 @@ __arm_vqdmullbq_n_s16 (int16x8_t __a, int16_t __b)
return __builtin_mve_vqdmullbq_n_sv8hi (__a, __b);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq_s16 (int8x16_t __a, int16x8_t __b)
-{
- return __builtin_mve_vmovntq_sv8hi (__a, __b);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq_s16 (int8x16_t __a, int16x8_t __b)
-{
- return __builtin_mve_vmovnbq_sv8hi (__a, __b);
-}
-
__extension__ extern __inline int64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmlsldavxq_s16 (int16x8_t __a, int16x8_t __b)
@@ -3674,20 +3552,6 @@ __arm_vbicq_n_s16 (int16x8_t __a, const int __imm)
return __builtin_mve_vbicq_n_sv8hi (__a, __imm);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq_u32 (uint16x8_t __a, uint32x4_t __b)
-{
- return __builtin_mve_vqmovntq_uv4si (__a, __b);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq_u32 (uint16x8_t __a, uint32x4_t __b)
-{
- return __builtin_mve_vqmovnbq_uv4si (__a, __b);
-}
-
__extension__ extern __inline uint32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmulltq_poly_p16 (uint16x8_t __a, uint16x8_t __b)
@@ -3702,20 +3566,6 @@ __arm_vmullbq_poly_p16 (uint16x8_t __a, uint16x8_t __b)
return __builtin_mve_vmullbq_poly_pv8hi (__a, __b);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq_u32 (uint16x8_t __a, uint32x4_t __b)
-{
- return __builtin_mve_vmovntq_uv4si (__a, __b);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq_u32 (uint16x8_t __a, uint32x4_t __b)
-{
- return __builtin_mve_vmovnbq_uv4si (__a, __b);
-}
-
__extension__ extern __inline uint64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmlaldavq_u32 (uint32x4_t __a, uint32x4_t __b)
@@ -3723,20 +3573,6 @@ __arm_vmlaldavq_u32 (uint32x4_t __a, uint32x4_t __b)
return __builtin_mve_vmlaldavq_uv4si (__a, __b);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovuntq_s32 (uint16x8_t __a, int32x4_t __b)
-{
- return __builtin_mve_vqmovuntq_sv4si (__a, __b);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovunbq_s32 (uint16x8_t __a, int32x4_t __b)
-{
- return __builtin_mve_vqmovunbq_sv4si (__a, __b);
-}
-
__extension__ extern __inline uint32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vshlltq_n_u16 (uint16x8_t __a, const int __imm)
@@ -3758,20 +3594,6 @@ __arm_vbicq_n_u32 (uint32x4_t __a, const int __imm)
return __builtin_mve_vbicq_n_uv4si (__a, __imm);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq_s32 (int16x8_t __a, int32x4_t __b)
-{
- return __builtin_mve_vqmovntq_sv4si (__a, __b);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq_s32 (int16x8_t __a, int32x4_t __b)
-{
- return __builtin_mve_vqmovnbq_sv4si (__a, __b);
-}
-
__extension__ extern __inline int64x2_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vqdmulltq_s32 (int32x4_t __a, int32x4_t __b)
@@ -3800,20 +3622,6 @@ __arm_vqdmullbq_n_s32 (int32x4_t __a, int32_t __b)
return __builtin_mve_vqdmullbq_n_sv4si (__a, __b);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq_s32 (int16x8_t __a, int32x4_t __b)
-{
- return __builtin_mve_vmovntq_sv4si (__a, __b);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq_s32 (int16x8_t __a, int32x4_t __b)
-{
- return __builtin_mve_vmovnbq_sv4si (__a, __b);
-}
-
__extension__ extern __inline int64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmlsldavxq_s32 (int32x4_t __a, int32x4_t __b)
@@ -5681,34 +5489,6 @@ __arm_vmovltq_m_s8 (int16x8_t __inactive, int8x16_t __a, mve_pred16_t __p)
return __builtin_mve_vmovltq_m_sv16qi (__inactive, __a, __p);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq_m_s16 (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vmovnbq_m_sv8hi (__a, __b, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq_m_s16 (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vmovntq_m_sv8hi (__a, __b, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq_m_s16 (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vqmovnbq_m_sv8hi (__a, __b, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq_m_s16 (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vqmovntq_m_sv8hi (__a, __b, __p);
-}
-
__extension__ extern __inline int8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev32q_m_s8 (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
@@ -5723,20 +5503,6 @@ __arm_vmvnq_m_n_u16 (uint16x8_t __inactive, const int __imm, mve_pred16_t __p)
return __builtin_mve_vmvnq_m_n_uv8hi (__inactive, __imm, __p);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovunbq_m_s16 (uint8x16_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vqmovunbq_m_sv8hi (__a, __b, __p);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovuntq_m_s16 (uint8x16_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vqmovuntq_m_sv8hi (__a, __b, __p);
-}
-
__extension__ extern __inline uint64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmlaldavaq_u16 (uint64_t __a, uint16x8_t __b, uint16x8_t __c)
@@ -5765,34 +5531,6 @@ __arm_vmovltq_m_u8 (uint16x8_t __inactive, uint8x16_t __a, mve_pred16_t __p)
return __builtin_mve_vmovltq_m_uv16qi (__inactive, __a, __p);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq_m_u16 (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vmovnbq_m_uv8hi (__a, __b, __p);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq_m_u16 (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vmovntq_m_uv8hi (__a, __b, __p);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq_m_u16 (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vqmovnbq_m_uv8hi (__a, __b, __p);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq_m_u16 (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vqmovntq_m_uv8hi (__a, __b, __p);
-}
-
__extension__ extern __inline uint8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev32q_m_u8 (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
@@ -5877,34 +5615,6 @@ __arm_vmovltq_m_s16 (int32x4_t __inactive, int16x8_t __a, mve_pred16_t __p)
return __builtin_mve_vmovltq_m_sv8hi (__inactive, __a, __p);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq_m_s32 (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vmovnbq_m_sv4si (__a, __b, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq_m_s32 (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vmovntq_m_sv4si (__a, __b, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq_m_s32 (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vqmovnbq_m_sv4si (__a, __b, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq_m_s32 (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vqmovntq_m_sv4si (__a, __b, __p);
-}
-
__extension__ extern __inline int16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev32q_m_s16 (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
@@ -5919,20 +5629,6 @@ __arm_vmvnq_m_n_u32 (uint32x4_t __inactive, const int __imm, mve_pred16_t __p)
return __builtin_mve_vmvnq_m_n_uv4si (__inactive, __imm, __p);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovunbq_m_s32 (uint16x8_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vqmovunbq_m_sv4si (__a, __b, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovuntq_m_s32 (uint16x8_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vqmovuntq_m_sv4si (__a, __b, __p);
-}
-
__extension__ extern __inline uint64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmlaldavaq_u32 (uint64_t __a, uint32x4_t __b, uint32x4_t __c)
@@ -5961,34 +5657,6 @@ __arm_vmovltq_m_u16 (uint32x4_t __inactive, uint16x8_t __a, mve_pred16_t __p)
return __builtin_mve_vmovltq_m_uv8hi (__inactive, __a, __p);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq_m_u32 (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vmovnbq_m_uv4si (__a, __b, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq_m_u32 (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vmovntq_m_uv4si (__a, __b, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq_m_u32 (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vqmovnbq_m_uv4si (__a, __b, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq_m_u32 (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
-{
- return __builtin_mve_vqmovntq_m_uv4si (__a, __b, __p);
-}
-
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev32q_m_u16 (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
@@ -14366,20 +14034,6 @@ __arm_vaddvaq (int32_t __a, int32x4_t __b)
return __arm_vaddvaq_s32 (__a, __b);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq (uint8x16_t __a, uint16x8_t __b)
-{
- return __arm_vqmovntq_u16 (__a, __b);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq (uint8x16_t __a, uint16x8_t __b)
-{
- return __arm_vqmovnbq_u16 (__a, __b);
-}
-
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmulltq_poly (uint8x16_t __a, uint8x16_t __b)
@@ -14394,20 +14048,6 @@ __arm_vmullbq_poly (uint8x16_t __a, uint8x16_t __b)
return __arm_vmullbq_poly_p8 (__a, __b);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq (uint8x16_t __a, uint16x8_t __b)
-{
- return __arm_vmovntq_u16 (__a, __b);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq (uint8x16_t __a, uint16x8_t __b)
-{
- return __arm_vmovnbq_u16 (__a, __b);
-}
-
__extension__ extern __inline uint64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmlaldavq (uint16x8_t __a, uint16x8_t __b)
@@ -14415,20 +14055,6 @@ __arm_vmlaldavq (uint16x8_t __a, uint16x8_t __b)
return __arm_vmlaldavq_u16 (__a, __b);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovuntq (uint8x16_t __a, int16x8_t __b)
-{
- return __arm_vqmovuntq_s16 (__a, __b);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovunbq (uint8x16_t __a, int16x8_t __b)
-{
- return __arm_vqmovunbq_s16 (__a, __b);
-}
-
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vshlltq (uint8x16_t __a, const int __imm)
@@ -14450,20 +14076,6 @@ __arm_vbicq (uint16x8_t __a, const int __imm)
return __arm_vbicq_n_u16 (__a, __imm);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq (int8x16_t __a, int16x8_t __b)
-{
- return __arm_vqmovntq_s16 (__a, __b);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq (int8x16_t __a, int16x8_t __b)
-{
- return __arm_vqmovnbq_s16 (__a, __b);
-}
-
__extension__ extern __inline int32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vqdmulltq (int16x8_t __a, int16x8_t __b)
@@ -14492,20 +14104,6 @@ __arm_vqdmullbq (int16x8_t __a, int16_t __b)
return __arm_vqdmullbq_n_s16 (__a, __b);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq (int8x16_t __a, int16x8_t __b)
-{
- return __arm_vmovntq_s16 (__a, __b);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq (int8x16_t __a, int16x8_t __b)
-{
- return __arm_vmovnbq_s16 (__a, __b);
-}
-
__extension__ extern __inline int64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmlsldavxq (int16x8_t __a, int16x8_t __b)
@@ -14555,20 +14153,6 @@ __arm_vbicq (int16x8_t __a, const int __imm)
return __arm_vbicq_n_s16 (__a, __imm);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq (uint16x8_t __a, uint32x4_t __b)
-{
- return __arm_vqmovntq_u32 (__a, __b);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq (uint16x8_t __a, uint32x4_t __b)
-{
- return __arm_vqmovnbq_u32 (__a, __b);
-}
-
__extension__ extern __inline uint32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmulltq_poly (uint16x8_t __a, uint16x8_t __b)
@@ -14583,20 +14167,6 @@ __arm_vmullbq_poly (uint16x8_t __a, uint16x8_t __b)
return __arm_vmullbq_poly_p16 (__a, __b);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq (uint16x8_t __a, uint32x4_t __b)
-{
- return __arm_vmovntq_u32 (__a, __b);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq (uint16x8_t __a, uint32x4_t __b)
-{
- return __arm_vmovnbq_u32 (__a, __b);
-}
-
__extension__ extern __inline uint64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmlaldavq (uint32x4_t __a, uint32x4_t __b)
@@ -14604,20 +14174,6 @@ __arm_vmlaldavq (uint32x4_t __a, uint32x4_t __b)
return __arm_vmlaldavq_u32 (__a, __b);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovuntq (uint16x8_t __a, int32x4_t __b)
-{
- return __arm_vqmovuntq_s32 (__a, __b);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovunbq (uint16x8_t __a, int32x4_t __b)
-{
- return __arm_vqmovunbq_s32 (__a, __b);
-}
-
__extension__ extern __inline uint32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vshlltq (uint16x8_t __a, const int __imm)
@@ -14639,20 +14195,6 @@ __arm_vbicq (uint32x4_t __a, const int __imm)
return __arm_vbicq_n_u32 (__a, __imm);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq (int16x8_t __a, int32x4_t __b)
-{
- return __arm_vqmovntq_s32 (__a, __b);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq (int16x8_t __a, int32x4_t __b)
-{
- return __arm_vqmovnbq_s32 (__a, __b);
-}
-
__extension__ extern __inline int64x2_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vqdmulltq (int32x4_t __a, int32x4_t __b)
@@ -14681,20 +14223,6 @@ __arm_vqdmullbq (int32x4_t __a, int32_t __b)
return __arm_vqdmullbq_n_s32 (__a, __b);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq (int16x8_t __a, int32x4_t __b)
-{
- return __arm_vmovntq_s32 (__a, __b);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq (int16x8_t __a, int32x4_t __b)
-{
- return __arm_vmovnbq_s32 (__a, __b);
-}
-
__extension__ extern __inline int64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmlsldavxq (int32x4_t __a, int32x4_t __b)
@@ -16522,34 +16050,6 @@ __arm_vmovltq_m (int16x8_t __inactive, int8x16_t __a, mve_pred16_t __p)
return __arm_vmovltq_m_s8 (__inactive, __a, __p);
}
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq_m (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __arm_vmovnbq_m_s16 (__a, __b, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq_m (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __arm_vmovntq_m_s16 (__a, __b, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq_m (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __arm_vqmovnbq_m_s16 (__a, __b, __p);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq_m (int8x16_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __arm_vqmovntq_m_s16 (__a, __b, __p);
-}
-
__extension__ extern __inline int8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev32q_m (int8x16_t __inactive, int8x16_t __a, mve_pred16_t __p)
@@ -16564,20 +16064,6 @@ __arm_vmvnq_m (uint16x8_t __inactive, const int __imm, mve_pred16_t __p)
return __arm_vmvnq_m_n_u16 (__inactive, __imm, __p);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovunbq_m (uint8x16_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __arm_vqmovunbq_m_s16 (__a, __b, __p);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovuntq_m (uint8x16_t __a, int16x8_t __b, mve_pred16_t __p)
-{
- return __arm_vqmovuntq_m_s16 (__a, __b, __p);
-}
-
__extension__ extern __inline uint64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmlaldavaq (uint64_t __a, uint16x8_t __b, uint16x8_t __c)
@@ -16606,34 +16092,6 @@ __arm_vmovltq_m (uint16x8_t __inactive, uint8x16_t __a, mve_pred16_t __p)
return __arm_vmovltq_m_u8 (__inactive, __a, __p);
}
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq_m (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
-{
- return __arm_vmovnbq_m_u16 (__a, __b, __p);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq_m (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
-{
- return __arm_vmovntq_m_u16 (__a, __b, __p);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq_m (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
-{
- return __arm_vqmovnbq_m_u16 (__a, __b, __p);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq_m (uint8x16_t __a, uint16x8_t __b, mve_pred16_t __p)
-{
- return __arm_vqmovntq_m_u16 (__a, __b, __p);
-}
-
__extension__ extern __inline uint8x16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev32q_m (uint8x16_t __inactive, uint8x16_t __a, mve_pred16_t __p)
@@ -16718,34 +16176,6 @@ __arm_vmovltq_m (int32x4_t __inactive, int16x8_t __a, mve_pred16_t __p)
return __arm_vmovltq_m_s16 (__inactive, __a, __p);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq_m (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __arm_vmovnbq_m_s32 (__a, __b, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq_m (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __arm_vmovntq_m_s32 (__a, __b, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq_m (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __arm_vqmovnbq_m_s32 (__a, __b, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq_m (int16x8_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __arm_vqmovntq_m_s32 (__a, __b, __p);
-}
-
__extension__ extern __inline int16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev32q_m (int16x8_t __inactive, int16x8_t __a, mve_pred16_t __p)
@@ -16760,20 +16190,6 @@ __arm_vmvnq_m (uint32x4_t __inactive, const int __imm, mve_pred16_t __p)
return __arm_vmvnq_m_n_u32 (__inactive, __imm, __p);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovunbq_m (uint16x8_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __arm_vqmovunbq_m_s32 (__a, __b, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovuntq_m (uint16x8_t __a, int32x4_t __b, mve_pred16_t __p)
-{
- return __arm_vqmovuntq_m_s32 (__a, __b, __p);
-}
-
__extension__ extern __inline uint64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vmlaldavaq (uint64_t __a, uint32x4_t __b, uint32x4_t __c)
@@ -16802,34 +16218,6 @@ __arm_vmovltq_m (uint32x4_t __inactive, uint16x8_t __a, mve_pred16_t __p)
return __arm_vmovltq_m_u16 (__inactive, __a, __p);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovnbq_m (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
-{
- return __arm_vmovnbq_m_u32 (__a, __b, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vmovntq_m (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
-{
- return __arm_vmovntq_m_u32 (__a, __b, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovnbq_m (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
-{
- return __arm_vqmovnbq_m_u32 (__a, __b, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vqmovntq_m (uint16x8_t __a, uint32x4_t __b, mve_pred16_t __p)
-{
- return __arm_vqmovntq_m_u32 (__a, __b, __p);
-}
-
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vrev32q_m (uint16x8_t __inactive, uint16x8_t __a, mve_pred16_t __p)
@@ -23169,28 +22557,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-#define __arm_vqmovuntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-
-#define __arm_vqmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovntq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovntq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovntq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovntq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
-
-#define __arm_vqmovnbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovnbq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovnbq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovnbq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovnbq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
-
#define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -23199,12 +22565,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqdmulltq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqdmulltq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-#define __arm_vqmovunbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovunbq_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovunbq_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-
#define __arm_vqdmullbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -23263,22 +22623,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmaxaq_s16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmaxaq_s32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-#define __arm_vmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovntq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovntq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovntq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovntq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
-
-#define __arm_vmovnbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovnbq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovnbq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovnbq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovnbq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
-
#define __arm_vmullbq_int(p0,p1) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -23465,22 +22809,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vmovlbq_m_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vmovlbq_m_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
-#define __arm_vmovnbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovnbq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovnbq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovnbq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovnbq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
-
-#define __arm_vmovntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovntq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovntq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovntq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovntq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
-
#define __arm_vmovltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -23785,34 +23113,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrev16q_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrev16q_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2));})
-#define __arm_vqmovnbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovnbq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovnbq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovnbq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovnbq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
-
-#define __arm_vqmovntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovntq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovntq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovntq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovntq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
-
-#define __arm_vqmovunbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovunbq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovunbq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
-#define __arm_vqmovuntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
#define __arm_vcmpgeq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -24655,22 +23955,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce3(p1, int)), \
int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vcmpeqq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce3(p1, int)));})
-#define __arm_vqmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovntq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovntq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovntq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovntq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
-
-#define __arm_vqmovnbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovnbq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovnbq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovnbq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovnbq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
-
#define __arm_vmulltq_poly(p0,p1) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -24683,34 +23967,12 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vmullbq_poly_p8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t)), \
int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t]: __arm_vmullbq_poly_p16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t)));})
-#define __arm_vmovntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovntq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovntq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovntq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovntq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
-
-#define __arm_vmovnbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovnbq_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovnbq_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t)), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovnbq_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovnbq_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t)));})
-
#define __arm_vmlaldavxq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-#define __arm_vqmovuntq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-
#define __arm_vshlltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
@@ -24725,12 +23987,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshllbq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshllbq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1));})
-#define __arm_vqmovunbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovunbq_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t)), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovunbq_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-
#define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -25084,22 +24340,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vmovlbq_m_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vmovlbq_m_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
-#define __arm_vmovnbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovnbq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovnbq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovnbq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovnbq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
-
-#define __arm_vmovntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vmovntq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vmovntq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vmovntq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vmovntq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
-
#define __arm_vrev32q_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -25114,28 +24354,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t]: __arm_vrev16q_m_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), p2), \
int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint8x16_t]: __arm_vrev16q_m_u8 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint8x16_t), p2));})
-#define __arm_vqmovuntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovuntq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovuntq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
-#define __arm_vqmovntq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovntq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovntq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovntq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovntq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
-
-#define __arm_vqmovnbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovnbq_m_s16 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovnbq_m_s32 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2), \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_uint16x8_t]: __arm_vqmovnbq_m_u16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint32x4_t]: __arm_vqmovnbq_m_u32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint32x4_t), p2));})
-
#define __arm_vmovltq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -25144,12 +24362,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vmovltq_m_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vmovltq_m_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2));})
-#define __arm_vqmovunbq_m(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_uint8x16_t][__ARM_mve_type_int16x8_t]: __arm_vqmovunbq_m_s16 (__ARM_mve_coerce(__p0, uint8x16_t), __ARM_mve_coerce(__p1, int16x8_t), p2), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_int32x4_t]: __arm_vqmovunbq_m_s32 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, int32x4_t), p2));})
-
#define __arm_vabavq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
__typeof(p2) __p2 = (p2); \
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 08/10] arm: [MVE intrinsics] add binary_widen_n shape
2023-05-05 16:48 [PATCH 01/10] arm: [MVE intrinsics] add unary shape Christophe Lyon
` (5 preceding siblings ...)
2023-05-05 16:49 ` [PATCH 07/10] arm: [MVE intrinsics] rework " Christophe Lyon
@ 2023-05-05 16:49 ` Christophe Lyon
2023-05-05 16:49 ` [PATCH 09/10] arm: [MVE intrinsics] factorize vshllbq vshlltq Christophe Lyon
` (2 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Christophe Lyon @ 2023-05-05 16:49 UTC (permalink / raw)
To: gcc-patches, kyrylo.tkachov, richard.earnshaw, richard.sandiford
Cc: Christophe Lyon
This patch adds the binary_widen_n shape description.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
* config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 53 +++++++++++++++++++++++
gcc/config/arm/arm-mve-builtins-shapes.h | 1 +
2 files changed, 54 insertions(+)
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc b/gcc/config/arm/arm-mve-builtins-shapes.cc
index e26604510a2..1d43b8871bf 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.cc
+++ b/gcc/config/arm/arm-mve-builtins-shapes.cc
@@ -821,6 +821,59 @@ struct binary_rshift_narrow_unsigned_def : public overloaded_base<0>
};
SHAPE (binary_rshift_narrow_unsigned)
+/* <T0:twice>_t vfoo[_n_t0](<T0>_t, const int)
+
+ Check that 'imm' is in the [1..#bits] range.
+
+ Example: vshllbq.
+ int16x8_t [__arm_]vshllbq[_n_s8](int8x16_t a, const int imm)
+ int16x8_t [__arm_]vshllbq_m[_n_s8](int16x8_t inactive, int8x16_t a, const int imm, mve_pred16_t p)
+ int16x8_t [__arm_]vshllbq_x[_n_s8](int8x16_t a, const int imm, mve_pred16_t p) */
+struct binary_widen_n_def : public overloaded_base<0>
+{
+ void
+ build (function_builder &b, const function_group_info &group,
+ bool preserve_user_namespace) const override
+ {
+ b.add_overloaded_functions (group, MODE_n, preserve_user_namespace);
+ build_all (b, "vw0,v0,s0", group, MODE_n, preserve_user_namespace);
+ }
+
+ tree
+ resolve (function_resolver &r) const override
+ {
+ unsigned int i, nargs;
+ type_suffix_index type;
+ tree res;
+ if (!r.check_gp_argument (2, i, nargs)
+ || (type = r.infer_vector_type (i - 1)) == NUM_TYPE_SUFFIXES
+ || !r.require_integer_immediate (i))
+ return error_mark_node;
+
+ type_suffix_index wide_suffix
+ = find_type_suffix (type_suffixes[type].tclass,
+ type_suffixes[type].element_bits * 2);
+
+ /* Check the inactive argument has the wide type. */
+ if (((r.pred == PRED_m) && (r.infer_vector_type (0) == wide_suffix))
+ || r.pred == PRED_none
+ || r.pred == PRED_x)
+ if ((res = r.lookup_form (r.mode_suffix_id, type)))
+ return res;
+
+ return r.report_no_such_form (type);
+ }
+
+ bool
+ check (function_checker &c) const override
+ {
+ unsigned int bits = c.type_suffix (0).element_bits;
+ return c.require_immediate_range (1, 1, bits);
+ }
+
+};
+SHAPE (binary_widen_n)
+
/* <T0>xN_t vfoo[_t0](uint64_t, uint64_t)
where there are N arguments in total.
diff --git a/gcc/config/arm/arm-mve-builtins-shapes.h b/gcc/config/arm/arm-mve-builtins-shapes.h
index 825e1bb2a3c..dd2597dc6f5 100644
--- a/gcc/config/arm/arm-mve-builtins-shapes.h
+++ b/gcc/config/arm/arm-mve-builtins-shapes.h
@@ -45,6 +45,7 @@ namespace arm_mve
extern const function_shape *const binary_rshift;
extern const function_shape *const binary_rshift_narrow;
extern const function_shape *const binary_rshift_narrow_unsigned;
+ extern const function_shape *const binary_widen_n;
extern const function_shape *const create;
extern const function_shape *const inherent;
extern const function_shape *const unary;
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 09/10] arm: [MVE intrinsics] factorize vshllbq vshlltq
2023-05-05 16:48 [PATCH 01/10] arm: [MVE intrinsics] add unary shape Christophe Lyon
` (6 preceding siblings ...)
2023-05-05 16:49 ` [PATCH 08/10] arm: [MVE intrinsics] add binary_widen_n shape Christophe Lyon
@ 2023-05-05 16:49 ` Christophe Lyon
2023-05-05 16:49 ` [PATCH 10/10] arm: [MVE intrinsics] rework " Christophe Lyon
2023-05-09 8:25 ` [PATCH 01/10] arm: [MVE intrinsics] add unary shape Kyrylo Tkachov
9 siblings, 0 replies; 11+ messages in thread
From: Christophe Lyon @ 2023-05-05 16:49 UTC (permalink / raw)
To: gcc-patches, kyrylo.tkachov, richard.earnshaw, richard.sandiford
Cc: Christophe Lyon
Factorize vshllbq vshlltq so that they use the same pattern.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
(VSHLLBQ_N, VSHLLTQ_N): Remove.
(VSHLLxQ_N): New.
(VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
(VSHLLxQ_M_N): New.
* config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
(mve_vshlltq_n_<supf><mode>): Merge into ...
(@mve_<mve_insn>q_n_<supf><mode>): ... this.
(mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
Merge into ...
(@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
---
gcc/config/arm/iterators.md | 10 +++++---
gcc/config/arm/mve.md | 50 ++++++++-----------------------------
2 files changed, 16 insertions(+), 44 deletions(-)
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index 20735284979..e82ff0d5d9b 100644
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -731,6 +731,10 @@ (define_int_attr mve_insn [
(VRSHRNTQ_N_S "vrshrnt") (VRSHRNTQ_N_U "vrshrnt")
(VRSHRQ_M_N_S "vrshr") (VRSHRQ_M_N_U "vrshr")
(VRSHRQ_N_S "vrshr") (VRSHRQ_N_U "vrshr")
+ (VSHLLBQ_M_N_S "vshllb") (VSHLLBQ_M_N_U "vshllb")
+ (VSHLLBQ_N_S "vshllb") (VSHLLBQ_N_U "vshllb")
+ (VSHLLTQ_M_N_S "vshllt") (VSHLLTQ_M_N_U "vshllt")
+ (VSHLLTQ_N_S "vshllt") (VSHLLTQ_N_U "vshllt")
(VSHLQ_M_N_S "vshl") (VSHLQ_M_N_U "vshl")
(VSHLQ_M_R_S "vshl") (VSHLQ_M_R_U "vshl")
(VSHLQ_M_S "vshl") (VSHLQ_M_U "vshl")
@@ -2133,8 +2137,7 @@ (define_int_iterator VMOVNTQ [VMOVNTQ_S VMOVNTQ_U])
(define_int_iterator VORRQ_N [VORRQ_N_U VORRQ_N_S])
(define_int_iterator VQMOVNBQ [VQMOVNBQ_U VQMOVNBQ_S])
(define_int_iterator VQMOVNTQ [VQMOVNTQ_U VQMOVNTQ_S])
-(define_int_iterator VSHLLBQ_N [VSHLLBQ_N_S VSHLLBQ_N_U])
-(define_int_iterator VSHLLTQ_N [VSHLLTQ_N_U VSHLLTQ_N_S])
+(define_int_iterator VSHLLxQ_N [VSHLLBQ_N_S VSHLLBQ_N_U VSHLLTQ_N_S VSHLLTQ_N_U])
(define_int_iterator VRMLALDAVHQ [VRMLALDAVHQ_U VRMLALDAVHQ_S])
(define_int_iterator VBICQ_M_N [VBICQ_M_N_S VBICQ_M_N_U])
(define_int_iterator VCVTAQ_M [VCVTAQ_M_S VCVTAQ_M_U])
@@ -2250,8 +2253,7 @@ (define_int_iterator VQSHRNBQ_M_N [VQSHRNBQ_M_N_U VQSHRNBQ_M_N_S])
(define_int_iterator VQSHRNTQ_M_N [VQSHRNTQ_M_N_S VQSHRNTQ_M_N_U])
(define_int_iterator VRSHRNBQ_M_N [VRSHRNBQ_M_N_U VRSHRNBQ_M_N_S])
(define_int_iterator VRSHRNTQ_M_N [VRSHRNTQ_M_N_U VRSHRNTQ_M_N_S])
-(define_int_iterator VSHLLBQ_M_N [VSHLLBQ_M_N_U VSHLLBQ_M_N_S])
-(define_int_iterator VSHLLTQ_M_N [VSHLLTQ_M_N_U VSHLLTQ_M_N_S])
+(define_int_iterator VSHLLxQ_M_N [VSHLLBQ_M_N_U VSHLLBQ_M_N_S VSHLLTQ_M_N_U VSHLLTQ_M_N_S])
(define_int_iterator VSHRNBQ_M_N [VSHRNBQ_M_N_S VSHRNBQ_M_N_U])
(define_int_iterator VSHRNTQ_M_N [VSHRNTQ_M_N_S VSHRNTQ_M_N_U])
(define_int_iterator VSTRWSBQ [VSTRWQSB_S VSTRWQSB_U])
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 2273078807b..98728e6f3ef 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -1830,32 +1830,18 @@ (define_insn "mve_vrmlsldavhxq_sv4si"
])
;;
-;; [vshllbq_n_s, vshllbq_n_u])
+;; [vshllbq_n_s, vshllbq_n_u]
+;; [vshlltq_n_u, vshlltq_n_s]
;;
-(define_insn "mve_vshllbq_n_<supf><mode>"
- [
- (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
- (unspec:<V_double_width> [(match_operand:MVE_3 1 "s_register_operand" "w")
- (match_operand:SI 2 "immediate_operand" "i")]
- VSHLLBQ_N))
- ]
- "TARGET_HAVE_MVE"
- "vshllb.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
- [(set_attr "type" "mve_move")
-])
-
-;;
-;; [vshlltq_n_u, vshlltq_n_s])
-;;
-(define_insn "mve_vshlltq_n_<supf><mode>"
+(define_insn "@mve_<mve_insn>q_n_<supf><mode>"
[
(set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
(unspec:<V_double_width> [(match_operand:MVE_3 1 "s_register_operand" "w")
(match_operand:SI 2 "immediate_operand" "i")]
- VSHLLTQ_N))
+ VSHLLxQ_N))
]
"TARGET_HAVE_MVE"
- "vshllt.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
+ "<mve_insn>.<supf>%#<V_sz_elem>\t%q0, %q1, %2"
[(set_attr "type" "mve_move")
])
@@ -4410,36 +4396,20 @@ (define_insn "mve_vrmlaldavhaq_p_sv4si"
(set_attr "length""8")])
;;
-;; [vshllbq_m_n_u, vshllbq_m_n_s])
-;;
-(define_insn "mve_vshllbq_m_n_<supf><mode>"
- [
- (set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
- (unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
- (match_operand:MVE_3 2 "s_register_operand" "w")
- (match_operand:SI 3 "immediate_operand" "i")
- (match_operand:<MVE_VPRED> 4 "vpr_register_operand" "Up")]
- VSHLLBQ_M_N))
- ]
- "TARGET_HAVE_MVE"
- "vpst\;vshllbt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
- [(set_attr "type" "mve_move")
- (set_attr "length""8")])
-
-;;
-;; [vshlltq_m_n_u, vshlltq_m_n_s])
+;; [vshllbq_m_n_u, vshllbq_m_n_s]
+;; [vshlltq_m_n_u, vshlltq_m_n_s]
;;
-(define_insn "mve_vshlltq_m_n_<supf><mode>"
+(define_insn "@mve_<mve_insn>q_m_n_<supf><mode>"
[
(set (match_operand:<V_double_width> 0 "s_register_operand" "=w")
(unspec:<V_double_width> [(match_operand:<V_double_width> 1 "s_register_operand" "0")
(match_operand:MVE_3 2 "s_register_operand" "w")
(match_operand:SI 3 "immediate_operand" "i")
(match_operand:<MVE_VPRED> 4 "vpr_register_operand" "Up")]
- VSHLLTQ_M_N))
+ VSHLLxQ_M_N))
]
"TARGET_HAVE_MVE"
- "vpst\;vshlltt.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
+ "vpst\;<mve_insn>t.<supf>%#<V_sz_elem>\t%q0, %q2, %3"
[(set_attr "type" "mve_move")
(set_attr "length""8")])
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 10/10] arm: [MVE intrinsics] rework vshllbq vshlltq
2023-05-05 16:48 [PATCH 01/10] arm: [MVE intrinsics] add unary shape Christophe Lyon
` (7 preceding siblings ...)
2023-05-05 16:49 ` [PATCH 09/10] arm: [MVE intrinsics] factorize vshllbq vshlltq Christophe Lyon
@ 2023-05-05 16:49 ` Christophe Lyon
2023-05-09 8:25 ` [PATCH 01/10] arm: [MVE intrinsics] add unary shape Kyrylo Tkachov
9 siblings, 0 replies; 11+ messages in thread
From: Christophe Lyon @ 2023-05-05 16:49 UTC (permalink / raw)
To: gcc-patches, kyrylo.tkachov, richard.earnshaw, richard.sandiford
Cc: Christophe Lyon
Implement vshllbq and vshlltq using the new MVE builtins framework.
2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
gcc/
* config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
* config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
* config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
* config/arm/arm_mve.h (vshlltq): Remove.
(vshllbq): Remove.
(vshllbq_m): Remove.
(vshlltq_m): Remove.
(vshllbq_x): Remove.
(vshlltq_x): Remove.
(vshlltq_n_u8): Remove.
(vshllbq_n_u8): Remove.
(vshlltq_n_s8): Remove.
(vshllbq_n_s8): Remove.
(vshlltq_n_u16): Remove.
(vshllbq_n_u16): Remove.
(vshlltq_n_s16): Remove.
(vshllbq_n_s16): Remove.
(vshllbq_m_n_s8): Remove.
(vshllbq_m_n_s16): Remove.
(vshllbq_m_n_u8): Remove.
(vshllbq_m_n_u16): Remove.
(vshlltq_m_n_s8): Remove.
(vshlltq_m_n_s16): Remove.
(vshlltq_m_n_u8): Remove.
(vshlltq_m_n_u16): Remove.
(vshllbq_x_n_s8): Remove.
(vshllbq_x_n_s16): Remove.
(vshllbq_x_n_u8): Remove.
(vshllbq_x_n_u16): Remove.
(vshlltq_x_n_s8): Remove.
(vshlltq_x_n_s16): Remove.
(vshlltq_x_n_u8): Remove.
(vshlltq_x_n_u16): Remove.
(__arm_vshlltq_n_u8): Remove.
(__arm_vshllbq_n_u8): Remove.
(__arm_vshlltq_n_s8): Remove.
(__arm_vshllbq_n_s8): Remove.
(__arm_vshlltq_n_u16): Remove.
(__arm_vshllbq_n_u16): Remove.
(__arm_vshlltq_n_s16): Remove.
(__arm_vshllbq_n_s16): Remove.
(__arm_vshllbq_m_n_s8): Remove.
(__arm_vshllbq_m_n_s16): Remove.
(__arm_vshllbq_m_n_u8): Remove.
(__arm_vshllbq_m_n_u16): Remove.
(__arm_vshlltq_m_n_s8): Remove.
(__arm_vshlltq_m_n_s16): Remove.
(__arm_vshlltq_m_n_u8): Remove.
(__arm_vshlltq_m_n_u16): Remove.
(__arm_vshllbq_x_n_s8): Remove.
(__arm_vshllbq_x_n_s16): Remove.
(__arm_vshllbq_x_n_u8): Remove.
(__arm_vshllbq_x_n_u16): Remove.
(__arm_vshlltq_x_n_s8): Remove.
(__arm_vshlltq_x_n_s16): Remove.
(__arm_vshlltq_x_n_u8): Remove.
(__arm_vshlltq_x_n_u16): Remove.
(__arm_vshlltq): Remove.
(__arm_vshllbq): Remove.
(__arm_vshllbq_m): Remove.
(__arm_vshlltq_m): Remove.
(__arm_vshllbq_x): Remove.
(__arm_vshlltq_x): Remove.
---
gcc/config/arm/arm-mve-builtins-base.cc | 2 +
gcc/config/arm/arm-mve-builtins-base.def | 2 +
gcc/config/arm/arm-mve-builtins-base.h | 2 +
gcc/config/arm/arm_mve.h | 424 -----------------------
4 files changed, 6 insertions(+), 424 deletions(-)
diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc
index 1dae12b445b..aafd85b293d 100644
--- a/gcc/config/arm/arm-mve-builtins-base.cc
+++ b/gcc/config/arm/arm-mve-builtins-base.cc
@@ -263,6 +263,8 @@ FUNCTION_WITH_M_N_NO_F (vrshlq, VRSHLQ)
FUNCTION_ONLY_N_NO_F (vrshrnbq, VRSHRNBQ)
FUNCTION_ONLY_N_NO_F (vrshrntq, VRSHRNTQ)
FUNCTION_ONLY_N_NO_F (vrshrq, VRSHRQ)
+FUNCTION_ONLY_N_NO_F (vshllbq, VSHLLBQ)
+FUNCTION_ONLY_N_NO_F (vshlltq, VSHLLTQ)
FUNCTION_WITH_M_N_R (vshlq, VSHLQ)
FUNCTION_ONLY_N_NO_F (vshrnbq, VSHRNBQ)
FUNCTION_ONLY_N_NO_F (vshrntq, VSHRNTQ)
diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def
index f868614fb6b..78c7515b972 100644
--- a/gcc/config/arm/arm-mve-builtins-base.def
+++ b/gcc/config/arm/arm-mve-builtins-base.def
@@ -64,6 +64,8 @@ DEF_MVE_FUNCTION (vrshlq, binary_round_lshift, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vrshrnbq, binary_rshift_narrow, integer_16_32, m_or_none)
DEF_MVE_FUNCTION (vrshrntq, binary_rshift_narrow, integer_16_32, m_or_none)
DEF_MVE_FUNCTION (vrshrq, binary_rshift, all_integer, mx_or_none)
+DEF_MVE_FUNCTION (vshllbq, binary_widen_n, integer_8_16, mx_or_none)
+DEF_MVE_FUNCTION (vshlltq, binary_widen_n, integer_8_16, mx_or_none)
DEF_MVE_FUNCTION (vshlq, binary_lshift, all_integer, mx_or_none)
DEF_MVE_FUNCTION (vshlq, binary_lshift_r, all_integer, m_or_none) // "_r" forms do not support the "x" predicate
DEF_MVE_FUNCTION (vshrnbq, binary_rshift_narrow, integer_16_32, m_or_none)
diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h
index f4960cbbea2..e5a83466512 100644
--- a/gcc/config/arm/arm-mve-builtins-base.h
+++ b/gcc/config/arm/arm-mve-builtins-base.h
@@ -74,6 +74,8 @@ extern const function_base *const vrshlq;
extern const function_base *const vrshrnbq;
extern const function_base *const vrshrntq;
extern const function_base *const vrshrq;
+extern const function_base *const vshllbq;
+extern const function_base *const vshlltq;
extern const function_base *const vshlq;
extern const function_base *const vshrnbq;
extern const function_base *const vshrntq;
diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index 97f0ef93ee9..8258ee0b802 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -85,8 +85,6 @@
#define vmulltq_poly(__a, __b) __arm_vmulltq_poly(__a, __b)
#define vmullbq_poly(__a, __b) __arm_vmullbq_poly(__a, __b)
#define vmlaldavq(__a, __b) __arm_vmlaldavq(__a, __b)
-#define vshlltq(__a, __imm) __arm_vshlltq(__a, __imm)
-#define vshllbq(__a, __imm) __arm_vshllbq(__a, __imm)
#define vqdmulltq(__a, __b) __arm_vqdmulltq(__a, __b)
#define vqdmullbq(__a, __b) __arm_vqdmullbq(__a, __b)
#define vmlsldavxq(__a, __b) __arm_vmlsldavxq(__a, __b)
@@ -208,8 +206,6 @@
#define vrmlaldavhaxq_p(__a, __b, __c, __p) __arm_vrmlaldavhaxq_p(__a, __b, __c, __p)
#define vrmlsldavhaq_p(__a, __b, __c, __p) __arm_vrmlsldavhaq_p(__a, __b, __c, __p)
#define vrmlsldavhaxq_p(__a, __b, __c, __p) __arm_vrmlsldavhaxq_p(__a, __b, __c, __p)
-#define vshllbq_m(__inactive, __a, __imm, __p) __arm_vshllbq_m(__inactive, __a, __imm, __p)
-#define vshlltq_m(__inactive, __a, __imm, __p) __arm_vshlltq_m(__inactive, __a, __imm, __p)
#define vstrbq_scatter_offset(__base, __offset, __value) __arm_vstrbq_scatter_offset(__base, __offset, __value)
#define vstrbq(__addr, __value) __arm_vstrbq(__addr, __value)
#define vstrwq_scatter_base(__addr, __offset, __value) __arm_vstrwq_scatter_base(__addr, __offset, __value)
@@ -300,8 +296,6 @@
#define vrev16q_x(__a, __p) __arm_vrev16q_x(__a, __p)
#define vrev32q_x(__a, __p) __arm_vrev32q_x(__a, __p)
#define vrev64q_x(__a, __p) __arm_vrev64q_x(__a, __p)
-#define vshllbq_x(__a, __imm, __p) __arm_vshllbq_x(__a, __imm, __p)
-#define vshlltq_x(__a, __imm, __p) __arm_vshlltq_x(__a, __imm, __p)
#define vadciq(__a, __b, __carry_out) __arm_vadciq(__a, __b, __carry_out)
#define vadciq_m(__inactive, __a, __b, __carry_out, __p) __arm_vadciq_m(__inactive, __a, __b, __carry_out, __p)
#define vadcq(__a, __b, __carry) __arm_vadcq(__a, __b, __carry)
@@ -643,8 +637,6 @@
#define vmulltq_poly_p8(__a, __b) __arm_vmulltq_poly_p8(__a, __b)
#define vmullbq_poly_p8(__a, __b) __arm_vmullbq_poly_p8(__a, __b)
#define vmlaldavq_u16(__a, __b) __arm_vmlaldavq_u16(__a, __b)
-#define vshlltq_n_u8(__a, __imm) __arm_vshlltq_n_u8(__a, __imm)
-#define vshllbq_n_u8(__a, __imm) __arm_vshllbq_n_u8(__a, __imm)
#define vbicq_n_u16(__a, __imm) __arm_vbicq_n_u16(__a, __imm)
#define vcmpneq_n_f16(__a, __b) __arm_vcmpneq_n_f16(__a, __b)
#define vcmpneq_f16(__a, __b) __arm_vcmpneq_f16(__a, __b)
@@ -682,14 +674,10 @@
#define vcaddq_rot90_f16(__a, __b) __arm_vcaddq_rot90_f16(__a, __b)
#define vcaddq_rot270_f16(__a, __b) __arm_vcaddq_rot270_f16(__a, __b)
#define vbicq_f16(__a, __b) __arm_vbicq_f16(__a, __b)
-#define vshlltq_n_s8(__a, __imm) __arm_vshlltq_n_s8(__a, __imm)
-#define vshllbq_n_s8(__a, __imm) __arm_vshllbq_n_s8(__a, __imm)
#define vbicq_n_s16(__a, __imm) __arm_vbicq_n_s16(__a, __imm)
#define vmulltq_poly_p16(__a, __b) __arm_vmulltq_poly_p16(__a, __b)
#define vmullbq_poly_p16(__a, __b) __arm_vmullbq_poly_p16(__a, __b)
#define vmlaldavq_u32(__a, __b) __arm_vmlaldavq_u32(__a, __b)
-#define vshlltq_n_u16(__a, __imm) __arm_vshlltq_n_u16(__a, __imm)
-#define vshllbq_n_u16(__a, __imm) __arm_vshllbq_n_u16(__a, __imm)
#define vbicq_n_u32(__a, __imm) __arm_vbicq_n_u32(__a, __imm)
#define vcmpneq_n_f32(__a, __b) __arm_vcmpneq_n_f32(__a, __b)
#define vcmpneq_f32(__a, __b) __arm_vcmpneq_f32(__a, __b)
@@ -727,8 +715,6 @@
#define vcaddq_rot90_f32(__a, __b) __arm_vcaddq_rot90_f32(__a, __b)
#define vcaddq_rot270_f32(__a, __b) __arm_vcaddq_rot270_f32(__a, __b)
#define vbicq_f32(__a, __b) __arm_vbicq_f32(__a, __b)
-#define vshlltq_n_s16(__a, __imm) __arm_vshlltq_n_s16(__a, __imm)
-#define vshllbq_n_s16(__a, __imm) __arm_vshllbq_n_s16(__a, __imm)
#define vbicq_n_s32(__a, __imm) __arm_vbicq_n_s32(__a, __imm)
#define vrmlaldavhq_u32(__a, __b) __arm_vrmlaldavhq_u32(__a, __b)
#define vctp8q_m(__a, __p) __arm_vctp8q_m(__a, __p)
@@ -1265,14 +1251,6 @@
#define vrmlaldavhaxq_p_s32(__a, __b, __c, __p) __arm_vrmlaldavhaxq_p_s32(__a, __b, __c, __p)
#define vrmlsldavhaq_p_s32(__a, __b, __c, __p) __arm_vrmlsldavhaq_p_s32(__a, __b, __c, __p)
#define vrmlsldavhaxq_p_s32(__a, __b, __c, __p) __arm_vrmlsldavhaxq_p_s32(__a, __b, __c, __p)
-#define vshllbq_m_n_s8(__inactive, __a, __imm, __p) __arm_vshllbq_m_n_s8(__inactive, __a, __imm, __p)
-#define vshllbq_m_n_s16(__inactive, __a, __imm, __p) __arm_vshllbq_m_n_s16(__inactive, __a, __imm, __p)
-#define vshllbq_m_n_u8(__inactive, __a, __imm, __p) __arm_vshllbq_m_n_u8(__inactive, __a, __imm, __p)
-#define vshllbq_m_n_u16(__inactive, __a, __imm, __p) __arm_vshllbq_m_n_u16(__inactive, __a, __imm, __p)
-#define vshlltq_m_n_s8(__inactive, __a, __imm, __p) __arm_vshlltq_m_n_s8(__inactive, __a, __imm, __p)
-#define vshlltq_m_n_s16(__inactive, __a, __imm, __p) __arm_vshlltq_m_n_s16(__inactive, __a, __imm, __p)
-#define vshlltq_m_n_u8(__inactive, __a, __imm, __p) __arm_vshlltq_m_n_u8(__inactive, __a, __imm, __p)
-#define vshlltq_m_n_u16(__inactive, __a, __imm, __p) __arm_vshlltq_m_n_u16(__inactive, __a, __imm, __p)
#define vbicq_m_f32(__inactive, __a, __b, __p) __arm_vbicq_m_f32(__inactive, __a, __b, __p)
#define vbicq_m_f16(__inactive, __a, __b, __p) __arm_vbicq_m_f16(__inactive, __a, __b, __p)
#define vbrsrq_m_n_f32(__inactive, __a, __b, __p) __arm_vbrsrq_m_n_f32(__inactive, __a, __b, __p)
@@ -1701,14 +1679,6 @@
#define vrev64q_x_u8(__a, __p) __arm_vrev64q_x_u8(__a, __p)
#define vrev64q_x_u16(__a, __p) __arm_vrev64q_x_u16(__a, __p)
#define vrev64q_x_u32(__a, __p) __arm_vrev64q_x_u32(__a, __p)
-#define vshllbq_x_n_s8(__a, __imm, __p) __arm_vshllbq_x_n_s8(__a, __imm, __p)
-#define vshllbq_x_n_s16(__a, __imm, __p) __arm_vshllbq_x_n_s16(__a, __imm, __p)
-#define vshllbq_x_n_u8(__a, __imm, __p) __arm_vshllbq_x_n_u8(__a, __imm, __p)
-#define vshllbq_x_n_u16(__a, __imm, __p) __arm_vshllbq_x_n_u16(__a, __imm, __p)
-#define vshlltq_x_n_s8(__a, __imm, __p) __arm_vshlltq_x_n_s8(__a, __imm, __p)
-#define vshlltq_x_n_s16(__a, __imm, __p) __arm_vshlltq_x_n_s16(__a, __imm, __p)
-#define vshlltq_x_n_u8(__a, __imm, __p) __arm_vshlltq_x_n_u8(__a, __imm, __p)
-#define vshlltq_x_n_u16(__a, __imm, __p) __arm_vshlltq_x_n_u16(__a, __imm, __p)
#define vdupq_x_n_f16(__a, __p) __arm_vdupq_x_n_f16(__a, __p)
#define vdupq_x_n_f32(__a, __p) __arm_vdupq_x_n_f32(__a, __p)
#define vminnmq_x_f16(__a, __b, __p) __arm_vminnmq_x_f16(__a, __b, __p)
@@ -3454,20 +3424,6 @@ __arm_vmlaldavq_u16 (uint16x8_t __a, uint16x8_t __b)
return __builtin_mve_vmlaldavq_uv8hi (__a, __b);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_n_u8 (uint8x16_t __a, const int __imm)
-{
- return __builtin_mve_vshlltq_n_uv16qi (__a, __imm);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_n_u8 (uint8x16_t __a, const int __imm)
-{
- return __builtin_mve_vshllbq_n_uv16qi (__a, __imm);
-}
-
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbicq_n_u16 (uint16x8_t __a, const int __imm)
@@ -3531,20 +3487,6 @@ __arm_vmlaldavq_s16 (int16x8_t __a, int16x8_t __b)
return __builtin_mve_vmlaldavq_sv8hi (__a, __b);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_n_s8 (int8x16_t __a, const int __imm)
-{
- return __builtin_mve_vshlltq_n_sv16qi (__a, __imm);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_n_s8 (int8x16_t __a, const int __imm)
-{
- return __builtin_mve_vshllbq_n_sv16qi (__a, __imm);
-}
-
__extension__ extern __inline int16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbicq_n_s16 (int16x8_t __a, const int __imm)
@@ -3573,20 +3515,6 @@ __arm_vmlaldavq_u32 (uint32x4_t __a, uint32x4_t __b)
return __builtin_mve_vmlaldavq_uv4si (__a, __b);
}
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_n_u16 (uint16x8_t __a, const int __imm)
-{
- return __builtin_mve_vshlltq_n_uv8hi (__a, __imm);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_n_u16 (uint16x8_t __a, const int __imm)
-{
- return __builtin_mve_vshllbq_n_uv8hi (__a, __imm);
-}
-
__extension__ extern __inline uint32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbicq_n_u32 (uint32x4_t __a, const int __imm)
@@ -3650,20 +3578,6 @@ __arm_vmlaldavq_s32 (int32x4_t __a, int32x4_t __b)
return __builtin_mve_vmlaldavq_sv4si (__a, __b);
}
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_n_s16 (int16x8_t __a, const int __imm)
-{
- return __builtin_mve_vshlltq_n_sv8hi (__a, __imm);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_n_s16 (int16x8_t __a, const int __imm)
-{
- return __builtin_mve_vshllbq_n_sv8hi (__a, __imm);
-}
-
__extension__ extern __inline int32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbicq_n_s32 (int32x4_t __a, const int __imm)
@@ -6777,62 +6691,6 @@ __arm_vrmlsldavhaxq_p_s32 (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16
return __builtin_mve_vrmlsldavhaxq_p_sv4si (__a, __b, __c, __p);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_m_n_s8 (int16x8_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshllbq_m_n_sv16qi (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_m_n_s16 (int32x4_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshllbq_m_n_sv8hi (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_m_n_u8 (uint16x8_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshllbq_m_n_uv16qi (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_m_n_u16 (uint32x4_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshllbq_m_n_uv8hi (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_m_n_s8 (int16x8_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshlltq_m_n_sv16qi (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_m_n_s16 (int32x4_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshlltq_m_n_sv8hi (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_m_n_u8 (uint16x8_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshlltq_m_n_uv16qi (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_m_n_u16 (uint32x4_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshlltq_m_n_uv8hi (__inactive, __a, __imm, __p);
-}
-
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vstrbq_scatter_offset_s8 (int8_t * __base, uint8x16_t __offset, int8x16_t __value)
@@ -9360,62 +9218,6 @@ __arm_vrev64q_x_u32 (uint32x4_t __a, mve_pred16_t __p)
return __builtin_mve_vrev64q_m_uv4si (__arm_vuninitializedq_u32 (), __a, __p);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_x_n_s8 (int8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshllbq_m_n_sv16qi (__arm_vuninitializedq_s16 (), __a, __imm, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_x_n_s16 (int16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshllbq_m_n_sv8hi (__arm_vuninitializedq_s32 (), __a, __imm, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_x_n_u8 (uint8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshllbq_m_n_uv16qi (__arm_vuninitializedq_u16 (), __a, __imm, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_x_n_u16 (uint16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshllbq_m_n_uv8hi (__arm_vuninitializedq_u32 (), __a, __imm, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_x_n_s8 (int8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshlltq_m_n_sv16qi (__arm_vuninitializedq_s16 (), __a, __imm, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_x_n_s16 (int16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshlltq_m_n_sv8hi (__arm_vuninitializedq_s32 (), __a, __imm, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_x_n_u8 (uint8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshlltq_m_n_uv16qi (__arm_vuninitializedq_u16 (), __a, __imm, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_x_n_u16 (uint16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __builtin_mve_vshlltq_m_n_uv8hi (__arm_vuninitializedq_u32 (), __a, __imm, __p);
-}
-
__extension__ extern __inline int32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vadciq_s32 (int32x4_t __a, int32x4_t __b, unsigned * __carry_out)
@@ -14055,20 +13857,6 @@ __arm_vmlaldavq (uint16x8_t __a, uint16x8_t __b)
return __arm_vmlaldavq_u16 (__a, __b);
}
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq (uint8x16_t __a, const int __imm)
-{
- return __arm_vshlltq_n_u8 (__a, __imm);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq (uint8x16_t __a, const int __imm)
-{
- return __arm_vshllbq_n_u8 (__a, __imm);
-}
-
__extension__ extern __inline uint16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbicq (uint16x8_t __a, const int __imm)
@@ -14132,20 +13920,6 @@ __arm_vmlaldavq (int16x8_t __a, int16x8_t __b)
return __arm_vmlaldavq_s16 (__a, __b);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq (int8x16_t __a, const int __imm)
-{
- return __arm_vshlltq_n_s8 (__a, __imm);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq (int8x16_t __a, const int __imm)
-{
- return __arm_vshllbq_n_s8 (__a, __imm);
-}
-
__extension__ extern __inline int16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbicq (int16x8_t __a, const int __imm)
@@ -14174,20 +13948,6 @@ __arm_vmlaldavq (uint32x4_t __a, uint32x4_t __b)
return __arm_vmlaldavq_u32 (__a, __b);
}
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq (uint16x8_t __a, const int __imm)
-{
- return __arm_vshlltq_n_u16 (__a, __imm);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq (uint16x8_t __a, const int __imm)
-{
- return __arm_vshllbq_n_u16 (__a, __imm);
-}
-
__extension__ extern __inline uint32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbicq (uint32x4_t __a, const int __imm)
@@ -14251,20 +14011,6 @@ __arm_vmlaldavq (int32x4_t __a, int32x4_t __b)
return __arm_vmlaldavq_s32 (__a, __b);
}
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq (int16x8_t __a, const int __imm)
-{
- return __arm_vshlltq_n_s16 (__a, __imm);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq (int16x8_t __a, const int __imm)
-{
- return __arm_vshllbq_n_s16 (__a, __imm);
-}
-
__extension__ extern __inline int32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vbicq (int32x4_t __a, const int __imm)
@@ -17338,62 +17084,6 @@ __arm_vrmlsldavhaxq_p (int64_t __a, int32x4_t __b, int32x4_t __c, mve_pred16_t _
return __arm_vrmlsldavhaxq_p_s32 (__a, __b, __c, __p);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_m (int16x8_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshllbq_m_n_s8 (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_m (int32x4_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshllbq_m_n_s16 (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_m (uint16x8_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshllbq_m_n_u8 (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_m (uint32x4_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshllbq_m_n_u16 (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_m (int16x8_t __inactive, int8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshlltq_m_n_s8 (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_m (int32x4_t __inactive, int16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshlltq_m_n_s16 (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_m (uint16x8_t __inactive, uint8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshlltq_m_n_u8 (__inactive, __a, __imm, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_m (uint32x4_t __inactive, uint16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshlltq_m_n_u16 (__inactive, __a, __imm, __p);
-}
-
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vstrbq_scatter_offset (int8_t * __base, uint8x16_t __offset, int8x16_t __value)
@@ -19424,62 +19114,6 @@ __arm_vrev64q_x (uint32x4_t __a, mve_pred16_t __p)
return __arm_vrev64q_x_u32 (__a, __p);
}
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_x (int8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshllbq_x_n_s8 (__a, __imm, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_x (int16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshllbq_x_n_s16 (__a, __imm, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_x (uint8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshllbq_x_n_u8 (__a, __imm, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshllbq_x (uint16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshllbq_x_n_u16 (__a, __imm, __p);
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_x (int8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshlltq_x_n_s8 (__a, __imm, __p);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_x (int16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshlltq_x_n_s16 (__a, __imm, __p);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_x (uint8x16_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshlltq_x_n_u8 (__a, __imm, __p);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vshlltq_x (uint16x8_t __a, const int __imm, mve_pred16_t __p)
-{
- return __arm_vshlltq_x_n_u16 (__a, __imm, __p);
-}
-
__extension__ extern __inline int32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
__arm_vadciq (int32x4_t __a, int32x4_t __b, unsigned * __carry_out)
@@ -22531,20 +22165,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vminnmvq_f16 (__ARM_mve_coerce2(p0, double), __ARM_mve_coerce(__p1, float16x8_t)), \
int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vminnmvq_f32 (__ARM_mve_coerce2(p0, double), __ARM_mve_coerce(__p1, float32x4_t)));})
-#define __arm_vshlltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
- int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlltq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
- int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlltq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1));})
-
-#define __arm_vshllbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vshllbq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vshllbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
- int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshllbq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
- int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshllbq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1));})
-
#define __arm_vqshluq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
int (*)[__ARM_mve_type_int8x16_t]: __arm_vqshluq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
@@ -23973,20 +23593,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vmlaldavxq_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t)), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vmlaldavxq_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t)));})
-#define __arm_vshlltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlltq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlltq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
- int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlltq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
- int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlltq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1));})
-
-#define __arm_vshllbq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vshllbq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vshllbq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
- int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshllbq_n_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
- int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshllbq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1));})
-
#define __arm_vqdmulltq(p0,p1) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
@@ -24853,20 +24459,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int8x16_t]: __arm_vrev16q_x_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2), \
int (*)[__ARM_mve_type_uint8x16_t]: __arm_vrev16q_x_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2));})
-#define __arm_vshllbq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vshllbq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vshllbq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
- int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshllbq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
- int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshllbq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2, p3));})
-
-#define __arm_vshlltq_x(p1,p2,p3) ({ __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int8x16_t]: __arm_vshlltq_x_n_s8 (__ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
- int (*)[__ARM_mve_type_int16x8_t]: __arm_vshlltq_x_n_s16 (__ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
- int (*)[__ARM_mve_type_uint8x16_t]: __arm_vshlltq_x_n_u8 (__ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
- int (*)[__ARM_mve_type_uint16x8_t]: __arm_vshlltq_x_n_u16 (__ARM_mve_coerce(__p1, uint16x8_t), p2, p3));})
-
#define __arm_vdwdupq_x_u8(p1,p2,p3,p4) ({ __typeof(p1) __p1 = (p1); \
_Generic( (int (*)[__ARM_mve_typeid(__p1)])0, \
int (*)[__ARM_mve_type_int_n]: __arm_vdwdupq_x_n_u8 ((uint32_t) __p1, p2, p3, p4), \
@@ -25084,22 +24676,6 @@ extern void *__ARM_undef;
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t]: __arm_vqrdmlsdhq_m_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16x8_t), p3), \
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t]: __arm_vqrdmlsdhq_m_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32x4_t), p3));})
-#define __arm_vshllbq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int8x16_t]: __arm_vshllbq_m_n_s8 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t]: __arm_vshllbq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vshllbq_m_n_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vshllbq_m_n_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3));})
-
-#define __arm_vshlltq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
- __typeof(p1) __p1 = (p1); \
- _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
- int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int8x16_t]: __arm_vshlltq_m_n_s8 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int8x16_t), p2, p3), \
- int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int16x8_t]: __arm_vshlltq_m_n_s16 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int16x8_t), p2, p3), \
- int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint8x16_t]: __arm_vshlltq_m_n_u8 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint8x16_t), p2, p3), \
- int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint16x8_t]: __arm_vshlltq_m_n_u16 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint16x8_t), p2, p3));})
-
#define __arm_vmlaldavaq_p(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
__typeof(p1) __p1 = (p1); \
__typeof(p2) __p2 = (p2); \
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* RE: [PATCH 01/10] arm: [MVE intrinsics] add unary shape
2023-05-05 16:48 [PATCH 01/10] arm: [MVE intrinsics] add unary shape Christophe Lyon
` (8 preceding siblings ...)
2023-05-05 16:49 ` [PATCH 10/10] arm: [MVE intrinsics] rework " Christophe Lyon
@ 2023-05-09 8:25 ` Kyrylo Tkachov
9 siblings, 0 replies; 11+ messages in thread
From: Kyrylo Tkachov @ 2023-05-09 8:25 UTC (permalink / raw)
To: Christophe Lyon, gcc-patches, Richard Earnshaw, Richard Sandiford
Cc: Christophe Lyon
> -----Original Message-----
> From: Christophe Lyon <christophe.lyon@arm.com>
> Sent: Friday, May 5, 2023 5:49 PM
> To: gcc-patches@gcc.gnu.org; Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>;
> Richard Earnshaw <Richard.Earnshaw@arm.com>; Richard Sandiford
> <Richard.Sandiford@arm.com>
> Cc: Christophe Lyon <Christophe.Lyon@arm.com>
> Subject: [PATCH 01/10] arm: [MVE intrinsics] add unary shape
>
> This patch adds the unary shape description.
I had looked at the series over the weekend, the series is ok for trunk.
Thanks,
Kyrill
>
> 2022-09-08 Christophe Lyon <christophe.lyon@arm.com>
>
> gcc/
> * config/arm/arm-mve-builtins-shapes.cc (unary): New.
> * config/arm/arm-mve-builtins-shapes.h (unary): New.
> ---
> gcc/config/arm/arm-mve-builtins-shapes.cc | 27 +++++++++++++++++++++++
> gcc/config/arm/arm-mve-builtins-shapes.h | 1 +
> 2 files changed, 28 insertions(+)
>
> diff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc b/gcc/config/arm/arm-
> mve-builtins-shapes.cc
> index 7078f7d7220..7d39cf79aec 100644
> --- a/gcc/config/arm/arm-mve-builtins-shapes.cc
> +++ b/gcc/config/arm/arm-mve-builtins-shapes.cc
> @@ -786,6 +786,33 @@ struct inherent_def : public nonoverloaded_base
> };
> SHAPE (inherent)
>
> +/* <T0>_t vfoo[_t0](<T0>_t)
> +
> + i.e. the standard shape for unary operations that operate on
> + uniform types.
> +
> + Example: vabsq.
> + int8x16_t [__arm_]vabsq[_s8](int8x16_t a)
> + int8x16_t [__arm_]vabsq_m[_s8](int8x16_t inactive, int8x16_t a,
> mve_pred16_t p)
> + int8x16_t [__arm_]vabsq_x[_s8](int8x16_t a, mve_pred16_t p) */
> +struct unary_def : public overloaded_base<0>
> +{
> + void
> + build (function_builder &b, const function_group_info &group,
> + bool preserve_user_namespace) const override
> + {
> + b.add_overloaded_functions (group, MODE_none,
> preserve_user_namespace);
> + build_all (b, "v0,v0", group, MODE_none, preserve_user_namespace);
> + }
> +
> + tree
> + resolve (function_resolver &r) const override
> + {
> + return r.resolve_unary ();
> + }
> +};
> +SHAPE (unary)
> +
> /* <T0>_t foo_t0[_t1](<T1>_t)
>
> where the target type <t0> must be specified explicitly but the source
> diff --git a/gcc/config/arm/arm-mve-builtins-shapes.h b/gcc/config/arm/arm-
> mve-builtins-shapes.h
> index 09e00b69e63..bd7e11b89f6 100644
> --- a/gcc/config/arm/arm-mve-builtins-shapes.h
> +++ b/gcc/config/arm/arm-mve-builtins-shapes.h
> @@ -45,6 +45,7 @@ namespace arm_mve
> extern const function_shape *const binary_rshift_narrow_unsigned;
> extern const function_shape *const create;
> extern const function_shape *const inherent;
> + extern const function_shape *const unary;
> extern const function_shape *const unary_convert;
>
> } /* end namespace arm_mve::shapes */
> --
> 2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2023-05-09 8:25 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-05-05 16:48 [PATCH 01/10] arm: [MVE intrinsics] add unary shape Christophe Lyon
2023-05-05 16:48 ` [PATCH 02/10] arm: [MVE intrinsics] factorize several unary operations Christophe Lyon
2023-05-05 16:48 ` [PATCH 03/10] arm: [MVE intrinsics] rework vabsq vnegq vclsq vclzq, vqabsq, vqnegq Christophe Lyon
2023-05-05 16:49 ` [PATCH 04/10] arm: [MVE intrinsics] rework vrndq vrndaq vrndmq vrndnq vrndpq vrndxq Christophe Lyon
2023-05-05 16:49 ` [PATCH 05/10] arm: [MVE intrinsics] add binary_move_narrow and binary_move_narrow_unsigned shapes Christophe Lyon
2023-05-05 16:49 ` [PATCH 06/10] arm: [MVE intrinsics] factorize vmovnbq vmovntq vqmovnbq vqmovntq vqmovunbq vqmovuntq Christophe Lyon
2023-05-05 16:49 ` [PATCH 07/10] arm: [MVE intrinsics] rework " Christophe Lyon
2023-05-05 16:49 ` [PATCH 08/10] arm: [MVE intrinsics] add binary_widen_n shape Christophe Lyon
2023-05-05 16:49 ` [PATCH 09/10] arm: [MVE intrinsics] factorize vshllbq vshlltq Christophe Lyon
2023-05-05 16:49 ` [PATCH 10/10] arm: [MVE intrinsics] rework " Christophe Lyon
2023-05-09 8:25 ` [PATCH 01/10] arm: [MVE intrinsics] add unary shape Kyrylo Tkachov
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