From: Lehua Ding <lehua.ding@rivai.ai>
To: rdapp.gcc@gmail.com, gcc-patches@gcc.gnu.org
Cc: juzhe.zhong@rivai.ai, kito.cheng@gmail.com, palmer@rivosinc.com,
jeffreyalaw@gmail.com
Subject: Re: [PATCH] RISC-V: Fix testcase failed when default -mcmodel=medany
Date: Wed, 19 Jul 2023 11:12:58 +0800 [thread overview]
Message-ID: <20230719031258.25644-1-lehua.ding@rivai.ai> (raw)
Hi Robin,
> In general I'm fine with this small change of course, I just wonder if
> the testcase is not brittle anyway. From what I can tell the respective
> change is independent of the actual number of registers so maybe it's enough to
> not compare the fully body but just make sure the addis are not present?
> That way, the test could also work for -march=rv64 (which saves one
> register less anyway regardless of mcmodel - but the change still helps)
> or maybe even with instruction scheduling. Would you mind checking this still?
I think you are rigth, I would like to remove the `-mcmodel=medany` option and
relax assert from `__riscv_save/restore_4` to `__riscv_save/restore_(3|4)` to let
this testcase not brittle on any -mcmodel. Then I'm also going to add another
testcase (I dont known how to run -march=rv32imafc and -march=rv64imafc on
the same testcase) that uses -march=rv64imafc.
Removing scheduling option will result in a change in the order of the assert
assembly, and I don't feel like removing it because the order may be different for
different microarchitectures.
Best,
Lehua
V2 patch:
gcc/testsuite/ChangeLog:
* gcc.target/riscv/stack_save_restore.c: Moved to...
* gcc.target/riscv/stack_save_restore_2.c: ...here.
* gcc.target/riscv/stack_save_restore_1.c: New test.
---
.../gcc.target/riscv/stack_save_restore_1.c | 40 +++++++++++++++++++
..._save_restore.c => stack_save_restore_2.c} | 6 +--
2 files changed, 43 insertions(+), 3 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/stack_save_restore_1.c
rename gcc/testsuite/gcc.target/riscv/{stack_save_restore.c => stack_save_restore_2.c} (90%)
diff --git a/gcc/testsuite/gcc.target/riscv/stack_save_restore_1.c b/gcc/testsuite/gcc.target/riscv/stack_save_restore_1.c
new file mode 100644
index 00000000000..255ce5f40c9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/stack_save_restore_1.c
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64imafc -mabi=lp64f -msave-restore -O2 -fno-schedule-insns -fno-schedule-insns2 -fno-unroll-loops -fno-peel-loops -fno-lto" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+char my_getchar();
+float getf();
+
+/*
+** bar:
+** call t0,__riscv_save_(3|4)
+** addi sp,sp,-2032
+** ...
+** li t0,-12288
+** add sp,sp,t0
+** ...
+** li t0,12288
+** add sp,sp,t0
+** ...
+** addi sp,sp,2032
+** tail __riscv_restore_(3|4)
+*/
+int bar()
+{
+ float volatile farray[3568];
+
+ float sum = 0;
+ float f1 = getf();
+ float f2 = getf();
+ float f3 = getf();
+ float f4 = getf();
+
+ for (int i = 0; i < 3568; i++)
+ {
+ farray[i] = my_getchar() * 1.2;
+ sum += farray[i];
+ }
+
+ return sum + f1 + f2 + f3 + f4;
+}
+
diff --git a/gcc/testsuite/gcc.target/riscv/stack_save_restore.c b/gcc/testsuite/gcc.target/riscv/stack_save_restore_2.c
similarity index 90%
rename from gcc/testsuite/gcc.target/riscv/stack_save_restore.c
rename to gcc/testsuite/gcc.target/riscv/stack_save_restore_2.c
index 522e706cfbf..4ce5e0118a4 100644
--- a/gcc/testsuite/gcc.target/riscv/stack_save_restore.c
+++ b/gcc/testsuite/gcc.target/riscv/stack_save_restore_2.c
@@ -6,8 +6,8 @@ char my_getchar();
float getf();
/*
-**bar:
-** call t0,__riscv_save_4
+** bar:
+** call t0,__riscv_save_(3|4)
** addi sp,sp,-2032
** ...
** li t0,-12288
@@ -17,7 +17,7 @@ float getf();
** add sp,sp,t0
** ...
** addi sp,sp,2032
-** tail __riscv_restore_4
+** tail __riscv_restore_(3|4)
*/
int bar()
{
--
2.36.3
next reply other threads:[~2023-07-19 3:13 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-19 3:12 Lehua Ding [this message]
2023-07-19 6:03 ` Robin Dapp
2023-07-19 7:20 ` =?gb18030?B?TGVodWEgRGluZw==?=
-- strict thread matches above, loose matches on Subject: below --
2023-07-18 7:42 Lehua Ding
2023-07-18 7:51 ` juzhe.zhong
2023-07-18 8:18 ` Robin Dapp
2023-07-18 8:43 ` Lehua Ding
2023-07-18 10:03 ` Robin Dapp
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