* [PATCH] LoongArch: gcc12: Implement option save/restore.
@ 2024-03-17 2:02 Lulu Cheng
2024-03-17 2:02 ` [PATCH] LoongArch: gcc13: " Lulu Cheng
2024-04-01 3:27 ` Re:[pushed] [PATCH] LoongArch: gcc12: " chenglulu
0 siblings, 2 replies; 4+ messages in thread
From: Lulu Cheng @ 2024-03-17 2:02 UTC (permalink / raw)
To: gcc-patches; +Cc: xry111, i, xuchenghua, chenglulu
LTO option streaming and target attributes both require per-function
target configuration, which is achieved via option save/restore.
We implement TARGET_OPTION_{SAVE,RESTORE} to switch the la_target
context in addition to other automatically maintained option states
(via the "Save" option property in the .opt files).
PR target/113233
gcc/ChangeLog:
* config/loongarch/genopts/loongarch.opt.in: Mark options with
the "Save" property.
* config/loongarch/loongarch-opts.cc
(loongarch_update_gcc_opt_status): Update the value of the
la_target to global_options.
* config/loongarch/loongarch-opts.h
(loongarch_update_gcc_opt_status): Add a function declaration.
* config/loongarch/loongarch.cc
(loongarch_option_override_internal): Call the function
loongarch_update_gcc_opt_status.
(loongarch_option_save): New functions.
(loongarch_option_restore): Likewise.
(TARGET_OPTION_SAVE): Define macro.
(TARGET_OPTION_RESTORE): Likewise.
* config/loongarch/loongarch.opt: Regenerate.
---
gcc/config/loongarch/genopts/loongarch.opt.in | 22 ++++++------
gcc/config/loongarch/loongarch-opts.cc | 22 ++++++++++++
gcc/config/loongarch/loongarch-opts.h | 6 ++++
gcc/config/loongarch/loongarch.cc | 34 +++++++++++++++++--
gcc/config/loongarch/loongarch.opt | 22 ++++++------
5 files changed, 82 insertions(+), 24 deletions(-)
diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in b/gcc/config/loongarch/genopts/loongarch.opt.in
index 420a3941b3b..a3107cb2294 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -58,7 +58,7 @@ EnumValue
Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64)
m@@OPTSTR_ISA_EXT_FPU@@=
-Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN)
+Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save
-m@@OPTSTR_ISA_EXT_FPU@@=FPU Generate code for the given FPU.
m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@
@@ -92,11 +92,11 @@ EnumValue
Enum(cpu_type) String(@@STR_CPU_LA464@@) Value(CPU_LA464)
m@@OPTSTR_ARCH@@=
-Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN)
+Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save
-m@@OPTSTR_ARCH@@=PROCESSOR Generate code for the given PROCESSOR ISA.
m@@OPTSTR_TUNE@@=
-Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN)
+Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save
-m@@OPTSTR_TUNE@@=PROCESSOR Generate optimized code for PROCESSOR.
@@ -127,31 +127,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN
mbranch-cost=
-Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
+Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save
-mbranch-cost=COST Set the cost of branches to roughly COST instructions.
mcheck-zero-division
-Target Mask(CHECK_ZERO_DIV)
+Target Mask(CHECK_ZERO_DIV) Save
Trap on integer divide by zero.
mcond-move-int
-Target Var(TARGET_COND_MOVE_INT) Init(1)
+Target Var(TARGET_COND_MOVE_INT) Init(1) Save
Conditional moves for integral are enabled.
mcond-move-float
-Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
+Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save
Conditional moves for float are enabled.
mmemcpy
-Target Mask(MEMCPY)
+Target Mask(MEMCPY) Save
Prevent optimizing block moves, which is also the default behavior of -Os.
mstrict-align
-Target Var(TARGET_STRICT_ALIGN) Init(0)
+Target Var(TARGET_STRICT_ALIGN) Init(0) Save
Do not generate unaligned memory accesses.
mmax-inline-memcpy-size=
-Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024)
+Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save
-mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024.
; The code model option names for -mcmodel.
@@ -175,7 +175,7 @@ EnumValue
Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME)
mcmodel=
-Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL)
+Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save
Specify the code model.
mrelax
diff --git a/gcc/config/loongarch/loongarch-opts.cc b/gcc/config/loongarch/loongarch-opts.cc
index eb9c2a52f9e..b55baeccd2f 100644
--- a/gcc/config/loongarch/loongarch-opts.cc
+++ b/gcc/config/loongarch/loongarch-opts.cc
@@ -575,3 +575,25 @@ multilib_enabled_abi_list ()
return XOBFINISH (&msg_obstack, const char *);
}
+
+/* option status feedback for "gcc --help=target -Q" */
+void
+loongarch_update_gcc_opt_status (struct loongarch_target *target,
+ struct gcc_options *opts,
+ struct gcc_options *opts_set)
+{
+ (void) opts_set;
+
+ /* status of -mabi */
+ opts->x_la_opt_abi_base = target->abi.base;
+
+ /* status of -march and -mtune */
+ opts->x_la_opt_cpu_arch = target->cpu_arch;
+ opts->x_la_opt_cpu_tune = target->cpu_tune;
+
+ /* status of -mcmodel */
+ opts->x_la_opt_cmodel = target->cmodel;
+
+ /* status of -mfpu */
+ opts->x_la_opt_fpu = target->isa.fpu;
+}
diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h
index b4115dd7f85..0557fff630d 100644
--- a/gcc/config/loongarch/loongarch-opts.h
+++ b/gcc/config/loongarch/loongarch-opts.h
@@ -39,6 +39,12 @@ loongarch_config_target (struct loongarch_target *target,
int opt_arch, int opt_tune, int opt_fpu,
int opt_abi_base, int opt_abi_ext,
int opt_cmodel, int follow_multilib_list);
+
+/* option status feedback for "gcc --help=target -Q" */
+void
+loongarch_update_gcc_opt_status (struct loongarch_target *target,
+ struct gcc_options *opts,
+ struct gcc_options *opts_set);
#endif
diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
index 41819eba3d5..33b1919e7a3 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -5502,7 +5502,8 @@ loongarch_init_machine_status (void)
}
static void
-loongarch_option_override_internal (struct gcc_options *opts)
+loongarch_option_override_internal (struct gcc_options *opts,
+ struct gcc_options *opts_set)
{
int i, regno, mode;
@@ -5514,6 +5515,8 @@ loongarch_option_override_internal (struct gcc_options *opts)
la_opt_cpu_arch, la_opt_cpu_tune, la_opt_fpu,
la_opt_abi_base, la_opt_abi_ext, la_opt_cmodel, 0);
+ loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
+
if (TARGET_ABI_LP64)
flag_pcc_struct_return = 0;
@@ -5576,7 +5579,30 @@ loongarch_option_override_internal (struct gcc_options *opts)
static void
loongarch_option_override (void)
{
- loongarch_option_override_internal (&global_options);
+ loongarch_option_override_internal (&global_options, &global_options_set);
+}
+
+/* Implement TARGET_OPTION_SAVE. */
+static void
+loongarch_option_save (struct cl_target_option *,
+ struct gcc_options *opts,
+ struct gcc_options *opts_set)
+{
+ loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
+}
+
+/* Implement TARGET_OPTION_RESTORE. */
+static void
+loongarch_option_restore (struct gcc_options *,
+ struct gcc_options *,
+ struct cl_target_option *ptr)
+{
+ la_target.cpu_arch = ptr->x_la_opt_cpu_arch;
+ la_target.cpu_tune = ptr->x_la_opt_cpu_tune;
+
+ la_target.isa.fpu = ptr->x_la_opt_fpu;
+
+ la_target.cmodel = ptr->x_la_opt_cmodel;
}
/* Implement TARGET_CONDITIONAL_REGISTER_USAGE. */
@@ -5798,6 +5824,10 @@ loongarch_starting_frame_offset (void)
#undef TARGET_OPTION_OVERRIDE
#define TARGET_OPTION_OVERRIDE loongarch_option_override
+#define TARGET_OPTION_SAVE loongarch_option_save
+#undef TARGET_OPTION_RESTORE
+#define TARGET_OPTION_RESTORE loongarch_option_restore
+
#undef TARGET_LEGITIMIZE_ADDRESS
#define TARGET_LEGITIMIZE_ADDRESS loongarch_legitimize_address
diff --git a/gcc/config/loongarch/loongarch.opt b/gcc/config/loongarch/loongarch.opt
index 3a39dcbd92e..7aef075c8c1 100644
--- a/gcc/config/loongarch/loongarch.opt
+++ b/gcc/config/loongarch/loongarch.opt
@@ -65,7 +65,7 @@ EnumValue
Enum(isa_ext_fpu) String(64) Value(ISA_EXT_FPU64)
mfpu=
-Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN)
+Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save
-mfpu=FPU Generate code for the given FPU.
mfpu=0
@@ -99,11 +99,11 @@ EnumValue
Enum(cpu_type) String(la464) Value(CPU_LA464)
march=
-Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN)
+Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save
-march=PROCESSOR Generate code for the given PROCESSOR ISA.
mtune=
-Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN)
+Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save
-mtune=PROCESSOR Generate optimized code for PROCESSOR.
@@ -134,31 +134,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN
mbranch-cost=
-Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
+Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save
-mbranch-cost=COST Set the cost of branches to roughly COST instructions.
mcheck-zero-division
-Target Mask(CHECK_ZERO_DIV)
+Target Mask(CHECK_ZERO_DIV) Save
Trap on integer divide by zero.
mcond-move-int
-Target Var(TARGET_COND_MOVE_INT) Init(1)
+Target Var(TARGET_COND_MOVE_INT) Init(1) Save
Conditional moves for integral are enabled.
mcond-move-float
-Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
+Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save
Conditional moves for float are enabled.
mmemcpy
-Target Mask(MEMCPY)
+Target Mask(MEMCPY) Save
Prevent optimizing block moves, which is also the default behavior of -Os.
mstrict-align
-Target Var(TARGET_STRICT_ALIGN) Init(0)
+Target Var(TARGET_STRICT_ALIGN) Init(0) Save
Do not generate unaligned memory accesses.
mmax-inline-memcpy-size=
-Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024)
+Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save
-mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024.
; The code model option names for -mcmodel.
@@ -182,7 +182,7 @@ EnumValue
Enum(cmodel) String(extreme) Value(CMODEL_EXTREME)
mcmodel=
-Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL)
+Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save
Specify the code model.
mrelax
--
2.39.3
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] LoongArch: gcc13: Implement option save/restore.
2024-03-17 2:02 [PATCH] LoongArch: gcc12: Implement option save/restore Lulu Cheng
@ 2024-03-17 2:02 ` Lulu Cheng
2024-04-01 3:26 ` [pushed][PATCH] " chenglulu
2024-04-01 3:27 ` Re:[pushed] [PATCH] LoongArch: gcc12: " chenglulu
1 sibling, 1 reply; 4+ messages in thread
From: Lulu Cheng @ 2024-03-17 2:02 UTC (permalink / raw)
To: gcc-patches; +Cc: xry111, i, xuchenghua, chenglulu
LTO option streaming and target attributes both require per-function
target configuration, which is achieved via option save/restore.
We implement TARGET_OPTION_{SAVE,RESTORE} to switch the la_target
context in addition to other automatically maintained option states
(via the "Save" option property in the .opt files).
PR target/113233
gcc/ChangeLog:
* config/loongarch/genopts/loongarch.opt.in: Mark options with
the "Save" property.
* config/loongarch/loongarch-opts.cc
(loongarch_update_gcc_opt_status): Update the value of the
la_target to global_options.
* config/loongarch/loongarch-opts.h
(loongarch_update_gcc_opt_status): Add a function declaration.
* config/loongarch/loongarch.cc
(loongarch_option_override_internal): Call the function
loongarch_update_gcc_opt_status.
(loongarch_option_save): New functions.
(loongarch_option_restore): Likewise.
(TARGET_OPTION_SAVE): Define macro.
(TARGET_OPTION_RESTORE): Likewise.
* config/loongarch/loongarch.opt: Regenerate.
---
gcc/config/loongarch/genopts/loongarch.opt.in | 24 ++++++-------
gcc/config/loongarch/loongarch-opts.cc | 22 ++++++++++++
gcc/config/loongarch/loongarch-opts.h | 6 ++++
gcc/config/loongarch/loongarch.cc | 34 +++++++++++++++++--
gcc/config/loongarch/loongarch.opt | 24 ++++++-------
5 files changed, 84 insertions(+), 26 deletions(-)
diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in b/gcc/config/loongarch/genopts/loongarch.opt.in
index 76acd35d39c..aea4f2a4f61 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -58,7 +58,7 @@ EnumValue
Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64)
m@@OPTSTR_ISA_EXT_FPU@@=
-Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN)
+Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save
-m@@OPTSTR_ISA_EXT_FPU@@=FPU Generate code for the given FPU.
m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@
@@ -92,11 +92,11 @@ EnumValue
Enum(cpu_type) String(@@STR_CPU_LA464@@) Value(CPU_LA464)
m@@OPTSTR_ARCH@@=
-Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN)
+Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save
-m@@OPTSTR_ARCH@@=PROCESSOR Generate code for the given PROCESSOR ISA.
m@@OPTSTR_TUNE@@=
-Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN)
+Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save
-m@@OPTSTR_TUNE@@=PROCESSOR Generate optimized code for PROCESSOR.
@@ -127,31 +127,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN
mbranch-cost=
-Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
+Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save
-mbranch-cost=COST Set the cost of branches to roughly COST instructions.
mcheck-zero-division
-Target Mask(CHECK_ZERO_DIV)
+Target Mask(CHECK_ZERO_DIV) Save
Trap on integer divide by zero.
mcond-move-int
-Target Var(TARGET_COND_MOVE_INT) Init(1)
+Target Var(TARGET_COND_MOVE_INT) Init(1) Save
Conditional moves for integral are enabled.
mcond-move-float
-Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
+Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save
Conditional moves for float are enabled.
mmemcpy
-Target Mask(MEMCPY)
+Target Mask(MEMCPY) Save
Prevent optimizing block moves, which is also the default behavior of -Os.
mstrict-align
-Target Var(TARGET_STRICT_ALIGN) Init(0)
+Target Var(TARGET_STRICT_ALIGN) Init(0) Save
Do not generate unaligned memory accesses.
mmax-inline-memcpy-size=
-Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024)
+Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save
-mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024.
mexplicit-relocs
@@ -182,11 +182,11 @@ EnumValue
Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME)
mcmodel=
-Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL)
+Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save
Specify the code model.
mdirect-extern-access
-Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0)
+Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0) Save
Avoid using the GOT to access external symbols.
mrelax
diff --git a/gcc/config/loongarch/loongarch-opts.cc b/gcc/config/loongarch/loongarch-opts.cc
index a52e25236ea..e158de9a12f 100644
--- a/gcc/config/loongarch/loongarch-opts.cc
+++ b/gcc/config/loongarch/loongarch-opts.cc
@@ -594,3 +594,25 @@ multilib_enabled_abi_list ()
return XOBFINISH (&msg_obstack, const char *);
}
+
+/* option status feedback for "gcc --help=target -Q" */
+void
+loongarch_update_gcc_opt_status (struct loongarch_target *target,
+ struct gcc_options *opts,
+ struct gcc_options *opts_set)
+{
+ (void) opts_set;
+
+ /* status of -mabi */
+ opts->x_la_opt_abi_base = target->abi.base;
+
+ /* status of -march and -mtune */
+ opts->x_la_opt_cpu_arch = target->cpu_arch;
+ opts->x_la_opt_cpu_tune = target->cpu_tune;
+
+ /* status of -mcmodel */
+ opts->x_la_opt_cmodel = target->cmodel;
+
+ /* status of -mfpu */
+ opts->x_la_opt_fpu = target->isa.fpu;
+}
diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h
index 02184e2991a..3b53562c29f 100644
--- a/gcc/config/loongarch/loongarch-opts.h
+++ b/gcc/config/loongarch/loongarch-opts.h
@@ -39,6 +39,12 @@ loongarch_config_target (struct loongarch_target *target,
int opt_arch, int opt_tune, int opt_fpu,
int opt_abi_base, int opt_abi_ext,
int opt_cmodel, int follow_multilib_list);
+
+/* option status feedback for "gcc --help=target -Q" */
+void
+loongarch_update_gcc_opt_status (struct loongarch_target *target,
+ struct gcc_options *opts,
+ struct gcc_options *opts_set);
#endif
diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
index e78b81cd8fc..0e0bd047369 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -6138,7 +6138,8 @@ loongarch_init_machine_status (void)
}
static void
-loongarch_option_override_internal (struct gcc_options *opts)
+loongarch_option_override_internal (struct gcc_options *opts,
+ struct gcc_options *opts_set)
{
int i, regno, mode;
@@ -6150,6 +6151,8 @@ loongarch_option_override_internal (struct gcc_options *opts)
la_opt_cpu_arch, la_opt_cpu_tune, la_opt_fpu,
la_opt_abi_base, la_opt_abi_ext, la_opt_cmodel, 0);
+ loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
+
if (TARGET_ABI_LP64)
flag_pcc_struct_return = 0;
@@ -6264,7 +6267,30 @@ loongarch_option_override_internal (struct gcc_options *opts)
static void
loongarch_option_override (void)
{
- loongarch_option_override_internal (&global_options);
+ loongarch_option_override_internal (&global_options, &global_options_set);
+}
+
+/* Implement TARGET_OPTION_SAVE. */
+static void
+loongarch_option_save (struct cl_target_option *,
+ struct gcc_options *opts,
+ struct gcc_options *opts_set)
+{
+ loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
+}
+
+/* Implement TARGET_OPTION_RESTORE. */
+static void
+loongarch_option_restore (struct gcc_options *,
+ struct gcc_options *,
+ struct cl_target_option *ptr)
+{
+ la_target.cpu_arch = ptr->x_la_opt_cpu_arch;
+ la_target.cpu_tune = ptr->x_la_opt_cpu_tune;
+
+ la_target.isa.fpu = ptr->x_la_opt_fpu;
+
+ la_target.cmodel = ptr->x_la_opt_cmodel;
}
/* Implement TARGET_CONDITIONAL_REGISTER_USAGE. */
@@ -6594,6 +6620,10 @@ loongarch_asan_shadow_offset (void)
#undef TARGET_OPTION_OVERRIDE
#define TARGET_OPTION_OVERRIDE loongarch_option_override
+#define TARGET_OPTION_SAVE loongarch_option_save
+#undef TARGET_OPTION_RESTORE
+#define TARGET_OPTION_RESTORE loongarch_option_restore
+
#undef TARGET_LEGITIMIZE_ADDRESS
#define TARGET_LEGITIMIZE_ADDRESS loongarch_legitimize_address
diff --git a/gcc/config/loongarch/loongarch.opt b/gcc/config/loongarch/loongarch.opt
index e61fbaed2c1..945f058eea8 100644
--- a/gcc/config/loongarch/loongarch.opt
+++ b/gcc/config/loongarch/loongarch.opt
@@ -65,7 +65,7 @@ EnumValue
Enum(isa_ext_fpu) String(64) Value(ISA_EXT_FPU64)
mfpu=
-Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN)
+Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save
-mfpu=FPU Generate code for the given FPU.
mfpu=0
@@ -99,11 +99,11 @@ EnumValue
Enum(cpu_type) String(la464) Value(CPU_LA464)
march=
-Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN)
+Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save
-march=PROCESSOR Generate code for the given PROCESSOR ISA.
mtune=
-Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN)
+Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save
-mtune=PROCESSOR Generate optimized code for PROCESSOR.
@@ -134,31 +134,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN
mbranch-cost=
-Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
+Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save
-mbranch-cost=COST Set the cost of branches to roughly COST instructions.
mcheck-zero-division
-Target Mask(CHECK_ZERO_DIV)
+Target Mask(CHECK_ZERO_DIV) Save
Trap on integer divide by zero.
mcond-move-int
-Target Var(TARGET_COND_MOVE_INT) Init(1)
+Target Var(TARGET_COND_MOVE_INT) Init(1) Save
Conditional moves for integral are enabled.
mcond-move-float
-Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
+Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save
Conditional moves for float are enabled.
mmemcpy
-Target Mask(MEMCPY)
+Target Mask(MEMCPY) Save
Prevent optimizing block moves, which is also the default behavior of -Os.
mstrict-align
-Target Var(TARGET_STRICT_ALIGN) Init(0)
+Target Var(TARGET_STRICT_ALIGN) Init(0) Save
Do not generate unaligned memory accesses.
mmax-inline-memcpy-size=
-Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024)
+Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save
-mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024.
mexplicit-relocs
@@ -189,11 +189,11 @@ EnumValue
Enum(cmodel) String(extreme) Value(CMODEL_EXTREME)
mcmodel=
-Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL)
+Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save
Specify the code model.
mdirect-extern-access
-Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0)
+Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0) Save
Avoid using the GOT to access external symbols.
mrelax
--
2.39.3
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [pushed][PATCH] LoongArch: gcc13: Implement option save/restore.
2024-03-17 2:02 ` [PATCH] LoongArch: gcc13: " Lulu Cheng
@ 2024-04-01 3:26 ` chenglulu
0 siblings, 0 replies; 4+ messages in thread
From: chenglulu @ 2024-04-01 3:26 UTC (permalink / raw)
To: gcc-patches; +Cc: xry111, i, xuchenghua
Pushed to r13-8545.
在 2024/3/17 上午10:02, Lulu Cheng 写道:
> LTO option streaming and target attributes both require per-function
> target configuration, which is achieved via option save/restore.
>
> We implement TARGET_OPTION_{SAVE,RESTORE} to switch the la_target
> context in addition to other automatically maintained option states
> (via the "Save" option property in the .opt files).
>
> PR target/113233
>
> gcc/ChangeLog:
>
> * config/loongarch/genopts/loongarch.opt.in: Mark options with
> the "Save" property.
> * config/loongarch/loongarch-opts.cc
> (loongarch_update_gcc_opt_status): Update the value of the
> la_target to global_options.
> * config/loongarch/loongarch-opts.h
> (loongarch_update_gcc_opt_status): Add a function declaration.
> * config/loongarch/loongarch.cc
> (loongarch_option_override_internal): Call the function
> loongarch_update_gcc_opt_status.
> (loongarch_option_save): New functions.
> (loongarch_option_restore): Likewise.
> (TARGET_OPTION_SAVE): Define macro.
> (TARGET_OPTION_RESTORE): Likewise.
> * config/loongarch/loongarch.opt: Regenerate.
> ---
> gcc/config/loongarch/genopts/loongarch.opt.in | 24 ++++++-------
> gcc/config/loongarch/loongarch-opts.cc | 22 ++++++++++++
> gcc/config/loongarch/loongarch-opts.h | 6 ++++
> gcc/config/loongarch/loongarch.cc | 34 +++++++++++++++++--
> gcc/config/loongarch/loongarch.opt | 24 ++++++-------
> 5 files changed, 84 insertions(+), 26 deletions(-)
>
> diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in b/gcc/config/loongarch/genopts/loongarch.opt.in
> index 76acd35d39c..aea4f2a4f61 100644
> --- a/gcc/config/loongarch/genopts/loongarch.opt.in
> +++ b/gcc/config/loongarch/genopts/loongarch.opt.in
> @@ -58,7 +58,7 @@ EnumValue
> Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64)
>
> m@@OPTSTR_ISA_EXT_FPU@@=
> -Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN)
> +Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save
> -m@@OPTSTR_ISA_EXT_FPU@@=FPU Generate code for the given FPU.
>
> m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@
> @@ -92,11 +92,11 @@ EnumValue
> Enum(cpu_type) String(@@STR_CPU_LA464@@) Value(CPU_LA464)
>
> m@@OPTSTR_ARCH@@=
> -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN)
> +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save
> -m@@OPTSTR_ARCH@@=PROCESSOR Generate code for the given PROCESSOR ISA.
>
> m@@OPTSTR_TUNE@@=
> -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN)
> +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save
> -m@@OPTSTR_TUNE@@=PROCESSOR Generate optimized code for PROCESSOR.
>
>
> @@ -127,31 +127,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN
>
>
> mbranch-cost=
> -Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
> +Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save
> -mbranch-cost=COST Set the cost of branches to roughly COST instructions.
>
> mcheck-zero-division
> -Target Mask(CHECK_ZERO_DIV)
> +Target Mask(CHECK_ZERO_DIV) Save
> Trap on integer divide by zero.
>
> mcond-move-int
> -Target Var(TARGET_COND_MOVE_INT) Init(1)
> +Target Var(TARGET_COND_MOVE_INT) Init(1) Save
> Conditional moves for integral are enabled.
>
> mcond-move-float
> -Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
> +Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save
> Conditional moves for float are enabled.
>
> mmemcpy
> -Target Mask(MEMCPY)
> +Target Mask(MEMCPY) Save
> Prevent optimizing block moves, which is also the default behavior of -Os.
>
> mstrict-align
> -Target Var(TARGET_STRICT_ALIGN) Init(0)
> +Target Var(TARGET_STRICT_ALIGN) Init(0) Save
> Do not generate unaligned memory accesses.
>
> mmax-inline-memcpy-size=
> -Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024)
> +Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save
> -mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024.
>
> mexplicit-relocs
> @@ -182,11 +182,11 @@ EnumValue
> Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME)
>
> mcmodel=
> -Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL)
> +Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save
> Specify the code model.
>
> mdirect-extern-access
> -Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0)
> +Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0) Save
> Avoid using the GOT to access external symbols.
>
> mrelax
> diff --git a/gcc/config/loongarch/loongarch-opts.cc b/gcc/config/loongarch/loongarch-opts.cc
> index a52e25236ea..e158de9a12f 100644
> --- a/gcc/config/loongarch/loongarch-opts.cc
> +++ b/gcc/config/loongarch/loongarch-opts.cc
> @@ -594,3 +594,25 @@ multilib_enabled_abi_list ()
>
> return XOBFINISH (&msg_obstack, const char *);
> }
> +
> +/* option status feedback for "gcc --help=target -Q" */
> +void
> +loongarch_update_gcc_opt_status (struct loongarch_target *target,
> + struct gcc_options *opts,
> + struct gcc_options *opts_set)
> +{
> + (void) opts_set;
> +
> + /* status of -mabi */
> + opts->x_la_opt_abi_base = target->abi.base;
> +
> + /* status of -march and -mtune */
> + opts->x_la_opt_cpu_arch = target->cpu_arch;
> + opts->x_la_opt_cpu_tune = target->cpu_tune;
> +
> + /* status of -mcmodel */
> + opts->x_la_opt_cmodel = target->cmodel;
> +
> + /* status of -mfpu */
> + opts->x_la_opt_fpu = target->isa.fpu;
> +}
> diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h
> index 02184e2991a..3b53562c29f 100644
> --- a/gcc/config/loongarch/loongarch-opts.h
> +++ b/gcc/config/loongarch/loongarch-opts.h
> @@ -39,6 +39,12 @@ loongarch_config_target (struct loongarch_target *target,
> int opt_arch, int opt_tune, int opt_fpu,
> int opt_abi_base, int opt_abi_ext,
> int opt_cmodel, int follow_multilib_list);
> +
> +/* option status feedback for "gcc --help=target -Q" */
> +void
> +loongarch_update_gcc_opt_status (struct loongarch_target *target,
> + struct gcc_options *opts,
> + struct gcc_options *opts_set);
> #endif
>
>
> diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
> index e78b81cd8fc..0e0bd047369 100644
> --- a/gcc/config/loongarch/loongarch.cc
> +++ b/gcc/config/loongarch/loongarch.cc
> @@ -6138,7 +6138,8 @@ loongarch_init_machine_status (void)
> }
>
> static void
> -loongarch_option_override_internal (struct gcc_options *opts)
> +loongarch_option_override_internal (struct gcc_options *opts,
> + struct gcc_options *opts_set)
> {
> int i, regno, mode;
>
> @@ -6150,6 +6151,8 @@ loongarch_option_override_internal (struct gcc_options *opts)
> la_opt_cpu_arch, la_opt_cpu_tune, la_opt_fpu,
> la_opt_abi_base, la_opt_abi_ext, la_opt_cmodel, 0);
>
> + loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
> +
> if (TARGET_ABI_LP64)
> flag_pcc_struct_return = 0;
>
> @@ -6264,7 +6267,30 @@ loongarch_option_override_internal (struct gcc_options *opts)
> static void
> loongarch_option_override (void)
> {
> - loongarch_option_override_internal (&global_options);
> + loongarch_option_override_internal (&global_options, &global_options_set);
> +}
> +
> +/* Implement TARGET_OPTION_SAVE. */
> +static void
> +loongarch_option_save (struct cl_target_option *,
> + struct gcc_options *opts,
> + struct gcc_options *opts_set)
> +{
> + loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
> +}
> +
> +/* Implement TARGET_OPTION_RESTORE. */
> +static void
> +loongarch_option_restore (struct gcc_options *,
> + struct gcc_options *,
> + struct cl_target_option *ptr)
> +{
> + la_target.cpu_arch = ptr->x_la_opt_cpu_arch;
> + la_target.cpu_tune = ptr->x_la_opt_cpu_tune;
> +
> + la_target.isa.fpu = ptr->x_la_opt_fpu;
> +
> + la_target.cmodel = ptr->x_la_opt_cmodel;
> }
>
> /* Implement TARGET_CONDITIONAL_REGISTER_USAGE. */
> @@ -6594,6 +6620,10 @@ loongarch_asan_shadow_offset (void)
>
> #undef TARGET_OPTION_OVERRIDE
> #define TARGET_OPTION_OVERRIDE loongarch_option_override
> +#define TARGET_OPTION_SAVE loongarch_option_save
> +#undef TARGET_OPTION_RESTORE
> +#define TARGET_OPTION_RESTORE loongarch_option_restore
> +
>
> #undef TARGET_LEGITIMIZE_ADDRESS
> #define TARGET_LEGITIMIZE_ADDRESS loongarch_legitimize_address
> diff --git a/gcc/config/loongarch/loongarch.opt b/gcc/config/loongarch/loongarch.opt
> index e61fbaed2c1..945f058eea8 100644
> --- a/gcc/config/loongarch/loongarch.opt
> +++ b/gcc/config/loongarch/loongarch.opt
> @@ -65,7 +65,7 @@ EnumValue
> Enum(isa_ext_fpu) String(64) Value(ISA_EXT_FPU64)
>
> mfpu=
> -Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN)
> +Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save
> -mfpu=FPU Generate code for the given FPU.
>
> mfpu=0
> @@ -99,11 +99,11 @@ EnumValue
> Enum(cpu_type) String(la464) Value(CPU_LA464)
>
> march=
> -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN)
> +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save
> -march=PROCESSOR Generate code for the given PROCESSOR ISA.
>
> mtune=
> -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN)
> +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save
> -mtune=PROCESSOR Generate optimized code for PROCESSOR.
>
>
> @@ -134,31 +134,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN
>
>
> mbranch-cost=
> -Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
> +Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save
> -mbranch-cost=COST Set the cost of branches to roughly COST instructions.
>
> mcheck-zero-division
> -Target Mask(CHECK_ZERO_DIV)
> +Target Mask(CHECK_ZERO_DIV) Save
> Trap on integer divide by zero.
>
> mcond-move-int
> -Target Var(TARGET_COND_MOVE_INT) Init(1)
> +Target Var(TARGET_COND_MOVE_INT) Init(1) Save
> Conditional moves for integral are enabled.
>
> mcond-move-float
> -Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
> +Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save
> Conditional moves for float are enabled.
>
> mmemcpy
> -Target Mask(MEMCPY)
> +Target Mask(MEMCPY) Save
> Prevent optimizing block moves, which is also the default behavior of -Os.
>
> mstrict-align
> -Target Var(TARGET_STRICT_ALIGN) Init(0)
> +Target Var(TARGET_STRICT_ALIGN) Init(0) Save
> Do not generate unaligned memory accesses.
>
> mmax-inline-memcpy-size=
> -Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024)
> +Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save
> -mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024.
>
> mexplicit-relocs
> @@ -189,11 +189,11 @@ EnumValue
> Enum(cmodel) String(extreme) Value(CMODEL_EXTREME)
>
> mcmodel=
> -Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL)
> +Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save
> Specify the code model.
>
> mdirect-extern-access
> -Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0)
> +Target Var(TARGET_DIRECT_EXTERN_ACCESS) Init(0) Save
> Avoid using the GOT to access external symbols.
>
> mrelax
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re:[pushed] [PATCH] LoongArch: gcc12: Implement option save/restore.
2024-03-17 2:02 [PATCH] LoongArch: gcc12: Implement option save/restore Lulu Cheng
2024-03-17 2:02 ` [PATCH] LoongArch: gcc13: " Lulu Cheng
@ 2024-04-01 3:27 ` chenglulu
1 sibling, 0 replies; 4+ messages in thread
From: chenglulu @ 2024-04-01 3:27 UTC (permalink / raw)
To: gcc-patches; +Cc: xry111, i, xuchenghua
Pushed to r12-10303.
在 2024/3/17 上午10:02, Lulu Cheng 写道:
> LTO option streaming and target attributes both require per-function
> target configuration, which is achieved via option save/restore.
>
> We implement TARGET_OPTION_{SAVE,RESTORE} to switch the la_target
> context in addition to other automatically maintained option states
> (via the "Save" option property in the .opt files).
>
> PR target/113233
>
> gcc/ChangeLog:
>
> * config/loongarch/genopts/loongarch.opt.in: Mark options with
> the "Save" property.
> * config/loongarch/loongarch-opts.cc
> (loongarch_update_gcc_opt_status): Update the value of the
> la_target to global_options.
> * config/loongarch/loongarch-opts.h
> (loongarch_update_gcc_opt_status): Add a function declaration.
> * config/loongarch/loongarch.cc
> (loongarch_option_override_internal): Call the function
> loongarch_update_gcc_opt_status.
> (loongarch_option_save): New functions.
> (loongarch_option_restore): Likewise.
> (TARGET_OPTION_SAVE): Define macro.
> (TARGET_OPTION_RESTORE): Likewise.
> * config/loongarch/loongarch.opt: Regenerate.
> ---
> gcc/config/loongarch/genopts/loongarch.opt.in | 22 ++++++------
> gcc/config/loongarch/loongarch-opts.cc | 22 ++++++++++++
> gcc/config/loongarch/loongarch-opts.h | 6 ++++
> gcc/config/loongarch/loongarch.cc | 34 +++++++++++++++++--
> gcc/config/loongarch/loongarch.opt | 22 ++++++------
> 5 files changed, 82 insertions(+), 24 deletions(-)
>
> diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in b/gcc/config/loongarch/genopts/loongarch.opt.in
> index 420a3941b3b..a3107cb2294 100644
> --- a/gcc/config/loongarch/genopts/loongarch.opt.in
> +++ b/gcc/config/loongarch/genopts/loongarch.opt.in
> @@ -58,7 +58,7 @@ EnumValue
> Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64)
>
> m@@OPTSTR_ISA_EXT_FPU@@=
> -Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN)
> +Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save
> -m@@OPTSTR_ISA_EXT_FPU@@=FPU Generate code for the given FPU.
>
> m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@
> @@ -92,11 +92,11 @@ EnumValue
> Enum(cpu_type) String(@@STR_CPU_LA464@@) Value(CPU_LA464)
>
> m@@OPTSTR_ARCH@@=
> -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN)
> +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save
> -m@@OPTSTR_ARCH@@=PROCESSOR Generate code for the given PROCESSOR ISA.
>
> m@@OPTSTR_TUNE@@=
> -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN)
> +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save
> -m@@OPTSTR_TUNE@@=PROCESSOR Generate optimized code for PROCESSOR.
>
>
> @@ -127,31 +127,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN
>
>
> mbranch-cost=
> -Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
> +Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save
> -mbranch-cost=COST Set the cost of branches to roughly COST instructions.
>
> mcheck-zero-division
> -Target Mask(CHECK_ZERO_DIV)
> +Target Mask(CHECK_ZERO_DIV) Save
> Trap on integer divide by zero.
>
> mcond-move-int
> -Target Var(TARGET_COND_MOVE_INT) Init(1)
> +Target Var(TARGET_COND_MOVE_INT) Init(1) Save
> Conditional moves for integral are enabled.
>
> mcond-move-float
> -Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
> +Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save
> Conditional moves for float are enabled.
>
> mmemcpy
> -Target Mask(MEMCPY)
> +Target Mask(MEMCPY) Save
> Prevent optimizing block moves, which is also the default behavior of -Os.
>
> mstrict-align
> -Target Var(TARGET_STRICT_ALIGN) Init(0)
> +Target Var(TARGET_STRICT_ALIGN) Init(0) Save
> Do not generate unaligned memory accesses.
>
> mmax-inline-memcpy-size=
> -Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024)
> +Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save
> -mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024.
>
> ; The code model option names for -mcmodel.
> @@ -175,7 +175,7 @@ EnumValue
> Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME)
>
> mcmodel=
> -Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL)
> +Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save
> Specify the code model.
>
> mrelax
> diff --git a/gcc/config/loongarch/loongarch-opts.cc b/gcc/config/loongarch/loongarch-opts.cc
> index eb9c2a52f9e..b55baeccd2f 100644
> --- a/gcc/config/loongarch/loongarch-opts.cc
> +++ b/gcc/config/loongarch/loongarch-opts.cc
> @@ -575,3 +575,25 @@ multilib_enabled_abi_list ()
>
> return XOBFINISH (&msg_obstack, const char *);
> }
> +
> +/* option status feedback for "gcc --help=target -Q" */
> +void
> +loongarch_update_gcc_opt_status (struct loongarch_target *target,
> + struct gcc_options *opts,
> + struct gcc_options *opts_set)
> +{
> + (void) opts_set;
> +
> + /* status of -mabi */
> + opts->x_la_opt_abi_base = target->abi.base;
> +
> + /* status of -march and -mtune */
> + opts->x_la_opt_cpu_arch = target->cpu_arch;
> + opts->x_la_opt_cpu_tune = target->cpu_tune;
> +
> + /* status of -mcmodel */
> + opts->x_la_opt_cmodel = target->cmodel;
> +
> + /* status of -mfpu */
> + opts->x_la_opt_fpu = target->isa.fpu;
> +}
> diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h
> index b4115dd7f85..0557fff630d 100644
> --- a/gcc/config/loongarch/loongarch-opts.h
> +++ b/gcc/config/loongarch/loongarch-opts.h
> @@ -39,6 +39,12 @@ loongarch_config_target (struct loongarch_target *target,
> int opt_arch, int opt_tune, int opt_fpu,
> int opt_abi_base, int opt_abi_ext,
> int opt_cmodel, int follow_multilib_list);
> +
> +/* option status feedback for "gcc --help=target -Q" */
> +void
> +loongarch_update_gcc_opt_status (struct loongarch_target *target,
> + struct gcc_options *opts,
> + struct gcc_options *opts_set);
> #endif
>
>
> diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
> index 41819eba3d5..33b1919e7a3 100644
> --- a/gcc/config/loongarch/loongarch.cc
> +++ b/gcc/config/loongarch/loongarch.cc
> @@ -5502,7 +5502,8 @@ loongarch_init_machine_status (void)
> }
>
> static void
> -loongarch_option_override_internal (struct gcc_options *opts)
> +loongarch_option_override_internal (struct gcc_options *opts,
> + struct gcc_options *opts_set)
> {
> int i, regno, mode;
>
> @@ -5514,6 +5515,8 @@ loongarch_option_override_internal (struct gcc_options *opts)
> la_opt_cpu_arch, la_opt_cpu_tune, la_opt_fpu,
> la_opt_abi_base, la_opt_abi_ext, la_opt_cmodel, 0);
>
> + loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
> +
> if (TARGET_ABI_LP64)
> flag_pcc_struct_return = 0;
>
> @@ -5576,7 +5579,30 @@ loongarch_option_override_internal (struct gcc_options *opts)
> static void
> loongarch_option_override (void)
> {
> - loongarch_option_override_internal (&global_options);
> + loongarch_option_override_internal (&global_options, &global_options_set);
> +}
> +
> +/* Implement TARGET_OPTION_SAVE. */
> +static void
> +loongarch_option_save (struct cl_target_option *,
> + struct gcc_options *opts,
> + struct gcc_options *opts_set)
> +{
> + loongarch_update_gcc_opt_status (&la_target, opts, opts_set);
> +}
> +
> +/* Implement TARGET_OPTION_RESTORE. */
> +static void
> +loongarch_option_restore (struct gcc_options *,
> + struct gcc_options *,
> + struct cl_target_option *ptr)
> +{
> + la_target.cpu_arch = ptr->x_la_opt_cpu_arch;
> + la_target.cpu_tune = ptr->x_la_opt_cpu_tune;
> +
> + la_target.isa.fpu = ptr->x_la_opt_fpu;
> +
> + la_target.cmodel = ptr->x_la_opt_cmodel;
> }
>
> /* Implement TARGET_CONDITIONAL_REGISTER_USAGE. */
> @@ -5798,6 +5824,10 @@ loongarch_starting_frame_offset (void)
>
> #undef TARGET_OPTION_OVERRIDE
> #define TARGET_OPTION_OVERRIDE loongarch_option_override
> +#define TARGET_OPTION_SAVE loongarch_option_save
> +#undef TARGET_OPTION_RESTORE
> +#define TARGET_OPTION_RESTORE loongarch_option_restore
> +
>
> #undef TARGET_LEGITIMIZE_ADDRESS
> #define TARGET_LEGITIMIZE_ADDRESS loongarch_legitimize_address
> diff --git a/gcc/config/loongarch/loongarch.opt b/gcc/config/loongarch/loongarch.opt
> index 3a39dcbd92e..7aef075c8c1 100644
> --- a/gcc/config/loongarch/loongarch.opt
> +++ b/gcc/config/loongarch/loongarch.opt
> @@ -65,7 +65,7 @@ EnumValue
> Enum(isa_ext_fpu) String(64) Value(ISA_EXT_FPU64)
>
> mfpu=
> -Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN)
> +Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) Init(M_OPTION_NOT_SEEN) Save
> -mfpu=FPU Generate code for the given FPU.
>
> mfpu=0
> @@ -99,11 +99,11 @@ EnumValue
> Enum(cpu_type) String(la464) Value(CPU_LA464)
>
> march=
> -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN)
> +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) Init(M_OPTION_NOT_SEEN) Save
> -march=PROCESSOR Generate code for the given PROCESSOR ISA.
>
> mtune=
> -Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN)
> +Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) Init(M_OPTION_NOT_SEEN) Save
> -mtune=PROCESSOR Generate optimized code for PROCESSOR.
>
>
> @@ -134,31 +134,31 @@ int la_opt_abi_ext = M_OPTION_NOT_SEEN
>
>
> mbranch-cost=
> -Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
> +Target RejectNegative Joined UInteger Var(loongarch_branch_cost) Save
> -mbranch-cost=COST Set the cost of branches to roughly COST instructions.
>
> mcheck-zero-division
> -Target Mask(CHECK_ZERO_DIV)
> +Target Mask(CHECK_ZERO_DIV) Save
> Trap on integer divide by zero.
>
> mcond-move-int
> -Target Var(TARGET_COND_MOVE_INT) Init(1)
> +Target Var(TARGET_COND_MOVE_INT) Init(1) Save
> Conditional moves for integral are enabled.
>
> mcond-move-float
> -Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
> +Target Var(TARGET_COND_MOVE_FLOAT) Init(1) Save
> Conditional moves for float are enabled.
>
> mmemcpy
> -Target Mask(MEMCPY)
> +Target Mask(MEMCPY) Save
> Prevent optimizing block moves, which is also the default behavior of -Os.
>
> mstrict-align
> -Target Var(TARGET_STRICT_ALIGN) Init(0)
> +Target Var(TARGET_STRICT_ALIGN) Init(0) Save
> Do not generate unaligned memory accesses.
>
> mmax-inline-memcpy-size=
> -Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024)
> +Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) Init(1024) Save
> -mmax-inline-memcpy-size=SIZE Set the max size of memcpy to inline, default is 1024.
>
> ; The code model option names for -mcmodel.
> @@ -182,7 +182,7 @@ EnumValue
> Enum(cmodel) String(extreme) Value(CMODEL_EXTREME)
>
> mcmodel=
> -Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL)
> +Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Save
> Specify the code model.
>
> mrelax
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2024-04-01 3:27 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-03-17 2:02 [PATCH] LoongArch: gcc12: Implement option save/restore Lulu Cheng
2024-03-17 2:02 ` [PATCH] LoongArch: gcc13: " Lulu Cheng
2024-04-01 3:26 ` [pushed][PATCH] " chenglulu
2024-04-01 3:27 ` Re:[pushed] [PATCH] LoongArch: gcc12: " chenglulu
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