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From: Eric Botcazou <botcazou@adacore.com>
To: Richard Biener <rguenther@suse.de>
Cc: YunQiang Su <wzssyqa@gmail.com>,
	gcc-patches@gcc.gnu.org, YunQiang Su <yunqiang.su@cipunited.com>,
	gcc-patches@gcc.gnu.org, pinskia@gmail.com,
	jeffreyalaw@gmail.com, ian@airs.com
Subject: Re: [PATCH v2] Store_bit_field_1: Use SUBREG instead of REG if possible
Date: Wed, 19 Jul 2023 11:45:56 +0200	[thread overview]
Message-ID: <2289802.ElGaqSPkdT@arcturus> (raw)
In-Reply-To: <nycvar.YFH.7.77.849.2307190911420.12935@jbgna.fhfr.qr>

> I don't see that.  That's definitely not what GCC expects here,
> the left-most word of the doubleword should be unchanged.
> 
> Your testcase should be a dg-do-run and probably more like
> 
> NOMIPS16 int __attribute__((noipa)) test (const unsigned char *buf)
> {
>   int val;
>   ((unsigned char*)&val)[0] = *buf++;
>   ((unsigned char*)&val)[1] = *buf++;
>   ((unsigned char*)&val)[2] = *buf++;
>   ((unsigned char*)&val)[3] = *buf++;
>   return val;
> }
> int main()
> {
>   int val = 0x01020304;
>   val = test (&val);
>   if (val != 0x01020304)
>     abort ();
> }
> 
> not sure if I got endianess correct.  Now, the question is what
> WORD_REGISTER_OPERATIONS implies for a bitfield insert and what
> the MIPS ABI says for returning SImode.

WORD_REGISTER_OPERATIONS must *not* be taken account for bit-fields, see e;g. 
word_register_operation_p:

/* Return true if X is an operation that always operates on the full
   registers for WORD_REGISTER_OPERATIONS architectures.  */

inline bool
word_register_operation_p (const_rtx x)
{
  switch (GET_CODE (x))
    {
    case CONST_INT:
    case ROTATE:
    case ROTATERT:
    case SIGN_EXTRACT:
    case ZERO_EXTRACT:
      return false;
    
    default:
      return true;
    }
}

-- 
Eric Botcazou



  parent reply	other threads:[~2023-07-19  9:45 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-19  4:16 YunQiang Su
2023-07-19  6:26 ` Richard Biener
2023-07-19  6:58   ` YunQiang Su
2023-07-19  7:22     ` Richard Biener
2023-07-19  8:21       ` YunQiang Su
2023-07-19  8:25         ` YunQiang Su
2023-07-19  8:50           ` YunQiang Su
2023-07-19  9:23         ` Richard Biener
2023-07-19  9:27           ` Richard Biener
2023-07-19  9:43           ` YunQiang Su
2023-07-19  9:45           ` Eric Botcazou [this message]
2023-07-19 10:12             ` YunQiang Su
2023-07-19 10:25               ` Richard Biener
2023-07-19 12:22                 ` Jeff Law
2023-07-20  7:09                   ` Richard Sandiford
2023-07-20  7:23                     ` Richard Biener
2023-07-20  9:22                       ` Richard Sandiford
2023-12-22  6:11                     ` YunQiang Su
2023-12-22  4:45                 ` YunQiang Su

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