From: Xi Ruoyao <xry111@xry111.site>
To: Lulu Cheng <chenglulu@loongson.cn>, WANG Xuerui <i@xen0n.name>,
gcc-patches@gcc.gnu.org
Cc: xuchenghua@loongson.cn, xujiahao <xujiahao@loongson.cn>
Subject: Re: [PATCH v3] LoongArch: Add prefetch instructions.
Date: Thu, 17 Nov 2022 00:22:26 +0800 [thread overview]
Message-ID: <22ed42cf42737eec212f3708a65a755f2af41c24.camel@xry111.site> (raw)
In-Reply-To: <05ac7d65-3f1a-92ff-401c-71fcc36dd422@loongson.cn>
On Wed, 2022-11-16 at 11:19 +0800, Lulu Cheng wrote:
> The "m" constraint is defined as follows:
> (define_memory_constraint "m"
> (and (match_code "mem")
> (match_test "loongarch_12bit_offset_address_p (XEXP (op, 0),
> mode)")))
> This setting must be a memory operand.
> ''ZD" constraint is a address operand.
> I think (mem:mode (address operand)) = memory operand.
Yes they are different. I tried reusing "m" in my previous attempt to
add prefetch instruction but it didn't work.
--
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University
next prev parent reply other threads:[~2022-11-16 16:22 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-16 2:10 Lulu Cheng
2022-11-16 3:06 ` WANG Xuerui
2022-11-16 3:19 ` Lulu Cheng
2022-11-16 16:22 ` Xi Ruoyao [this message]
2022-11-17 6:28 ` Xi Ruoyao
2022-11-23 3:08 ` [pushed][PATCH " chenglulu
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