Re: [PATCH] RISC-V: Support vfwnmacc/vfwmsac/vfwnmsac combine lowering

[Jeff Law <jeffreyalaw@gmail.com>]

On 6/28/23 05:55, Juzhe-Zhong wrote:
> Similar to vfwmacc. Add combine patterns as follows:
> 
> For vfwnmsac:
> 1. (set (reg) (fma (neg (float_extend (reg))) (float_extend (reg))) (reg) )))
> 2. (set (reg) (fma (neg (float_extend (reg))) (reg) (reg) )))
> 
> For vfwmsac:
> 1. (set (reg) (fma (float_extend (reg)) (float_extend (reg))) (neg (reg)) )))
> 2. (set (reg) (fma (float_extend (reg)) (reg) (neg (reg)) )))
> 
> For vfwnmacc:
> 1. (set (reg) (fma (neg (float_extend (reg))) (float_extend (reg))) (neg (reg)) )))
> 2. (set (reg) (fma (neg (float_extend (reg))) (reg) (neg (reg)) )))
> 
> gcc/ChangeLog:
> 
>          * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
>          (*single_widen_fnma<mode>): Ditto.
>          (*double_widen_fms<mode>): Ditto.
>          (*single_widen_fms<mode>): Ditto.
>          (*double_widen_fnms<mode>): Ditto.
>          (*single_widen_fnms<mode>): Ditto.
> 

> +
> +;; This helps to match ext + fnma.
> +(define_insn_and_split "*single_widen_fnma<mode>"
> +  [(set (match_operand:VWEXTF 0 "register_operand")
> +	(fma:VWEXTF
> +	  (neg:VWEXTF
> +	    (float_extend:VWEXTF
> +	      (match_operand:<V_DOUBLE_TRUNC> 2 "register_operand")))
> +	  (match_operand:VWEXTF 3 "register_operand")
> +	  (match_operand:VWEXTF 1 "register_operand")))]
I'd like to understand this better.  It looks like it's meant to be a 
bridge to another pattern.  However, it looks like it would be a 4->1 
pattern without needing a bridge.  So I'd like to know why that code 
isn't working.

Can you send the before/after combine dumps which show this bridge 
pattern being used?

The same concern exists with the other bridge patterns, but I don't 
think I need to see the before/after for each of them.



Thanks,
Jeff