[PATCH 0/3] RISC-V: Add stub support for existing extensions

[PATCH 0/3] RISC-V: Add stub support for existing extensions

[Tsukasa OI]

Hello,

After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
extensions") changed how do we handle unknown extensions, we have no
guarantee that we can share the same architectural string with Binutils
(specifically, the assembler).

To avoid compilation errors on shared Assembler-C/C++ projects, GCC should
support almost all extensions that Binutils support, even if the GCC does
not touch a thing.

In this patch set, it adds stub extension support along with its
implications (for GCC preprocessor support).

The author excluded those extensions:

1.  'Zicntr' and 'Zihpm'
    (because additional compatibility measures are required)
2.  'Q' and "Zqinx"
    (because GCC does not support 'Q' and 'Zqinx' is not ratified)

and included following extensions not yet supported by Binutils:

*   'Zcmp', 'Zcmt' and 'Zce' extensions
    They are ratified and if we only need a stub support, it's relatively
    easy to implement.

This patch set consists of three patches:

1.  Privileged Extensions
    Unlikely to cause merge conflicts and easy to implement.
2.  Vendor Extension ('XVentanaCondOps')
    Unlikely to cause merge conflicts unless someone tries to merge
    optimization using 'Zicond' with 'XVentanaCondOps' (because 'Zicond' and
    'XVentanaCondOps' are pretty much the same except encodings).
3.  Standard Unprivileged Extensions
    Likely to cause merge conflicts depending on the order to apply patches.
    In that case, prefer others (because this patchset adds *stub* support
    for those extensions).

On this patch set, I focused on adding stub support for new extensions in
GCC (in the GCC perspective) and not all Binutils' contents are ported.

I'll submit separate patch set to port additional implications (e.g.
'M' -> 'Zmmul', 'Zve32x' -> 'Zicsr').

And despite that I implemented stub 'Zce' support, its implications are not
complete (e.g. 'Zce' + 'F' -> 'Zcf' is not implemented and planned for the
next patch set).

Thanks,
Tsukasa




Tsukasa OI (3):
  RISC-V: Add stub support for existing extensions (privileged)
  RISC-V: Add stub support for existing extensions (vendor)
  RISC-V: Add stub support for existing extensions (unprivileged)

 gcc/common/config/riscv/riscv-common.cc    | 45 ++++++++++++++++++++++
 gcc/testsuite/gcc.target/riscv/predef-29.c | 35 +++++++++++++++++
 gcc/testsuite/gcc.target/riscv/predef-30.c | 27 +++++++++++++
 gcc/testsuite/gcc.target/riscv/predef-31.c | 31 +++++++++++++++
 4 files changed, 138 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-29.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-30.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-31.c


base-commit: 8be20733b38c200f375cacf698d6b85e76055bcd
-- 
2.41.0

[PATCH 1/3] RISC-V: Add stub support for existing extensions (privileged)

[Tsukasa OI]

From: Tsukasa OI <research_trasio@irq.a4lg.com>

After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
extensions") changed how do we handle unknown extensions, we have no
guarantee that we can share the same architectural string with Binutils
(specifically, the assembler).

To avoid compilation errors on shared Assembler-C/C++ projects, GCC should
support almost all extensions that Binutils support, even if the GCC does
not touch a thing.

As a start, this commit adds stub supported *privileged* extensions to
riscv_ext_version_table and its implications to riscv_implied_info
(all information is copied from Binutils' bfd/elfxx-riscv.c).

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc
	(riscv_implied_info): Add implications from privileged extensions.
	(riscv_ext_version_table): Add stub support for all privileged
	extensions supported by Binutils.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-29.c: New test for a stub privileged
	extension 'Smstateen' with some implications.
---
 gcc/common/config/riscv/riscv-common.cc    | 18 +++++++++++
 gcc/testsuite/gcc.target/riscv/predef-29.c | 35 ++++++++++++++++++++++
 2 files changed, 53 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-29.c

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 21f83f26371f..91b0316acfea 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -130,6 +130,14 @@ static const riscv_implied_info_t riscv_implied_info[] =
   {"zhinx", "zhinxmin"},
   {"zhinxmin", "zfinx"},
 
+  {"smaia", "ssaia"},
+  {"smstateen", "ssstateen"},
+  {"smepmp", "zicsr"},
+  {"ssaia", "zicsr"},
+  {"sscofpmf", "zicsr"},
+  {"ssstateen", "zicsr"},
+  {"sstc", "zicsr"},
+
   {NULL, NULL}
 };
 
@@ -264,8 +272,18 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
 
   {"zmmul", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"smaia",     ISA_SPEC_CLASS_NONE, 1, 0},
+  {"smepmp",    ISA_SPEC_CLASS_NONE, 1, 0},
+  {"smstateen", ISA_SPEC_CLASS_NONE, 1, 0},
+
+  {"ssaia",     ISA_SPEC_CLASS_NONE, 1, 0},
+  {"sscofpmf",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"ssstateen", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"sstc",      ISA_SPEC_CLASS_NONE, 1, 0},
+
   {"svinval", ISA_SPEC_CLASS_NONE, 1, 0},
   {"svnapot", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"svpbmt",  ISA_SPEC_CLASS_NONE, 1, 0},
 
   {"xtheadba", ISA_SPEC_CLASS_NONE, 1, 0},
   {"xtheadbb", ISA_SPEC_CLASS_NONE, 1, 0},
diff --git a/gcc/testsuite/gcc.target/riscv/predef-29.c b/gcc/testsuite/gcc.target/riscv/predef-29.c
new file mode 100644
index 000000000000..61c6429be558
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-29.c
@@ -0,0 +1,35 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_smstateen -mabi=lp64 -mcmodel=medlow -misa-spec=20191213" } */
+
+int main () {
+
+#ifndef __riscv_arch_test
+#error "__riscv_arch_test"
+#endif
+
+#if __riscv_xlen != 64
+#error "__riscv_xlen"
+#endif
+
+#if !defined(__riscv_i) || (__riscv_i != (2 * 1000 * 1000 + 1 * 1000))
+#error "__riscv_i"
+#endif
+
+#if defined(__riscv_e)
+#error "__riscv_e"
+#endif
+
+#if !defined(__riscv_zicsr)
+#error "__riscv_zicsr"
+#endif
+
+#if !defined(__riscv_smstateen)
+#error "__riscv_smstateen"
+#endif
+
+#if !defined(__riscv_ssstateen)
+#error "__riscv_ssstateen"
+#endif
+
+  return 0;
+}
-- 
2.41.0

[PATCH 2/3] RISC-V: Add stub support for existing extensions (vendor)

[Tsukasa OI]

From: Tsukasa OI <research_trasio@irq.a4lg.com>

After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
extensions") changed how do we handle unknown extensions, we have no
guarantee that we can share the same architectural string with Binutils
(specifically, the assembler).

To avoid compilation errors on shared Assembler-C/C++ projects, GCC should
support almost all extensions that Binutils support, even if the GCC does
not touch a thing.

This commit adds stub supported vendor extensions to
riscv_ext_version_table (no riscv_implied_info entries to add; all
information is copied from Binutils' bfd/elfxx-riscv.c).

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc (riscv_ext_version_table):
	Add stub support for all vendor extensions supported by Binutils.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-30.c: New test for a stub
	vendor extension 'XVentanaCondOps'.
---
 gcc/common/config/riscv/riscv-common.cc    |  2 ++
 gcc/testsuite/gcc.target/riscv/predef-30.c | 27 ++++++++++++++++++++++
 2 files changed, 29 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-30.c

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 91b0316acfea..0c351105e015 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -298,6 +298,8 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
   {"xtheadmempair", ISA_SPEC_CLASS_NONE, 1, 0},
   {"xtheadsync", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"xventanacondops", ISA_SPEC_CLASS_NONE, 1, 0},
+
   /* Terminate the list.  */
   {NULL, ISA_SPEC_CLASS_NONE, 0, 0}
 };
diff --git a/gcc/testsuite/gcc.target/riscv/predef-30.c b/gcc/testsuite/gcc.target/riscv/predef-30.c
new file mode 100644
index 000000000000..9784b9ce5033
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-30.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_xventanacondops -mabi=lp64 -mcmodel=medlow -misa-spec=20191213" } */
+
+int main () {
+
+#ifndef __riscv_arch_test
+#error "__riscv_arch_test"
+#endif
+
+#if __riscv_xlen != 64
+#error "__riscv_xlen"
+#endif
+
+#if !defined(__riscv_i) || (__riscv_i != (2 * 1000 * 1000 + 1 * 1000))
+#error "__riscv_i"
+#endif
+
+#if defined(__riscv_e)
+#error "__riscv_e"
+#endif
+
+#if !defined(__riscv_xventanacondops)
+#error "__riscv_xventanacondops"
+#endif
+
+  return 0;
+}
-- 
2.41.0

[PATCH 3/3] RISC-V: Add stub support for existing extensions (unprivileged)

[Tsukasa OI]

From: Tsukasa OI <research_trasio@irq.a4lg.com>

After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
extensions") changed how do we handle unknown extensions, we have no
guarantee that we can share the same architectural string with Binutils
(specifically, the assembler).

To avoid compilation errors on shared Assembler-C/C++ projects, GCC should
support almost all extensions that Binutils support, even if the GCC does
not touch a thing.

This commit adds stub supported standard unprivileged extensions to
riscv_ext_version_table and its implications to riscv_implied_info
(all information is copied from Binutils' bfd/elfxx-riscv.c except not yet
merged 'Zce', 'Zcmp' and 'Zcmt' support).

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc
	(riscv_implied_info): Add implications from unprivileged extensions.
	(riscv_ext_version_table): Add stub support for all unprivileged
	extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-31.c: New test for a stub unprivileged
	extension 'Zcb' with some implications.
---
 gcc/common/config/riscv/riscv-common.cc    | 25 +++++++++++++++++
 gcc/testsuite/gcc.target/riscv/predef-31.c | 31 ++++++++++++++++++++++
 2 files changed, 56 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-31.c

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 0c351105e015..112bb86bd675 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -105,6 +105,7 @@ static const riscv_implied_info_t riscv_implied_info[] =
   {"zvl65536b", "zvl32768b"},
 
   {"zvkn", "zvkned"},
+  {"zvkn", "zvknha"},
   {"zvkn", "zvknhb"},
   {"zvkn", "zvbb"},
   {"zvkn", "zvkt"},
@@ -121,6 +122,19 @@ static const riscv_implied_info_t riscv_implied_info[] =
   {"zvksg", "zvks"},
   {"zvksg", "zvkg"},
 
+  {"zcb", "zca"},
+  {"zcd", "zca"},
+  {"zcd", "d"},
+  {"zcf", "zca"},
+  {"zcf", "f"},
+  {"zce", "zca"},
+  {"zce", "zcb"},
+  {"zce", "zcmp"},
+  {"zce", "zcmt"},
+  {"zcmp", "zca"},
+  {"zcmt", "zca"},
+  {"zcmt", "zcicsr"},
+
   {"zfh", "zfhmin"},
   {"zfhmin", "f"},
   {"zvfhmin", "zve32f"},
@@ -197,6 +211,14 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
 
   {"zawrs", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"zca",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zcb",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zce",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zcmp", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zcmt", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zcd",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zcf",  ISA_SPEC_CLASS_NONE, 1, 0},
+
   {"zba", ISA_SPEC_CLASS_NONE, 1, 0},
   {"zbb", ISA_SPEC_CLASS_NONE, 1, 0},
   {"zbc", ISA_SPEC_CLASS_NONE, 1, 0},
@@ -219,6 +241,7 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
   {"zkt",   ISA_SPEC_CLASS_NONE, 1, 0},
 
   {"zihintntl", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zihintpause", ISA_SPEC_CLASS_NONE, 2, 0},
 
   {"zicboz",ISA_SPEC_CLASS_NONE, 1, 0},
   {"zicbom",ISA_SPEC_CLASS_NONE, 1, 0},
@@ -265,6 +288,8 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
   {"zvl32768b", ISA_SPEC_CLASS_NONE, 1, 0},
   {"zvl65536b", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"zfa",       ISA_SPEC_CLASS_NONE, 0, 1},
+
   {"zfh",       ISA_SPEC_CLASS_NONE, 1, 0},
   {"zfhmin",    ISA_SPEC_CLASS_NONE, 1, 0},
   {"zvfhmin",   ISA_SPEC_CLASS_NONE, 1, 0},
diff --git a/gcc/testsuite/gcc.target/riscv/predef-31.c b/gcc/testsuite/gcc.target/riscv/predef-31.c
new file mode 100644
index 000000000000..4ea11442f995
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-31.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_zcb -mabi=lp64 -mcmodel=medlow -misa-spec=20191213" } */
+
+int main () {
+
+#ifndef __riscv_arch_test
+#error "__riscv_arch_test"
+#endif
+
+#if __riscv_xlen != 64
+#error "__riscv_xlen"
+#endif
+
+#if !defined(__riscv_i) || (__riscv_i != (2 * 1000 * 1000 + 1 * 1000))
+#error "__riscv_i"
+#endif
+
+#if defined(__riscv_e)
+#error "__riscv_e"
+#endif
+
+#if !defined(__riscv_zca)
+#error "__riscv_zca"
+#endif
+
+#if !defined(__riscv_zcb)
+#error "__riscv_zcb"
+#endif
+
+  return 0;
+}
-- 
2.41.0

[PATCH v2 0/3] RISC-V: Add stub support for existing extensions

[Tsukasa OI]

PATCH v1:
<https://gcc.gnu.org/pipermail/gcc-patches/2023-August/627220.html>


Changes: v1 -> v2 (only in PATCH 3/3)
======================================

Removed: 'Zvkn' -> 'Zvknha' implication (not to cause test failure)
Added:   'Zfa' -> 'F' implication (just I forgot to add in PATCH v1)


Thanks,
Tsukasa




Tsukasa OI (3):
  RISC-V: Add stub support for existing extensions (privileged)
  RISC-V: Add stub support for existing extensions (vendor)
  RISC-V: Add stub support for existing extensions (unprivileged)

 gcc/common/config/riscv/riscv-common.cc    | 44 ++++++++++++++++++++++
 gcc/testsuite/gcc.target/riscv/predef-29.c | 35 +++++++++++++++++
 gcc/testsuite/gcc.target/riscv/predef-30.c | 27 +++++++++++++
 gcc/testsuite/gcc.target/riscv/predef-31.c | 31 +++++++++++++++
 4 files changed, 137 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-29.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-30.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-31.c


base-commit: 614052dd4ea083e086712809c754ffebd9361316
-- 
2.41.0

[PATCH v2 1/3] RISC-V: Add stub support for existing extensions (privileged)

[Tsukasa OI]

From: Tsukasa OI <research_trasio@irq.a4lg.com>

After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
extensions") changed how do we handle unknown extensions, we have no
guarantee that we can share the same architectural string with Binutils
(specifically, the assembler).

To avoid compilation errors on shared Assembler-C/C++ projects, GCC should
support almost all extensions that Binutils support, even if the GCC does
not touch a thing.

As a start, this commit adds stub supported *privileged* extensions to
riscv_ext_version_table and its implications to riscv_implied_info
(all information is copied from Binutils' bfd/elfxx-riscv.c).

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc
	(riscv_implied_info): Add implications from privileged extensions.
	(riscv_ext_version_table): Add stub support for all privileged
	extensions supported by Binutils.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-29.c: New test for a stub privileged
	extension 'Smstateen' with some implications.
---
 gcc/common/config/riscv/riscv-common.cc    | 18 +++++++++++
 gcc/testsuite/gcc.target/riscv/predef-29.c | 35 ++++++++++++++++++++++
 2 files changed, 53 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-29.c

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 21f83f26371f..91b0316acfea 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -130,6 +130,14 @@ static const riscv_implied_info_t riscv_implied_info[] =
   {"zhinx", "zhinxmin"},
   {"zhinxmin", "zfinx"},
 
+  {"smaia", "ssaia"},
+  {"smstateen", "ssstateen"},
+  {"smepmp", "zicsr"},
+  {"ssaia", "zicsr"},
+  {"sscofpmf", "zicsr"},
+  {"ssstateen", "zicsr"},
+  {"sstc", "zicsr"},
+
   {NULL, NULL}
 };
 
@@ -264,8 +272,18 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
 
   {"zmmul", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"smaia",     ISA_SPEC_CLASS_NONE, 1, 0},
+  {"smepmp",    ISA_SPEC_CLASS_NONE, 1, 0},
+  {"smstateen", ISA_SPEC_CLASS_NONE, 1, 0},
+
+  {"ssaia",     ISA_SPEC_CLASS_NONE, 1, 0},
+  {"sscofpmf",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"ssstateen", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"sstc",      ISA_SPEC_CLASS_NONE, 1, 0},
+
   {"svinval", ISA_SPEC_CLASS_NONE, 1, 0},
   {"svnapot", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"svpbmt",  ISA_SPEC_CLASS_NONE, 1, 0},
 
   {"xtheadba", ISA_SPEC_CLASS_NONE, 1, 0},
   {"xtheadbb", ISA_SPEC_CLASS_NONE, 1, 0},
diff --git a/gcc/testsuite/gcc.target/riscv/predef-29.c b/gcc/testsuite/gcc.target/riscv/predef-29.c
new file mode 100644
index 000000000000..61c6429be558
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-29.c
@@ -0,0 +1,35 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_smstateen -mabi=lp64 -mcmodel=medlow -misa-spec=20191213" } */
+
+int main () {
+
+#ifndef __riscv_arch_test
+#error "__riscv_arch_test"
+#endif
+
+#if __riscv_xlen != 64
+#error "__riscv_xlen"
+#endif
+
+#if !defined(__riscv_i) || (__riscv_i != (2 * 1000 * 1000 + 1 * 1000))
+#error "__riscv_i"
+#endif
+
+#if defined(__riscv_e)
+#error "__riscv_e"
+#endif
+
+#if !defined(__riscv_zicsr)
+#error "__riscv_zicsr"
+#endif
+
+#if !defined(__riscv_smstateen)
+#error "__riscv_smstateen"
+#endif
+
+#if !defined(__riscv_ssstateen)
+#error "__riscv_ssstateen"
+#endif
+
+  return 0;
+}
-- 
2.41.0

[PATCH v2 2/3] RISC-V: Add stub support for existing extensions (vendor)

[Tsukasa OI]

From: Tsukasa OI <research_trasio@irq.a4lg.com>

After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
extensions") changed how do we handle unknown extensions, we have no
guarantee that we can share the same architectural string with Binutils
(specifically, the assembler).

To avoid compilation errors on shared Assembler-C/C++ projects, GCC should
support almost all extensions that Binutils support, even if the GCC does
not touch a thing.

This commit adds stub supported vendor extensions to
riscv_ext_version_table (no riscv_implied_info entries to add; all
information is copied from Binutils' bfd/elfxx-riscv.c).

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc (riscv_ext_version_table):
	Add stub support for all vendor extensions supported by Binutils.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-30.c: New test for a stub
	vendor extension 'XVentanaCondOps'.
---
 gcc/common/config/riscv/riscv-common.cc    |  2 ++
 gcc/testsuite/gcc.target/riscv/predef-30.c | 27 ++++++++++++++++++++++
 2 files changed, 29 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-30.c

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 91b0316acfea..0c351105e015 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -298,6 +298,8 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
   {"xtheadmempair", ISA_SPEC_CLASS_NONE, 1, 0},
   {"xtheadsync", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"xventanacondops", ISA_SPEC_CLASS_NONE, 1, 0},
+
   /* Terminate the list.  */
   {NULL, ISA_SPEC_CLASS_NONE, 0, 0}
 };
diff --git a/gcc/testsuite/gcc.target/riscv/predef-30.c b/gcc/testsuite/gcc.target/riscv/predef-30.c
new file mode 100644
index 000000000000..9784b9ce5033
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-30.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_xventanacondops -mabi=lp64 -mcmodel=medlow -misa-spec=20191213" } */
+
+int main () {
+
+#ifndef __riscv_arch_test
+#error "__riscv_arch_test"
+#endif
+
+#if __riscv_xlen != 64
+#error "__riscv_xlen"
+#endif
+
+#if !defined(__riscv_i) || (__riscv_i != (2 * 1000 * 1000 + 1 * 1000))
+#error "__riscv_i"
+#endif
+
+#if defined(__riscv_e)
+#error "__riscv_e"
+#endif
+
+#if !defined(__riscv_xventanacondops)
+#error "__riscv_xventanacondops"
+#endif
+
+  return 0;
+}
-- 
2.41.0

[PATCH v2 3/3] RISC-V: Add stub support for existing extensions (unprivileged)

[Tsukasa OI]

From: Tsukasa OI <research_trasio@irq.a4lg.com>

After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
extensions") changed how do we handle unknown extensions, we have no
guarantee that we can share the same architectural string with Binutils
(specifically, the assembler).

To avoid compilation errors on shared Assembler-C/C++ projects, GCC should
support almost all extensions that Binutils support, even if the GCC does
not touch a thing.

This commit adds stub supported standard unprivileged extensions to
riscv_ext_version_table and its implications to riscv_implied_info
(all information is copied from Binutils' bfd/elfxx-riscv.c except not yet
merged 'Zce', 'Zcmp' and 'Zcmt' support).

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc
	(riscv_implied_info): Add implications from unprivileged extensions.
	(riscv_ext_version_table): Add stub support for all unprivileged
	extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-31.c: New test for a stub unprivileged
	extension 'Zcb' with some implications.
---
 gcc/common/config/riscv/riscv-common.cc    | 24 +++++++++++++++++
 gcc/testsuite/gcc.target/riscv/predef-31.c | 31 ++++++++++++++++++++++
 2 files changed, 55 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-31.c

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 0c351105e015..27e9072899bf 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -121,6 +121,20 @@ static const riscv_implied_info_t riscv_implied_info[] =
   {"zvksg", "zvks"},
   {"zvksg", "zvkg"},
 
+  {"zcb", "zca"},
+  {"zcd", "zca"},
+  {"zcd", "d"},
+  {"zcf", "zca"},
+  {"zcf", "f"},
+  {"zce", "zca"},
+  {"zce", "zcb"},
+  {"zce", "zcmp"},
+  {"zce", "zcmt"},
+  {"zcmp", "zca"},
+  {"zcmt", "zca"},
+  {"zcmt", "zcicsr"},
+
+  {"zfa", "f"},
   {"zfh", "zfhmin"},
   {"zfhmin", "f"},
   {"zvfhmin", "zve32f"},
@@ -197,6 +211,14 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
 
   {"zawrs", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"zca",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zcb",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zce",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zcmp", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zcmt", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zcd",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zcf",  ISA_SPEC_CLASS_NONE, 1, 0},
+
   {"zba", ISA_SPEC_CLASS_NONE, 1, 0},
   {"zbb", ISA_SPEC_CLASS_NONE, 1, 0},
   {"zbc", ISA_SPEC_CLASS_NONE, 1, 0},
@@ -219,6 +241,7 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
   {"zkt",   ISA_SPEC_CLASS_NONE, 1, 0},
 
   {"zihintntl", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zihintpause", ISA_SPEC_CLASS_NONE, 2, 0},
 
   {"zicboz",ISA_SPEC_CLASS_NONE, 1, 0},
   {"zicbom",ISA_SPEC_CLASS_NONE, 1, 0},
@@ -265,6 +288,7 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
   {"zvl32768b", ISA_SPEC_CLASS_NONE, 1, 0},
   {"zvl65536b", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"zfa",       ISA_SPEC_CLASS_NONE, 0, 1},
   {"zfh",       ISA_SPEC_CLASS_NONE, 1, 0},
   {"zfhmin",    ISA_SPEC_CLASS_NONE, 1, 0},
   {"zvfhmin",   ISA_SPEC_CLASS_NONE, 1, 0},
diff --git a/gcc/testsuite/gcc.target/riscv/predef-31.c b/gcc/testsuite/gcc.target/riscv/predef-31.c
new file mode 100644
index 000000000000..4ea11442f995
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-31.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_zcb -mabi=lp64 -mcmodel=medlow -misa-spec=20191213" } */
+
+int main () {
+
+#ifndef __riscv_arch_test
+#error "__riscv_arch_test"
+#endif
+
+#if __riscv_xlen != 64
+#error "__riscv_xlen"
+#endif
+
+#if !defined(__riscv_i) || (__riscv_i != (2 * 1000 * 1000 + 1 * 1000))
+#error "__riscv_i"
+#endif
+
+#if defined(__riscv_e)
+#error "__riscv_e"
+#endif
+
+#if !defined(__riscv_zca)
+#error "__riscv_zca"
+#endif
+
+#if !defined(__riscv_zcb)
+#error "__riscv_zcb"
+#endif
+
+  return 0;
+}
-- 
2.41.0

Re: [PATCH v2 0/3] RISC-V: Add stub support for existing extensions

[Tsukasa OI]

Hi,

I'll explain a little more background.

A major case which this patch set will be required is when a developer
use inline assembly for instructions not yet natively supported by GCC
or will not be supported as intrinsics.

On such cases, GCC should at least accept corresponding extension via
-march (although there's a workaround using ".option" directives in the
inline assembly but that's tedious).

Thanks,
Tsukasa


On 2023/08/14 15:09, Tsukasa OI wrote:
> PATCH v1:
> <https://gcc.gnu.org/pipermail/gcc-patches/2023-August/627220.html>
> 
> 
> Changes: v1 -> v2 (only in PATCH 3/3)
> ======================================
> 
> Removed: 'Zvkn' -> 'Zvknha' implication (not to cause test failure)
> Added:   'Zfa' -> 'F' implication (just I forgot to add in PATCH v1)
> 
> 
> Thanks,
> Tsukasa
> 
> 
> 
> 
> Tsukasa OI (3):
>   RISC-V: Add stub support for existing extensions (privileged)
>   RISC-V: Add stub support for existing extensions (vendor)
>   RISC-V: Add stub support for existing extensions (unprivileged)
> 
>  gcc/common/config/riscv/riscv-common.cc    | 44 ++++++++++++++++++++++
>  gcc/testsuite/gcc.target/riscv/predef-29.c | 35 +++++++++++++++++
>  gcc/testsuite/gcc.target/riscv/predef-30.c | 27 +++++++++++++
>  gcc/testsuite/gcc.target/riscv/predef-31.c | 31 +++++++++++++++
>  4 files changed, 137 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/riscv/predef-29.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/predef-30.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/predef-31.c
> 
> 
> base-commit: 614052dd4ea083e086712809c754ffebd9361316

Re: [PATCH v2 3/3] RISC-V: Add stub support for existing extensions (unprivileged)

[Jeff Law]

On 8/14/23 00:09, Tsukasa OI wrote:
> From: Tsukasa OI <research_trasio@irq.a4lg.com>
> 
> After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
> extensions") changed how do we handle unknown extensions, we have no
> guarantee that we can share the same architectural string with Binutils
> (specifically, the assembler).
> 
> To avoid compilation errors on shared Assembler-C/C++ projects, GCC should
> support almost all extensions that Binutils support, even if the GCC does
> not touch a thing.
> 
> This commit adds stub supported standard unprivileged extensions to
> riscv_ext_version_table and its implications to riscv_implied_info
> (all information is copied from Binutils' bfd/elfxx-riscv.c except not yet
> merged 'Zce', 'Zcmp' and 'Zcmt' support).
> 
> gcc/ChangeLog:
> 
> 	* common/config/riscv/riscv-common.cc
> 	(riscv_implied_info): Add implications from unprivileged extensions.
> 	(riscv_ext_version_table): Add stub support for all unprivileged
> 	extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/riscv/predef-31.c: New test for a stub unprivileged
> 	extension 'Zcb' with some implications.
This series (most likely patch 3/3) seems to break arch-24.c and arch-25.c.

Please fix and post a V3.

Jeff

Re: [PATCH v2 3/3] RISC-V: Add stub support for existing extensions (unprivileged)

[Tsukasa OI]

On 2023/08/29 10:42, Jeff Law wrote:
> 
> 
> On 8/14/23 00:09, Tsukasa OI wrote:
>> From: Tsukasa OI <research_trasio@irq.a4lg.com>
>>
>> After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
>> extensions") changed how do we handle unknown extensions, we have no
>> guarantee that we can share the same architectural string with Binutils
>> (specifically, the assembler).
>>
>> To avoid compilation errors on shared Assembler-C/C++ projects, GCC
>> should
>> support almost all extensions that Binutils support, even if the GCC does
>> not touch a thing.
>>
>> This commit adds stub supported standard unprivileged extensions to
>> riscv_ext_version_table and its implications to riscv_implied_info
>> (all information is copied from Binutils' bfd/elfxx-riscv.c except not
>> yet
>> merged 'Zce', 'Zcmp' and 'Zcmt' support).
>>
>> gcc/ChangeLog:
>>
>>     * common/config/riscv/riscv-common.cc
>>     (riscv_implied_info): Add implications from unprivileged extensions.
>>     (riscv_ext_version_table): Add stub support for all unprivileged
>>     extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
>>
>> gcc/testsuite/ChangeLog:
>>
>>     * gcc.target/riscv/predef-31.c: New test for a stub unprivileged
>>     extension 'Zcb' with some implications.
> This series (most likely patch 3/3) seems to break arch-24.c and arch-25.c.
> 
> Please fix and post a V3.
> 
> Jeff
> 

I think it was a hidden merge failure with partial Zc* extensions
support by Jiawei (and I already fixed it in the internal version).
I'll re-review it and submit as v3 if it's okay.

I don't recall exact test cases that failed (when I tested) but looking
at arch-24.c and arch-25.c you pointed out, they have a minor issue
(independent with this patch set).  I'll submit a minor fix for those
files later.

Thanks,
Tsukasa

[PATCH v3 0/3] RISC-V: Add stub support for existing extensions

[Tsukasa OI]

PATCH v1:
<https://gcc.gnu.org/pipermail/gcc-patches/2023-August/627220.html>
PATCH v2:
<https://gcc.gnu.org/pipermail/gcc-patches/2023-August/627295.html>


Changes: v1 -> v2 (only in PATCH 3/3)
======================================

Removed: 'Zvkn' -> 'Zvknha' implication (not to cause test failure)
Added:   'Zfa' -> 'F' implication (just I forgot to add in PATCH v1)


Changes: v2 -> v3 (only in PATCH 3/3)
======================================

Changed: 'Zcmt' -> 'Zcicsr' to
         'Zcmt' ->  'Zicsr' (fix typo)
Rebased against commit 17c22f466162
                ("RISC-V: Minimal support for ZC* extensions.").
            and commit 30699b999e94
                ("[PATCH v10] RISC-V: Add support for the Zfa extension").
Slightly modified the commit message, reflecting the background.

As a rebase result, PATCH 3/3 got nearly empty (except a test case).


Thanks,
Tsukasa




Tsukasa OI (3):
  RISC-V: Add stub support for existing extensions (privileged)
  RISC-V: Add stub support for existing extensions (vendor)
  RISC-V: Add stub support for existing extensions (unprivileged)

 gcc/common/config/riscv/riscv-common.cc    | 21 +++++++++++++
 gcc/testsuite/gcc.target/riscv/predef-29.c | 35 ++++++++++++++++++++++
 gcc/testsuite/gcc.target/riscv/predef-30.c | 27 +++++++++++++++++
 gcc/testsuite/gcc.target/riscv/predef-31.c | 31 +++++++++++++++++++
 4 files changed, 114 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-29.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-30.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-31.c


base-commit: 818cc9f2d2f3dbbd4004ff85d3125d92d1e430c9
-- 
2.42.0

[PATCH v3 1/3] RISC-V: Add stub support for existing extensions (privileged)

[Tsukasa OI]

From: Tsukasa OI <research_trasio@irq.a4lg.com>

After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
extensions") changed how do we handle unknown extensions, we have no
guarantee that we can share the same architectural string with Binutils
(specifically, the assembler).

To avoid compilation errors on shared Assembler-C/C++ projects or programs
with inline assembler, GCC should support almost all extensions that
Binutils support, even if the GCC itself does not touch a thing.

As a start, this commit adds stub supported *privileged* extensions to
riscv_ext_version_table and its implications to riscv_implied_info
(all information is copied from Binutils' bfd/elfxx-riscv.c).

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc
	(riscv_implied_info): Add implications from privileged extensions.
	(riscv_ext_version_table): Add stub support for all privileged
	extensions supported by Binutils.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-29.c: New test for a stub privileged
	extension 'Smstateen' with some implications.
---
 gcc/common/config/riscv/riscv-common.cc    | 18 +++++++++++
 gcc/testsuite/gcc.target/riscv/predef-29.c | 35 ++++++++++++++++++++++
 2 files changed, 53 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-29.c

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index a5b62cda3a09..3502993026d6 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -143,6 +143,14 @@ static const riscv_implied_info_t riscv_implied_info[] =
   {"zcmp", "zca"},
   {"zcmt", "zca"},
 
+  {"smaia", "ssaia"},
+  {"smstateen", "ssstateen"},
+  {"smepmp", "zicsr"},
+  {"ssaia", "zicsr"},
+  {"sscofpmf", "zicsr"},
+  {"ssstateen", "zicsr"},
+  {"sstc", "zicsr"},
+
   {NULL, NULL}
 };
 
@@ -288,8 +296,18 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
   {"zcmp", ISA_SPEC_CLASS_NONE, 1, 0},
   {"zcmt", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"smaia",     ISA_SPEC_CLASS_NONE, 1, 0},
+  {"smepmp",    ISA_SPEC_CLASS_NONE, 1, 0},
+  {"smstateen", ISA_SPEC_CLASS_NONE, 1, 0},
+
+  {"ssaia",     ISA_SPEC_CLASS_NONE, 1, 0},
+  {"sscofpmf",  ISA_SPEC_CLASS_NONE, 1, 0},
+  {"ssstateen", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"sstc",      ISA_SPEC_CLASS_NONE, 1, 0},
+
   {"svinval", ISA_SPEC_CLASS_NONE, 1, 0},
   {"svnapot", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"svpbmt",  ISA_SPEC_CLASS_NONE, 1, 0},
 
   {"xtheadba", ISA_SPEC_CLASS_NONE, 1, 0},
   {"xtheadbb", ISA_SPEC_CLASS_NONE, 1, 0},
diff --git a/gcc/testsuite/gcc.target/riscv/predef-29.c b/gcc/testsuite/gcc.target/riscv/predef-29.c
new file mode 100644
index 000000000000..61c6429be558
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-29.c
@@ -0,0 +1,35 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_smstateen -mabi=lp64 -mcmodel=medlow -misa-spec=20191213" } */
+
+int main () {
+
+#ifndef __riscv_arch_test
+#error "__riscv_arch_test"
+#endif
+
+#if __riscv_xlen != 64
+#error "__riscv_xlen"
+#endif
+
+#if !defined(__riscv_i) || (__riscv_i != (2 * 1000 * 1000 + 1 * 1000))
+#error "__riscv_i"
+#endif
+
+#if defined(__riscv_e)
+#error "__riscv_e"
+#endif
+
+#if !defined(__riscv_zicsr)
+#error "__riscv_zicsr"
+#endif
+
+#if !defined(__riscv_smstateen)
+#error "__riscv_smstateen"
+#endif
+
+#if !defined(__riscv_ssstateen)
+#error "__riscv_ssstateen"
+#endif
+
+  return 0;
+}
-- 
2.42.0

[PATCH v3 2/3] RISC-V: Add stub support for existing extensions (vendor)

[Tsukasa OI]

From: Tsukasa OI <research_trasio@irq.a4lg.com>

After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
extensions") changed how do we handle unknown extensions, we have no
guarantee that we can share the same architectural string with Binutils
(specifically, the assembler).

To avoid compilation errors on shared Assembler-C/C++ projects or programs
with inline assembler, GCC should support almost all extensions that
Binutils support, even if the GCC itself does not touch a thing.

This commit adds stub supported vendor extensions to
riscv_ext_version_table (no riscv_implied_info entries to add; all
information is copied from Binutils' bfd/elfxx-riscv.c).

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc (riscv_ext_version_table):
	Add stub support for all vendor extensions supported by Binutils.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-30.c: New test for a stub
	vendor extension 'XVentanaCondOps'.
---
 gcc/common/config/riscv/riscv-common.cc    |  2 ++
 gcc/testsuite/gcc.target/riscv/predef-30.c | 27 ++++++++++++++++++++++
 2 files changed, 29 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-30.c

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 3502993026d6..8e2b3ba6d621 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -322,6 +322,8 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
   {"xtheadmempair", ISA_SPEC_CLASS_NONE, 1, 0},
   {"xtheadsync", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"xventanacondops", ISA_SPEC_CLASS_NONE, 1, 0},
+
   /* Terminate the list.  */
   {NULL, ISA_SPEC_CLASS_NONE, 0, 0}
 };
diff --git a/gcc/testsuite/gcc.target/riscv/predef-30.c b/gcc/testsuite/gcc.target/riscv/predef-30.c
new file mode 100644
index 000000000000..9784b9ce5033
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-30.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_xventanacondops -mabi=lp64 -mcmodel=medlow -misa-spec=20191213" } */
+
+int main () {
+
+#ifndef __riscv_arch_test
+#error "__riscv_arch_test"
+#endif
+
+#if __riscv_xlen != 64
+#error "__riscv_xlen"
+#endif
+
+#if !defined(__riscv_i) || (__riscv_i != (2 * 1000 * 1000 + 1 * 1000))
+#error "__riscv_i"
+#endif
+
+#if defined(__riscv_e)
+#error "__riscv_e"
+#endif
+
+#if !defined(__riscv_xventanacondops)
+#error "__riscv_xventanacondops"
+#endif
+
+  return 0;
+}
-- 
2.42.0

[PATCH v3 3/3] RISC-V: Add stub support for existing extensions (unprivileged)

[Tsukasa OI]

From: Tsukasa OI <research_trasio@irq.a4lg.com>

After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
extensions") changed how do we handle unknown extensions, we have no
guarantee that we can share the same architectural string with Binutils
(specifically, the assembler).

To avoid compilation errors on shared Assembler-C/C++ projects or programs
with inline assembler, GCC should support almost all extensions that
Binutils support, even if the GCC itself does not touch a thing.

This commit adds stub supported standard unprivileged extensions to
riscv_ext_version_table and its implications to riscv_implied_info
(all information is copied from Binutils' bfd/elfxx-riscv.c except not yet
merged 'Zce', 'Zcmp' and 'Zcmt' support).

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc
	(riscv_implied_info): Add implications from unprivileged extensions.
	(riscv_ext_version_table): Add stub support for all unprivileged
	extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-31.c: New test for a stub unprivileged
	extension 'Zcb' with some implications.
---
 gcc/common/config/riscv/riscv-common.cc    |  1 +
 gcc/testsuite/gcc.target/riscv/predef-31.c | 31 ++++++++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/riscv/predef-31.c

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 8e2b3ba6d621..f142212f2edc 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -142,6 +142,7 @@ static const riscv_implied_info_t riscv_implied_info[] =
   {"zcb",  "zca"},
   {"zcmp", "zca"},
   {"zcmt", "zca"},
+  {"zcmt", "zicsr"},
 
   {"smaia", "ssaia"},
   {"smstateen", "ssstateen"},
diff --git a/gcc/testsuite/gcc.target/riscv/predef-31.c b/gcc/testsuite/gcc.target/riscv/predef-31.c
new file mode 100644
index 000000000000..4ea11442f995
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/predef-31.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_zcb -mabi=lp64 -mcmodel=medlow -misa-spec=20191213" } */
+
+int main () {
+
+#ifndef __riscv_arch_test
+#error "__riscv_arch_test"
+#endif
+
+#if __riscv_xlen != 64
+#error "__riscv_xlen"
+#endif
+
+#if !defined(__riscv_i) || (__riscv_i != (2 * 1000 * 1000 + 1 * 1000))
+#error "__riscv_i"
+#endif
+
+#if defined(__riscv_e)
+#error "__riscv_e"
+#endif
+
+#if !defined(__riscv_zca)
+#error "__riscv_zca"
+#endif
+
+#if !defined(__riscv_zcb)
+#error "__riscv_zcb"
+#endif
+
+  return 0;
+}
-- 
2.42.0

Re: [PATCH v3 1/3] RISC-V: Add stub support for existing extensions (privileged)

[Jeff Law]

On 8/28/23 21:39, Tsukasa OI wrote:
> From: Tsukasa OI <research_trasio@irq.a4lg.com>
> 
> After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
> extensions") changed how do we handle unknown extensions, we have no
> guarantee that we can share the same architectural string with Binutils
> (specifically, the assembler).
> 
> To avoid compilation errors on shared Assembler-C/C++ projects or programs
> with inline assembler, GCC should support almost all extensions that
> Binutils support, even if the GCC itself does not touch a thing.
> 
> As a start, this commit adds stub supported *privileged* extensions to
> riscv_ext_version_table and its implications to riscv_implied_info
> (all information is copied from Binutils' bfd/elfxx-riscv.c).
> 
> gcc/ChangeLog:
> 
> 	* common/config/riscv/riscv-common.cc
> 	(riscv_implied_info): Add implications from privileged extensions.
> 	(riscv_ext_version_table): Add stub support for all privileged
> 	extensions supported by Binutils.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/riscv/predef-29.c: New test for a stub privileged
> 	extension 'Smstateen' with some implications.
OK
jeff

Re: [PATCH v3 2/3] RISC-V: Add stub support for existing extensions (vendor)

[Jeff Law]

On 8/28/23 21:39, Tsukasa OI wrote:
> From: Tsukasa OI <research_trasio@irq.a4lg.com>
> 
> After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
> extensions") changed how do we handle unknown extensions, we have no
> guarantee that we can share the same architectural string with Binutils
> (specifically, the assembler).
> 
> To avoid compilation errors on shared Assembler-C/C++ projects or programs
> with inline assembler, GCC should support almost all extensions that
> Binutils support, even if the GCC itself does not touch a thing.
> 
> This commit adds stub supported vendor extensions to
> riscv_ext_version_table (no riscv_implied_info entries to add; all
> information is copied from Binutils' bfd/elfxx-riscv.c).
> 
> gcc/ChangeLog:
> 
> 	* common/config/riscv/riscv-common.cc (riscv_ext_version_table):
> 	Add stub support for all vendor extensions supported by Binutils.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/riscv/predef-30.c: New test for a stub
> 	vendor extension 'XVentanaCondOps'.
OK.
jeff

Re: [PATCH v3 3/3] RISC-V: Add stub support for existing extensions (unprivileged)

[Jeff Law]

On 8/28/23 21:39, Tsukasa OI wrote:
> From: Tsukasa OI <research_trasio@irq.a4lg.com>
> 
> After commit c283c4774d1c ("RISC-V: Throw compilation error for unknown
> extensions") changed how do we handle unknown extensions, we have no
> guarantee that we can share the same architectural string with Binutils
> (specifically, the assembler).
> 
> To avoid compilation errors on shared Assembler-C/C++ projects or programs
> with inline assembler, GCC should support almost all extensions that
> Binutils support, even if the GCC itself does not touch a thing.
> 
> This commit adds stub supported standard unprivileged extensions to
> riscv_ext_version_table and its implications to riscv_implied_info
> (all information is copied from Binutils' bfd/elfxx-riscv.c except not yet
> merged 'Zce', 'Zcmp' and 'Zcmt' support).
> 
> gcc/ChangeLog:
> 
> 	* common/config/riscv/riscv-common.cc
> 	(riscv_implied_info): Add implications from unprivileged extensions.
> 	(riscv_ext_version_table): Add stub support for all unprivileged
> 	extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/riscv/predef-31.c: New test for a stub unprivileged
> 	extension 'Zcb' with some implications.
OK.
jeff