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From: 钟居哲 <juzhe.zhong@rivai.ai>
To: "Jeff Law" <jeffreyalaw@gmail.com>,
	 gcc-patches <gcc-patches@gcc.gnu.org>
Cc: kito.cheng <kito.cheng@gmail.com>,  palmer <palmer@dabbelt.com>
Subject: Re: Re: [PATCH] RISC-V: Remove unit-stride store from ta attribute
Date: Sat, 17 Dec 2022 09:22:27 +0800	[thread overview]
Message-ID: <4512AAF121C9F300+2022121709222655386152@rivai.ai> (raw)
In-Reply-To: <d3713478-01ac-6cd5-81f0-1887daef87ca@gmail.com>

[-- Attachment #1: Type: text/plain, Size: 1086 bytes --]

Yes, the vector stores doesn't care about policy no matter mask or tail.
Removing it can allow VSETVL PASS have more optimization chances
since VSETVL PASS has backward demands fusion.

For example:
vadd tama
vse.v
VSETVL PASS will choose to set tama for vse.v

vadd tumu
vse.v
VSETVL PASS will choose to set tumu for vse.v



juzhe.zhong@rivai.ai
 
From: Jeff Law
Date: 2022-12-17 04:01
To: juzhe.zhong; gcc-patches
CC: kito.cheng; palmer
Subject: Re: [PATCH] RISC-V: Remove unit-stride store from ta attribute
 
 
On 12/14/22 04:36, juzhe.zhong@rivai.ai wrote:
> From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
> 
> Since store instructions doesn't care about tail policy, we remove
> vste from "ta" attribute. Hence, we could have more fusion chances
> and better optimization.
> 
> gcc/ChangeLog:
> 
>          * config/riscv/vector.md: Remove vste.
Just to confirm that I understand the basic model.  Vector stores only 
update active elements, thus they don't care about tail policy, right?
 
Assuming that's the case, then this is OK.
 
jeff
 

  parent reply	other threads:[~2022-12-17  1:22 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-14 11:36 juzhe.zhong
2022-12-16 20:01 ` Jeff Law
2022-12-16 21:59   ` Palmer Dabbelt
2022-12-16 23:00     ` Andrew Waterman
2022-12-17  1:22   ` 钟居哲 [this message]
2022-12-19 15:06     ` Kito Cheng

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