From: juzhe.zhong@rivai.ai
To: gcc-patches@gcc.gnu.org
Cc: kito.cheng@gmail.com, palmer@dabbelt.com,
Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Subject: [PATCH] RISC-V: Remove unit-stride store from ta attribute
Date: Wed, 14 Dec 2022 19:36:41 +0800 [thread overview]
Message-ID: <20221214113641.63320-1-juzhe.zhong@rivai.ai> (raw)
From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Since store instructions doesn't care about tail policy, we remove
vste from "ta" attribute. Hence, we could have more fusion chances
and better optimization.
gcc/ChangeLog:
* config/riscv/vector.md: Remove vste.
---
gcc/config/riscv/vector.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 7dfadaa96b6..84adbb9974a 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -221,7 +221,7 @@
;; The tail policy op value.
(define_attr "ta" ""
- (cond [(eq_attr "type" "vlde,vste,vimov,vfmov,vlds")
+ (cond [(eq_attr "type" "vlde,vimov,vfmov,vlds")
(symbol_ref "riscv_vector::get_ta(operands[5])")]
(const_int INVALID_ATTRIBUTE)))
--
2.36.3
next reply other threads:[~2022-12-14 11:36 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-14 11:36 juzhe.zhong [this message]
2022-12-16 20:01 ` Jeff Law
2022-12-16 21:59 ` Palmer Dabbelt
2022-12-16 23:00 ` Andrew Waterman
2022-12-17 1:22 ` 钟居哲
2022-12-19 15:06 ` Kito Cheng
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