* Patch ping
@ 2011-09-26 9:30 Jakub Jelinek
2011-09-26 10:08 ` Richard Sandiford
0 siblings, 1 reply; 6+ messages in thread
From: Jakub Jelinek @ 2011-09-26 9:30 UTC (permalink / raw)
To: Richard Guenther, Eric Botcazou, Richard Sandiford; +Cc: gcc-patches
Hi!
A couple of unreviewed patches:
tree-ssa-strlen optimization:
[1/2] http://gcc.gnu.org/ml/gcc-patches/2011-09/msg00890.html
[2/2] http://gcc.gnu.org/ml/gcc-patches/2011-09/msg00891.html
optimize all ones vectors in simplify-rtx.c (and i386 expansion):
http://gcc.gnu.org/ml/gcc-patches/2011-09/msg01364.html
fortran type_for_size langhook fixes:
http://gcc.gnu.org/ml/gcc-patches/2011-09/msg01418.html
Jakub
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: Patch ping
2011-09-26 9:30 Patch ping Jakub Jelinek
@ 2011-09-26 10:08 ` Richard Sandiford
2011-09-26 15:55 ` [PATCH] Optimize in RTL vector AND { -1, -1, ... }, IOR { -1, -1, ... } and XOR { -1, -1, ... } (take 2) Jakub Jelinek
0 siblings, 1 reply; 6+ messages in thread
From: Richard Sandiford @ 2011-09-26 10:08 UTC (permalink / raw)
To: Jakub Jelinek; +Cc: Richard Guenther, Eric Botcazou, gcc-patches
Jakub Jelinek <jakub@redhat.com> writes:
> optimize all ones vectors in simplify-rtx.c (and i386 expansion):
> http://gcc.gnu.org/ml/gcc-patches/2011-09/msg01364.html
I wonder whether we should have a CONSTM1_RTX(MODE). It seems
inconsistent to have vector 0s and 1s, but only have integer -1s.
As far as simplify-rtx.c goes, I think all_ones_cst should cover the
existing CONST_INT_P case too. CONST_INTs have to be represented as
sign-extended, and "trueop1" should still have mode "mode", so something's
wrong if the current code matches things that aren't constm1_rtx.
The simplify-rtx.c change looks good otherwise.
Richard
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] Optimize in RTL vector AND { -1, -1, ... }, IOR { -1, -1, ... } and XOR { -1, -1, ... } (take 2)
2011-09-26 10:08 ` Richard Sandiford
@ 2011-09-26 15:55 ` Jakub Jelinek
2011-09-26 23:11 ` Richard Henderson
0 siblings, 1 reply; 6+ messages in thread
From: Jakub Jelinek @ 2011-09-26 15:55 UTC (permalink / raw)
To: Richard Guenther, Eric Botcazou, gcc-patches, richard.sandiford
On Mon, Sep 26, 2011 at 10:18:43AM +0100, Richard Sandiford wrote:
> Jakub Jelinek <jakub@redhat.com> writes:
> > optimize all ones vectors in simplify-rtx.c (and i386 expansion):
> > http://gcc.gnu.org/ml/gcc-patches/2011-09/msg01364.html
>
> I wonder whether we should have a CONSTM1_RTX(MODE). It seems
> inconsistent to have vector 0s and 1s, but only have integer -1s.
>
> As far as simplify-rtx.c goes, I think all_ones_cst should cover the
> existing CONST_INT_P case too. CONST_INTs have to be represented as
> sign-extended, and "trueop1" should still have mode "mode", so something's
> wrong if the current code matches things that aren't constm1_rtx.
> The simplify-rtx.c change looks good otherwise.
Here is an updated patch that introduces CONSTM1_RTX (for MODE_INT and
MODE_VECTOR_INT modes) and uses it in simplify-rtx.c/i386.c instead.
I'm testing INTEGRAL_MODE_P just in case in the future CONSTM1_RTX is filled
also for MODE_FLOAT_INT etc. modes, because for them -1 is not all ones
mask.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2011-09-26 Jakub Jelinek <jakub@redhat.com>
* rtl.h (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
from 3 x MAX_MACHINE_MODE.
(CONSTM1_RTX): Define.
* emit-rtl.c (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
from 3 x MAX_MACHINE_MODE.
(gen_rtx_CONST_VECTOR): Use CONSTM1_RTX if all inner constants are
CONSTM1_RTX.
(init_emit_once): Initialize CONSTM1_RTX for MODE_INT and
MODE_VECTOR_INT modes.
* simplify-rtx.c (simplify_binary_operation_1) <case IOR, XOR, AND>:
Optimize if one operand is CONSTM1_RTX.
* config/i386/i386.c (ix86_expand_sse_movcc): Optimize mask ? -1 : x
into mask | x.
--- gcc/rtl.h.jj 2011-08-28 12:36:57.000000000 +0200
+++ gcc/rtl.h 2011-09-26 12:57:50.000000000 +0200
@@ -2074,17 +2074,18 @@ extern GTY(()) rtx const_int_rtx[MAX_SAV
#define constm1_rtx (const_int_rtx[MAX_SAVED_CONST_INT-1])
extern GTY(()) rtx const_true_rtx;
-extern GTY(()) rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
+extern GTY(()) rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
/* Returns a constant 0 rtx in mode MODE. Integer modes are treated the
same as VOIDmode. */
#define CONST0_RTX(MODE) (const_tiny_rtx[0][(int) (MODE)])
-/* Likewise, for the constants 1 and 2. */
+/* Likewise, for the constants 1 and 2 and -1. */
#define CONST1_RTX(MODE) (const_tiny_rtx[1][(int) (MODE)])
#define CONST2_RTX(MODE) (const_tiny_rtx[2][(int) (MODE)])
+#define CONSTM1_RTX(MODE) (const_tiny_rtx[3][(int) (MODE)])
/* If HARD_FRAME_POINTER_REGNUM is defined, then a special dummy reg
is used to represent the frame pointer. This is because the
--- gcc/emit-rtl.c.jj 2011-09-20 21:43:07.000000000 +0200
+++ gcc/emit-rtl.c 2011-09-26 12:56:33.000000000 +0200
@@ -93,9 +93,10 @@ static GTY(()) int label_num = 1;
/* We record floating-point CONST_DOUBLEs in each floating-point mode for
the values of 0, 1, and 2. For the integer entries and VOIDmode, we
- record a copy of const[012]_rtx. */
+ record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
+ is set only for MODE_INT and MODE_VECTOR_INT modes. */
-rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
+rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
rtx const_true_rtx;
@@ -5514,6 +5515,8 @@ gen_rtx_CONST_VECTOR (enum machine_mode
return CONST0_RTX (mode);
else if (x == CONST1_RTX (inner))
return CONST1_RTX (mode);
+ else if (x == CONSTM1_RTX (inner))
+ return CONSTM1_RTX (mode);
}
return gen_rtx_raw_CONST_VECTOR (mode, v);
@@ -5674,7 +5677,7 @@ init_emit_once (void)
dconsthalf = dconst1;
SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
- for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
+ for (i = 0; i < 3; i++)
{
const REAL_VALUE_TYPE *const r =
(i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
@@ -5704,6 +5707,13 @@ init_emit_once (void)
const_tiny_rtx[i][(int) mode] = GEN_INT (i);
}
+ const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
+
+ for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
+ mode != VOIDmode;
+ mode = GET_MODE_WIDER_MODE (mode))
+ const_tiny_rtx[3][(int) mode] = constm1_rtx;
+
for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
@@ -5726,6 +5736,7 @@ init_emit_once (void)
{
const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
+ const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
}
for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
--- gcc/simplify-rtx.c.jj 2011-09-15 12:18:54.000000000 +0200
+++ gcc/simplify-rtx.c 2011-09-26 13:17:33.000000000 +0200
@@ -2431,9 +2431,7 @@ simplify_binary_operation_1 (enum rtx_co
case IOR:
if (trueop1 == CONST0_RTX (mode))
return op0;
- if (CONST_INT_P (trueop1)
- && ((UINTVAL (trueop1) & GET_MODE_MASK (mode))
- == GET_MODE_MASK (mode)))
+ if (INTEGRAL_MODE_P (mode) && trueop1 == CONSTM1_RTX (mode))
return op1;
if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
return op0;
@@ -2573,9 +2571,7 @@ simplify_binary_operation_1 (enum rtx_co
case XOR:
if (trueop1 == CONST0_RTX (mode))
return op0;
- if (CONST_INT_P (trueop1)
- && ((UINTVAL (trueop1) & GET_MODE_MASK (mode))
- == GET_MODE_MASK (mode)))
+ if (INTEGRAL_MODE_P (mode) && trueop1 == CONSTM1_RTX (mode))
return simplify_gen_unary (NOT, mode, op0, mode);
if (rtx_equal_p (trueop0, trueop1)
&& ! side_effects_p (op0)
@@ -2721,6 +2717,8 @@ simplify_binary_operation_1 (enum rtx_co
case AND:
if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0))
return trueop1;
+ if (INTEGRAL_MODE_P (mode) && trueop1 == CONSTM1_RTX (mode))
+ return op0;
if (HWI_COMPUTABLE_MODE_P (mode))
{
HOST_WIDE_INT nzop0 = nonzero_bits (trueop0, mode);
--- gcc/config/i386/i386.c.jj 2011-09-22 18:37:00.000000000 +0200
+++ gcc/config/i386/i386.c 2011-09-26 13:20:49.000000000 +0200
@@ -18899,6 +18899,12 @@ ix86_expand_sse_movcc (rtx dest, rtx cmp
x = gen_rtx_AND (mode, x, op_false);
emit_insn (gen_rtx_SET (VOIDmode, dest, x));
}
+ else if (INTEGRAL_MODE_P (mode) && op_true == CONSTM1_RTX (mode))
+ {
+ op_false = force_reg (mode, op_false);
+ x = gen_rtx_IOR (mode, cmp, op_false);
+ emit_insn (gen_rtx_SET (VOIDmode, dest, x));
+ }
else if (TARGET_XOP)
{
op_true = force_reg (mode, op_true);
Jakub
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] Optimize in RTL vector AND { -1, -1, ... }, IOR { -1, -1, ... } and XOR { -1, -1, ... } (take 2)
2011-09-26 15:55 ` [PATCH] Optimize in RTL vector AND { -1, -1, ... }, IOR { -1, -1, ... } and XOR { -1, -1, ... } (take 2) Jakub Jelinek
@ 2011-09-26 23:11 ` Richard Henderson
0 siblings, 0 replies; 6+ messages in thread
From: Richard Henderson @ 2011-09-26 23:11 UTC (permalink / raw)
To: Jakub Jelinek
Cc: Richard Guenther, Eric Botcazou, gcc-patches, richard.sandiford
On 09/26/2011 07:55 AM, Jakub Jelinek wrote:
> * rtl.h (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
> from 3 x MAX_MACHINE_MODE.
> (CONSTM1_RTX): Define.
> * emit-rtl.c (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
> from 3 x MAX_MACHINE_MODE.
> (gen_rtx_CONST_VECTOR): Use CONSTM1_RTX if all inner constants are
> CONSTM1_RTX.
> (init_emit_once): Initialize CONSTM1_RTX for MODE_INT and
> MODE_VECTOR_INT modes.
> * simplify-rtx.c (simplify_binary_operation_1) <case IOR, XOR, AND>:
> Optimize if one operand is CONSTM1_RTX.
> * config/i386/i386.c (ix86_expand_sse_movcc): Optimize mask ? -1 : x
> into mask | x.
Ok.
r~
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] Optimize in RTL vector AND { -1, -1, ... }, IOR { -1, -1, ... } and XOR { -1, -1, ... } (take 2)
2011-10-31 14:32 Henderson, Stuart
@ 2011-11-11 16:41 ` Bernd Schmidt
0 siblings, 0 replies; 6+ messages in thread
From: Bernd Schmidt @ 2011-11-11 16:41 UTC (permalink / raw)
To: Henderson, Stuart
Cc: jakub, rguenther, ebotcazou, gcc-patches, richard.sandiford
[-- Attachment #1: Type: text/plain, Size: 1089 bytes --]
On 10/31/11 14:24, Henderson, Stuart wrote:
>> 2011-09-26 Jakub Jelinek <jakub@redhat.com>
>>
>> * rtl.h (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
>> from 3 x MAX_MACHINE_MODE.
>> (CONSTM1_RTX): Define.
>> * emit-rtl.c (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
>> from 3 x MAX_MACHINE_MODE.
>> (gen_rtx_CONST_VECTOR): Use CONSTM1_RTX if all inner constants are
>> CONSTM1_RTX.
>> (init_emit_once): Initialize CONSTM1_RTX for MODE_INT and
>> MODE_VECTOR_INT modes.
>> * simplify-rtx.c (simplify_binary_operation_1) <case IOR, XOR, AND>:
>> Optimize if one operand is CONSTM1_RTX.
>> * config/i386/i386.c (ix86_expand_sse_movcc): Optimize mask ? -1 : x
>> into mask | x.
>
> FYI - this patch (179238) breaks the Blackfin compiler build with an internal compiler error during configure of libgcc:
> conftest.c:1:0: internal compiler error: in gen_const_vector, at emit-rtl.c:5491
This fixes it. Looks obvious enough to me; hence will commit Monday if
no objections.
Bernd
[-- Attachment #2: partialm1.diff --]
[-- Type: text/plain, Size: 695 bytes --]
* emit-rtl.c (init_emit_once): Initialize const_tiny_rtx[3] for
partial integer modes.
Index: emit-rtl.c
===================================================================
--- emit-rtl.c (revision 181252)
+++ emit-rtl.c (working copy)
@@ -5706,6 +5706,11 @@ init_emit_once (void)
mode = GET_MODE_WIDER_MODE (mode))
const_tiny_rtx[3][(int) mode] = constm1_rtx;
+ for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
+ mode != VOIDmode;
+ mode = GET_MODE_WIDER_MODE (mode))
+ const_tiny_rtx[3][(int) mode] = constm1_rtx;
+
for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] Optimize in RTL vector AND { -1, -1, ... }, IOR { -1, -1, ... } and XOR { -1, -1, ... } (take 2)
@ 2011-10-31 14:32 Henderson, Stuart
2011-11-11 16:41 ` Bernd Schmidt
0 siblings, 1 reply; 6+ messages in thread
From: Henderson, Stuart @ 2011-10-31 14:32 UTC (permalink / raw)
To: jakub; +Cc: rguenther, ebotcazou, gcc-patches, richard.sandiford
>2011-09-26 Jakub Jelinek <jakub@redhat.com>
>
> * rtl.h (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
> from 3 x MAX_MACHINE_MODE.
> (CONSTM1_RTX): Define.
> * emit-rtl.c (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
> from 3 x MAX_MACHINE_MODE.
> (gen_rtx_CONST_VECTOR): Use CONSTM1_RTX if all inner constants are
> CONSTM1_RTX.
> (init_emit_once): Initialize CONSTM1_RTX for MODE_INT and
> MODE_VECTOR_INT modes.
> * simplify-rtx.c (simplify_binary_operation_1) <case IOR, XOR, AND>:
> Optimize if one operand is CONSTM1_RTX.
> * config/i386/i386.c (ix86_expand_sse_movcc): Optimize mask ? -1 : x
> into mask | x.
FYI - this patch (179238) breaks the Blackfin compiler build with an internal compiler error during configure of libgcc:
conftest.c:1:0: internal compiler error: in gen_const_vector, at emit-rtl.c:5491
which is the:
gcc_assert (const_tiny_rtx[constant][(int) inner]);
gcc configured with:
../gcc-4.7/configure --build=x86_64-unknown-linux-gnu --host=x86_64-unknown-linux-gnu --target=bfin-elf --prefix=/home/shender/gnu/toolchain/bfin-elf --disable-libstdcxx-pch --enable-languages=c,c++ --with-newlib --enable-clocale=generic --disable-symvers --disable-libssp --disable-libffi --disable-libgcj --enable-version-specific-runtime-libs --enable-__cxa_atexit
Stu
^ permalink raw reply [flat|nested] 6+ messages in thread
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Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2011-09-26 9:30 Patch ping Jakub Jelinek
2011-09-26 10:08 ` Richard Sandiford
2011-09-26 15:55 ` [PATCH] Optimize in RTL vector AND { -1, -1, ... }, IOR { -1, -1, ... } and XOR { -1, -1, ... } (take 2) Jakub Jelinek
2011-09-26 23:11 ` Richard Henderson
2011-10-31 14:32 Henderson, Stuart
2011-11-11 16:41 ` Bernd Schmidt
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