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From: 陈逸轩 <chenyixuan@iscas.ac.cn>
To: "Jeff Law" <jeffreyalaw@gmail.com>
Cc: gcc-patches@gcc.gnu.org, kito.cheng@gmail.com, andrew@sifive.com,
	 oriachiuan@gmail.com
Subject: Re: Re: [PATCH] Ver.2: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
Date: Fri, 18 Nov 2022 13:52:45 +0800 (GMT+08:00)	[thread overview]
Message-ID: <585f64f0.348c8.184894bef48.Coremail.chenyixuan@iscas.ac.cn> (raw)
In-Reply-To: <36c502d5-a556-ab12-5466-32c112a2242f@gmail.com>

Thank you very much for your example! I have sent a new patch according to your guide.

&quot;Jeff Law&quot; &lt;jeffreyalaw@gmail.com&gt;wrote:
> 
> On 11/17/22 02:53, Yixuan Chen wrote:
> > 2022-11-17  Yixuan Chen  <chenyixuan@iscas.ac.cn>
> >
> >          * gcc/testsuite/gcc.dg/pr25521.c: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
> > ---
> >   gcc/testsuite/gcc.dg/pr25521.c | 3 ++-
> >   1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/gcc/testsuite/gcc.dg/pr25521.c b/gcc/testsuite/gcc.dg/pr25521.c
> > index 74fe2ae6626..628ddf1a761 100644
> > --- a/gcc/testsuite/gcc.dg/pr25521.c
> > +++ b/gcc/testsuite/gcc.dg/pr25521.c
> > @@ -2,7 +2,8 @@
> >      sections.
> >   
> >      { dg-require-effective-target elf }
> > -   { dg-do compile } */
> > +   { dg-do compile }
> > +   { dg-options "-msmall-data-limit=0" { target { riscv*-*-* } } } */
> >   
> >   const volatile int foo = 30;
> >   
> 
> Wouldn't this be better?  It avoids a target specific conditional by 
> instead extending what we look for to cover [s]rodata sections.
> 
> 
> Thoughts?
> 
> Jeff

      parent reply	other threads:[~2022-11-18  5:52 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-17  9:53 Yixuan Chen
2022-11-17 21:50 ` Jeff Law
2022-11-17 23:59   ` Palmer Dabbelt
2022-11-18  3:30     ` Oria Chiuan
2022-11-18  5:02       ` Palmer Dabbelt
2022-11-18  5:21         ` Oria Chiuan
2022-11-18  5:52   ` 陈逸轩 [this message]

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