From: "Jie Mei" <jie.mei@oss.cipunited.com>
To: <gcc-patches@gcc.gnu.org>
Cc: "YunQiang Su" <yunqiang.su@cipunited.com>,
"Maciej W . Rozycki" <macro@orcam.me.uk>
Subject: [PATCH v3 9/9] MIPS: Make mips16e2 generating ZEB/ZEH instead of ANDI under certain conditions
Date: Wed, 24 May 2023 17:41:24 +0800 [thread overview]
Message-ID: <7b8c006b3cd91120331c759b213bac49ad7a8286.1684918169.git.jie.mei@oss.cipunited.com> (raw)
In-Reply-To: <cover.1684918168.git.jie.mei@oss.cipunited.com>
[-- Attachment #1: Type: text/plain, Size: 2842 bytes --]
This patch allows mips16e2 acts the same with -O1~3
when generating ZEB/ZEH instead of ANDI under
the -O0 option, which shrinks the code size.
gcc/ChangeLog:
* config/mips/mips.md(*and<mode>3_mips16): Generates
ZEB/ZEH instructions.
---
gcc/config/mips/mips.md | 30 +++++++++++++++++-------------
1 file changed, 17 insertions(+), 13 deletions(-)
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 7eb65891820..85ed1735d83 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -3357,9 +3357,9 @@
(set_attr "mode" "<MODE>")])
(define_insn "*and<mode>3_mips16"
- [(set (match_operand:GPR 0 "register_operand" "=d,d,d,d,d,d,d,d")
- (and:GPR (match_operand:GPR 1 "nonimmediate_operand" "%W,W,W,d,0,d,0,0?")
- (match_operand:GPR 2 "and_operand" "Yb,Yh,Yw,Yw,d,Yx,Yz,K")))]
+ [(set (match_operand:GPR 0 "register_operand" "=d,d,d,d,d,d,d,d,d,d")
+ (and:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,W,W,W,d,0,d,0,0?")
+ (match_operand:GPR 2 "and_operand" "Yb,Yh,Yb,Yh,Yw,Yw,d,Yx,Yz,K")))]
"TARGET_MIPS16 && and_operands_ok (<MODE>mode, operands[1], operands[2])"
{
int len;
@@ -3368,38 +3368,42 @@
switch (which_alternative)
{
case 0:
+ return "zeb\t%0";
+ case 1:
+ return "zeh\t%0";
+ case 2:
operands[1] = gen_lowpart (QImode, operands[1]);
return "lbu\t%0,%1";
- case 1:
+ case 3:
operands[1] = gen_lowpart (HImode, operands[1]);
return "lhu\t%0,%1";
- case 2:
+ case 4:
operands[1] = gen_lowpart (SImode, operands[1]);
return "lwu\t%0,%1";
- case 3:
+ case 5:
return "#";
- case 4:
+ case 6:
return "and\t%0,%2";
- case 5:
+ case 7:
len = low_bitmask_len (<MODE>mode, INTVAL (operands[2]));
operands[2] = GEN_INT (len);
return "ext\t%0,%1,0,%2";
- case 6:
+ case 8:
mips_bit_clear_info (<MODE>mode, INTVAL (operands[2]), &pos, &len);
operands[1] = GEN_INT (pos);
operands[2] = GEN_INT (len);
return "ins\t%0,$0,%1,%2";
- case 7:
+ case 9:
return "andi\t%0,%x2";
default:
gcc_unreachable ();
}
}
- [(set_attr "move_type" "load,load,load,shift_shift,logical,ext_ins,ext_ins,andi")
+ [(set_attr "move_type" "andi,andi,load,load,load,shift_shift,logical,ext_ins,ext_ins,andi")
(set_attr "mode" "<MODE>")
- (set_attr "extended_mips16" "no,no,no,no,no,yes,yes,yes")
+ (set_attr "extended_mips16" "no,no,no,no,no,no,no,yes,yes,yes")
(set (attr "enabled")
- (cond [(and (eq_attr "alternative" "7")
+ (cond [(and (eq_attr "alternative" "9")
(not (match_test "ISA_HAS_MIPS16E2")))
(const_string "no")
(and (eq_attr "alternative" "0,1")
--
2.40.1
prev parent reply other threads:[~2023-05-24 9:41 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-24 9:41 [PATCH v3 0/9] MIPS: Add MIPS16e2 ASE instrucions Jie Mei
2023-05-24 9:41 ` [PATCH v3 1/9] MIPS: Add basic support for mips16e2 Jie Mei
2023-05-24 9:41 ` [PATCH v3 2/9] MIPS: Add MOVx instructions " Jie Mei
2023-05-24 9:41 ` [PATCH v3 3/9] MIPS: Add instruction about global pointer register " Jie Mei
2023-05-24 9:41 ` [PATCH v3 4/9] MIPS: Add bitwise instructions " Jie Mei
2023-05-24 9:41 ` [PATCH v3 5/9] MIPS: Add LUI instruction " Jie Mei
2023-05-24 9:41 ` [PATCH v3 6/9] MIPS: Add load/store word left/right instructions " Jie Mei
2023-05-24 9:41 ` [PATCH v3 7/9] MIPS: Use ISA_HAS_9BIT_DISPLACEMENT " Jie Mei
2023-05-24 9:41 ` [PATCH v3 8/9] MIPS: Add CACHE instruction " Jie Mei
2023-05-24 9:41 ` Jie Mei [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7b8c006b3cd91120331c759b213bac49ad7a8286.1684918169.git.jie.mei@oss.cipunited.com \
--to=jie.mei@oss.cipunited.com \
--cc=gcc-patches@gcc.gnu.org \
--cc=macro@orcam.me.uk \
--cc=yunqiang.su@cipunited.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).