[PATCH][GCC] arm: fix __arm_vld1q_z* and __arm_vst1q_p* intrinsics.

[PATCH][GCC] arm: fix __arm_vld1q_z* and __arm_vst1q_p* intrinsics.

[Murray Steele]

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Hi All,

This patch fixes the implementation of the existing __arm_vld1q_z* and
__arm_vst1q_p* MVE intrinsic functions.

The MVE ACLE allows for __ARM_MVE_PRESERVE_USER_NAMESPACE to be defined,
which removes definitions for intrinsic functions without the __arm_
prefix. __arm_vld1q_z* and __arm_vst1q_p* are currently implemented via
calls to vldr* and vstr*, which results in several compile-time errors when
__ARM_MVE_PRESERVE_USER_NAMESPACE is defined. This patch replaces these
with calls to their prefixed counterparts, __arm_vldr* and __arm_str*,
and adds a test covering the definition of __ARM_MVE_PRESERVE_USER_NAMESPACE.

Regression tested on arm-eabi -- no issues.

Thanks,
Murray

gcc/ChangeLog:

        * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
        function.
        (__arm_vst1q_p_s8): Likewise.
        (__arm_vld1q_z_u8): Likewise.
        (__arm_vld1q_z_s8): Likewise.
        (__arm_vst1q_p_u16): Likewise.
        (__arm_vst1q_p_s16): Likewise.
        (__arm_vld1q_z_u16): Likewise.
        (__arm_vld1q_z_s16): Likewise.
        (__arm_vst1q_p_u32): Likewise.
        (__arm_vst1q_p_s32): Likewise.
        (__arm_vld1q_z_u32): Likewise.
        (__arm_vld1q_z_s32): Likewise.
        (__arm_vld1q_z_f16): Likewise.
        (__arm_vst1q_p_f16): Likewise.
        (__arm_vld1q_z_f32): Likewise.
        (__arm_vst1q_p_f32): Likewise.

gcc/testsuite/ChangeLog:

        * gcc.target/arm/mve/general/preserve_user_namespace_1.c: New test.

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diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index e04d46218d03effdf0cb79471108cd2f24e92dec..708f5c71fddfc2cab0b0456e0b8724c803544ddc 100644
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -16171,14 +16171,14 @@ __extension__ extern __inline void
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vst1q_p_u8 (uint8_t * __addr, uint8x16_t __value, mve_pred16_t __p)
 {
-  return vstrbq_p_u8 (__addr, __value, __p);
+  return __arm_vstrbq_p_u8 (__addr, __value, __p);
 }
 
 __extension__ extern __inline void
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vst1q_p_s8 (int8_t * __addr, int8x16_t __value, mve_pred16_t __p)
 {
-  return vstrbq_p_s8 (__addr, __value, __p);
+  return __arm_vstrbq_p_s8 (__addr, __value, __p);
 }
 
 __extension__ extern __inline void
@@ -16203,14 +16203,14 @@ __extension__ extern __inline uint8x16_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vld1q_z_u8 (uint8_t const *__base, mve_pred16_t __p)
 {
-  return vldrbq_z_u8 ( __base, __p);
+  return __arm_vldrbq_z_u8 ( __base, __p);
 }
 
 __extension__ extern __inline int8x16_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vld1q_z_s8 (int8_t const *__base, mve_pred16_t __p)
 {
-  return vldrbq_z_s8 ( __base, __p);
+  return __arm_vldrbq_z_s8 ( __base, __p);
 }
 
 __extension__ extern __inline int8x16x2_t
@@ -16253,14 +16253,14 @@ __extension__ extern __inline void
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vst1q_p_u16 (uint16_t * __addr, uint16x8_t __value, mve_pred16_t __p)
 {
-  return vstrhq_p_u16 (__addr, __value, __p);
+  return __arm_vstrhq_p_u16 (__addr, __value, __p);
 }
 
 __extension__ extern __inline void
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vst1q_p_s16 (int16_t * __addr, int16x8_t __value, mve_pred16_t __p)
 {
-  return vstrhq_p_s16 (__addr, __value, __p);
+  return __arm_vstrhq_p_s16 (__addr, __value, __p);
 }
 
 __extension__ extern __inline void
@@ -16285,14 +16285,14 @@ __extension__ extern __inline uint16x8_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vld1q_z_u16 (uint16_t const *__base, mve_pred16_t __p)
 {
-  return vldrhq_z_u16 ( __base, __p);
+  return __arm_vldrhq_z_u16 ( __base, __p);
 }
 
 __extension__ extern __inline int16x8_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vld1q_z_s16 (int16_t const *__base, mve_pred16_t __p)
 {
-  return vldrhq_z_s16 ( __base, __p);
+  return __arm_vldrhq_z_s16 ( __base, __p);
 }
 
 __extension__ extern __inline int16x8x2_t
@@ -16335,14 +16335,14 @@ __extension__ extern __inline void
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vst1q_p_u32 (uint32_t * __addr, uint32x4_t __value, mve_pred16_t __p)
 {
-  return vstrwq_p_u32 (__addr, __value, __p);
+  return __arm_vstrwq_p_u32 (__addr, __value, __p);
 }
 
 __extension__ extern __inline void
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vst1q_p_s32 (int32_t * __addr, int32x4_t __value, mve_pred16_t __p)
 {
-  return vstrwq_p_s32 (__addr, __value, __p);
+  return __arm_vstrwq_p_s32 (__addr, __value, __p);
 }
 
 __extension__ extern __inline void
@@ -16367,14 +16367,14 @@ __extension__ extern __inline uint32x4_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vld1q_z_u32 (uint32_t const *__base, mve_pred16_t __p)
 {
-  return vldrwq_z_u32 ( __base, __p);
+  return __arm_vldrwq_z_u32 ( __base, __p);
 }
 
 __extension__ extern __inline int32x4_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vld1q_z_s32 (int32_t const *__base, mve_pred16_t __p)
 {
-  return vldrwq_z_s32 ( __base, __p);
+  return __arm_vldrwq_z_s32 ( __base, __p);
 }
 
 __extension__ extern __inline int32x4x2_t
@@ -19837,7 +19837,7 @@ __extension__ extern __inline float16x8_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vld1q_z_f16 (float16_t const *__base, mve_pred16_t __p)
 {
-  return vldrhq_z_f16 (__base, __p);
+  return __arm_vldrhq_z_f16 (__base, __p);
 }
 
 __extension__ extern __inline void
@@ -19853,7 +19853,7 @@ __extension__ extern __inline void
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vst1q_p_f16 (float16_t * __addr, float16x8_t __value, mve_pred16_t __p)
 {
-  return vstrhq_p_f16 (__addr, __value, __p);
+  return __arm_vstrhq_p_f16 (__addr, __value, __p);
 }
 
 __extension__ extern __inline float32x4x4_t
@@ -19878,7 +19878,7 @@ __extension__ extern __inline float32x4_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vld1q_z_f32 (float32_t const *__base, mve_pred16_t __p)
 {
-  return vldrwq_z_f32 (__base, __p);
+  return __arm_vldrwq_z_f32 (__base, __p);
 }
 
 __extension__ extern __inline void
@@ -19894,7 +19894,7 @@ __extension__ extern __inline void
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_vst1q_p_f32 (float32_t * __addr, float32x4_t __value, mve_pred16_t __p)
 {
-  return vstrwq_p_f32 (__addr, __value, __p);
+  return __arm_vstrwq_p_f32 (__addr, __value, __p);
 }
 
 __extension__ extern __inline float16x8_t
diff --git a/gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c b/gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c
new file mode 100644
index 0000000000000000000000000000000000000000..f107ac44ca9c6810a9429f332126f82f3f8656ee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/general/preserve_user_namespace_1.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+
+#define __ARM_MVE_PRESERVE_USER_NAMESPACE
+#include <arm_mve.h>

Re: [PATCH][GCC] arm: fix __arm_vld1q_z* and __arm_vst1q_p* intrinsics.

[Richard Earnshaw]

On 22/12/2021 15:55, Murray Steele via Gcc-patches wrote:
> Hi All,
> 
> This patch fixes the implementation of the existing __arm_vld1q_z* and
> __arm_vst1q_p* MVE intrinsic functions.
> 
> The MVE ACLE allows for __ARM_MVE_PRESERVE_USER_NAMESPACE to be defined,
> which removes definitions for intrinsic functions without the __arm_
> prefix. __arm_vld1q_z* and __arm_vst1q_p* are currently implemented via
> calls to vldr* and vstr*, which results in several compile-time errors when
> __ARM_MVE_PRESERVE_USER_NAMESPACE is defined. This patch replaces these
> with calls to their prefixed counterparts, __arm_vldr* and __arm_str*,
> and adds a test covering the definition of __ARM_MVE_PRESERVE_USER_NAMESPACE.

Is there a PR in bugzilla for this?

R.

> 
> Regression tested on arm-eabi -- no issues.
> 
> Thanks,
> Murray
> 
> gcc/ChangeLog:
> 
>         * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
>         function.
>         (__arm_vst1q_p_s8): Likewise.
>         (__arm_vld1q_z_u8): Likewise.
>         (__arm_vld1q_z_s8): Likewise.
>         (__arm_vst1q_p_u16): Likewise.
>         (__arm_vst1q_p_s16): Likewise.
>         (__arm_vld1q_z_u16): Likewise.
>         (__arm_vld1q_z_s16): Likewise.
>         (__arm_vst1q_p_u32): Likewise.
>         (__arm_vst1q_p_s32): Likewise.
>         (__arm_vld1q_z_u32): Likewise.
>         (__arm_vld1q_z_s32): Likewise.
>         (__arm_vld1q_z_f16): Likewise.
>         (__arm_vst1q_p_f16): Likewise.
>         (__arm_vld1q_z_f32): Likewise.
>         (__arm_vst1q_p_f32): Likewise.
> 
> gcc/testsuite/ChangeLog:
> 
>         * gcc.target/arm/mve/general/preserve_user_namespace_1.c: New test.
> 

Re: [PATCH][GCC] arm: fix __arm_vld1q_z* and __arm_vst1q_p* intrinsics.

[Murray Steele]

Hi,

On 22/12/2021 16:04, Richard Earnshaw wrote:

> 
> Is there a PR in bugzilla for this?
> 
> R.
> 


No, not at this time. It's something I came across whilst
making changes of my own.

For completeness, the ACLE specification I am referencing
has been added below [1].

[1]: https://github.com/ARM-software/acle/releases/tag/r2021Q3

Thanks,
Murray

Re: [PATCH][GCC] arm: fix __arm_vld1q_z* and __arm_vst1q_p* intrinsics.

[Richard Earnshaw]

On 22/12/2021 16:21, Murray Steele via Gcc-patches wrote:
> Hi,
> 
> On 22/12/2021 16:04, Richard Earnshaw wrote:
> 
>>
>> Is there a PR in bugzilla for this?
>>
>> R.
>>
> 
> 
> No, not at this time. It's something I came across whilst
> making changes of my own.
> 
> For completeness, the ACLE specification I am referencing
> has been added below [1].
> 
> [1]: https://github.com/ARM-software/acle/releases/tag/r2021Q3
> 
> Thanks,
> Murray

Andre created one today and I've now pulled this patch in.  Thanks, and 
sorry for the delay getting it committed.

R.