* [PATCH] RISC-V: Fix RVV binary auto-vectorizaiton test fails
@ 2023-05-11 23:29 juzhe.zhong
2023-05-12 1:03 ` juzhe.zhong
0 siblings, 1 reply; 6+ messages in thread
From: juzhe.zhong @ 2023-05-11 23:29 UTC (permalink / raw)
To: gcc-patches; +Cc: kito.cheng, palmer, jeffreyalaw, Juzhe-Zhong
From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
In rv32:
FAIL: gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmin-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vand-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vrem-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmul-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vand-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vdiv-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vor-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-scalar-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmax-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vor-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
In rv64:
FAIL: gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/shift-run.c: Fix fail.
* gcc.target/riscv/rvv/autovec/shift-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/shift-scalar-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vand-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vand-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vdiv-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmax-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmin-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmul-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vor-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vor-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vrem-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vxor-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c: Ditto.
---
gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c | 2 +-
.../gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c | 4 ++--
gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c | 2 +-
22 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
index 67e9f8ca242..159478c6947 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "shift-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
index aba9c842b1d..d9109fd8774 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "shift-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
index 1e801743cf9..a8ecf9767e5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
@@ -1,4 +1,4 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "shift-scalar-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
index aabd2e03231..82a5fe23e7d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "shift-scalar-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
index d9ba5a385b9..64c2eeec7cf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vadd-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
index 1c7def563ac..c13755ed06a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vand-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
index 3cd766b95a3..67f37c1e170 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vand-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
index c8f4ce88f65..aa9a3c55abe 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vdiv-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
index 40fdfbd8922..7d9b75ae0b1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vdiv-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
index 90e5c971150..cf184e24b1e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmax-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
index 03496305901..9bbaf763157 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmax-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
index 34f9348498b..b461f8ba484 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmin-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
index ff1d0bbf32e..07278b22b2d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmin-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
index 19e38ca8ff1..e8441c0605b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmul-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
index a21bae4708f..f436b8a82a8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmul-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
index e5eb1c48f73..5401e8d3ecd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vor-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
index d364871fd4f..ae115a2f503 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vor-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
index db3bee3c49a..4a4c064e101 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vrem-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
index 68dbdcf021a..5b6961d1f63 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vrem-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
index 26867a0bbd7..f7a2691b9f3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-do compile } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vsub-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
index 68b9648738f..ab0975a6408 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vxor-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
index 3e5885eb659..9729ad14eb1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vxor-template.h"
--
2.36.3
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] RISC-V: Fix RVV binary auto-vectorizaiton test fails
2023-05-11 23:29 [PATCH] RISC-V: Fix RVV binary auto-vectorizaiton test fails juzhe.zhong
@ 2023-05-12 1:03 ` juzhe.zhong
2023-05-12 2:13 ` Kito Cheng
0 siblings, 1 reply; 6+ messages in thread
From: juzhe.zhong @ 2023-05-12 1:03 UTC (permalink / raw)
To: 钟居哲, gcc-patches; +Cc: Kito.cheng, palmer, jeffreyalaw
[-- Attachment #1: Type: text/plain, Size: 19119 bytes --]
This patch has tested on both RV32/RV64, and all fails in RVV are cleaned up.
Ok for trunk?
juzhe.zhong@rivai.ai
From: juzhe.zhong
Date: 2023-05-12 07:29
To: gcc-patches
CC: kito.cheng; palmer; jeffreyalaw; Juzhe-Zhong
Subject: [PATCH] RISC-V: Fix RVV binary auto-vectorizaiton test fails
From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
In rv32:
FAIL: gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmin-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vand-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vrem-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmul-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vand-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vdiv-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vor-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-scalar-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmax-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vor-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
In rv64:
FAIL: gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/shift-run.c: Fix fail.
* gcc.target/riscv/rvv/autovec/shift-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/shift-scalar-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vand-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vand-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vdiv-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmax-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmin-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmul-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vor-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vor-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vrem-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vxor-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c: Ditto.
---
gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c | 2 +-
.../gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c | 4 ++--
gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c | 2 +-
22 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
index 67e9f8ca242..159478c6947 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "shift-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
index aba9c842b1d..d9109fd8774 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "shift-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
index 1e801743cf9..a8ecf9767e5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
@@ -1,4 +1,4 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "shift-scalar-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
index aabd2e03231..82a5fe23e7d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "shift-scalar-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
index d9ba5a385b9..64c2eeec7cf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vadd-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
index 1c7def563ac..c13755ed06a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vand-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
index 3cd766b95a3..67f37c1e170 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vand-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
index c8f4ce88f65..aa9a3c55abe 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vdiv-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
index 40fdfbd8922..7d9b75ae0b1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vdiv-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
index 90e5c971150..cf184e24b1e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmax-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
index 03496305901..9bbaf763157 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmax-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
index 34f9348498b..b461f8ba484 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmin-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
index ff1d0bbf32e..07278b22b2d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmin-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
index 19e38ca8ff1..e8441c0605b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmul-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
index a21bae4708f..f436b8a82a8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmul-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
index e5eb1c48f73..5401e8d3ecd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vor-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
index d364871fd4f..ae115a2f503 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vor-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
index db3bee3c49a..4a4c064e101 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vrem-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
index 68dbdcf021a..5b6961d1f63 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vrem-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
index 26867a0bbd7..f7a2691b9f3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-do compile } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vsub-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
index 68b9648738f..ab0975a6408 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vxor-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
index 3e5885eb659..9729ad14eb1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vxor-template.h"
--
2.36.3
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] RISC-V: Fix RVV binary auto-vectorizaiton test fails
2023-05-12 1:03 ` juzhe.zhong
@ 2023-05-12 2:13 ` Kito Cheng
2023-05-12 6:34 ` Robin Dapp
0 siblings, 1 reply; 6+ messages in thread
From: Kito Cheng @ 2023-05-12 2:13 UTC (permalink / raw)
To: juzhe.zhong; +Cc: gcc-patches, Kito.cheng, palmer, jeffreyalaw
ok, thanks :)
On Fri, May 12, 2023 at 9:04 AM juzhe.zhong@rivai.ai
<juzhe.zhong@rivai.ai> wrote:
>
> This patch has tested on both RV32/RV64, and all fails in RVV are cleaned up.
> Ok for trunk?
>
>
>
> juzhe.zhong@rivai.ai
>
> From: juzhe.zhong
> Date: 2023-05-12 07:29
> To: gcc-patches
> CC: kito.cheng; palmer; jeffreyalaw; Juzhe-Zhong
> Subject: [PATCH] RISC-V: Fix RVV binary auto-vectorizaiton test fails
> From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
>
> In rv32:
> FAIL: gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vmin-run.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vand-run.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vrem-run.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vmul-run.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/shift-run.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vand-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vdiv-run.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vor-run.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/shift-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/shift-scalar-run.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vmax-run.c -O3 -ftree-vectorize (test for excess errors)
> FAIL: gcc.target/riscv/rvv/autovec/vor-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
>
> In rv64:
> FAIL: gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/autovec/shift-run.c: Fix fail.
> * gcc.target/riscv/rvv/autovec/shift-rv64gcv.c: Ditto.
> * gcc.target/riscv/rvv/autovec/shift-scalar-run.c: Ditto.
> * gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vand-run.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vand-rv64gcv.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vdiv-run.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vmax-run.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vmin-run.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vmul-run.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vor-run.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vor-rv64gcv.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vrem-run.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vxor-run.c: Ditto.
> * gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c: Ditto.
>
> ---
> gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c | 2 +-
> .../gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c | 4 ++--
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c | 2 +-
> 22 files changed, 23 insertions(+), 23 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
> index 67e9f8ca242..159478c6947 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
> @@ -1,5 +1,5 @@
> /* { dg-do run { target { riscv_vector } } } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "shift-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
> index aba9c842b1d..d9109fd8774 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "shift-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
> index 1e801743cf9..a8ecf9767e5 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
> @@ -1,4 +1,4 @@
> /* { dg-do run { target { riscv_vector } } } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "shift-scalar-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
> index aabd2e03231..82a5fe23e7d 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "shift-scalar-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
> index d9ba5a385b9..64c2eeec7cf 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vadd-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
> index 1c7def563ac..c13755ed06a 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
> @@ -1,5 +1,5 @@
> /* { dg-do run { target { riscv_vector } } } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vand-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
> index 3cd766b95a3..67f37c1e170 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vand-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
> index c8f4ce88f65..aa9a3c55abe 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
> @@ -1,5 +1,5 @@
> /* { dg-do run { target { riscv_vector } } } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vdiv-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
> index 40fdfbd8922..7d9b75ae0b1 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vdiv-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
> index 90e5c971150..cf184e24b1e 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
> @@ -1,5 +1,5 @@
> /* { dg-do run { target { riscv_vector } } } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vmax-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
> index 03496305901..9bbaf763157 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vmax-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
> index 34f9348498b..b461f8ba484 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
> @@ -1,5 +1,5 @@
> /* { dg-do run { target { riscv_vector } } } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vmin-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
> index ff1d0bbf32e..07278b22b2d 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vmin-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
> index 19e38ca8ff1..e8441c0605b 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
> @@ -1,5 +1,5 @@
> /* { dg-do run { target { riscv_vector } } } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vmul-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
> index a21bae4708f..f436b8a82a8 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vmul-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
> index e5eb1c48f73..5401e8d3ecd 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
> @@ -1,5 +1,5 @@
> /* { dg-do run { target { riscv_vector } } } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vor-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
> index d364871fd4f..ae115a2f503 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vor-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
> index db3bee3c49a..4a4c064e101 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
> @@ -1,5 +1,5 @@
> /* { dg-do run { target { riscv_vector } } } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vrem-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
> index 68dbdcf021a..5b6961d1f63 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vrem-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
> index 26867a0bbd7..f7a2691b9f3 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
> @@ -1,5 +1,5 @@
> -/* { dg-do run { target { riscv_vector } } } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-do compile } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vsub-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
> index 68b9648738f..ab0975a6408 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
> @@ -1,5 +1,5 @@
> /* { dg-do run { target { riscv_vector } } } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vxor-template.h"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
> index 3e5885eb659..9729ad14eb1 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
> +/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
> #include "vxor-template.h"
> --
> 2.36.3
>
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] RISC-V: Fix RVV binary auto-vectorizaiton test fails
2023-05-12 2:13 ` Kito Cheng
@ 2023-05-12 6:34 ` Robin Dapp
2023-05-12 7:02 ` Kito Cheng
0 siblings, 1 reply; 6+ messages in thread
From: Robin Dapp @ 2023-05-12 6:34 UTC (permalink / raw)
To: Kito Cheng, juzhe.zhong; +Cc: gcc-patches, Kito.cheng, palmer, jeffreyalaw
> ok, thanks :)
This has likely been discussed at length before, but why need to
specify the additional -mabi with -march (instead of -march implying
a matching abi)?
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] RISC-V: Fix RVV binary auto-vectorizaiton test fails
2023-05-12 6:34 ` Robin Dapp
@ 2023-05-12 7:02 ` Kito Cheng
0 siblings, 0 replies; 6+ messages in thread
From: Kito Cheng @ 2023-05-12 7:02 UTC (permalink / raw)
To: Robin Dapp; +Cc: juzhe.zhong, gcc-patches, Kito.cheng, palmer, jeffreyalaw
We would like users to explicitly set that, so that implication rule
won't screw anything up or unexpect -mabi, that's kind of the
conclusion of most RISC-V GCC maintainers (Palmer/Jim Willsom/me).
Also the behavior is there for years, we don't want to make surprise
to user for the behavior change.
One more thing is -mcpu will also implicitly set -march if -march is not given:
so if we made -mabi could be implying from -march...then that means it
could be implying from -mcpu if -march is not given.
That's kind of...weird and confusing people I think.
And yes, clang did the ABI implication from -march and -mcpu, and I
got several issue around that within SIFive :P
On Fri, May 12, 2023 at 2:34 PM Robin Dapp via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> > ok, thanks :)
> This has likely been discussed at length before, but why need to
> specify the additional -mabi with -march (instead of -march implying
> a matching abi)?
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] RISC-V: Fix RVV binary auto-vectorizaiton test fails
@ 2023-05-11 23:29 juzhe.zhong
0 siblings, 0 replies; 6+ messages in thread
From: juzhe.zhong @ 2023-05-11 23:29 UTC (permalink / raw)
To: gcc-patches; +Cc: kito.cheng, palmer, jeffreyalaw, rdapp.gcc, Juzhe-Zhong
From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
In rv32:
FAIL: gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmin-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vand-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vrem-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmul-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vand-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vdiv-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vor-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/shift-scalar-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vmax-run.c -O3 -ftree-vectorize (test for excess errors)
FAIL: gcc.target/riscv/rvv/autovec/vor-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
In rv64:
FAIL: gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c -O3 -ftree-vectorize (test for excess errors)
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/shift-run.c: Fix fail.
* gcc.target/riscv/rvv/autovec/shift-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/shift-scalar-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vand-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vand-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vdiv-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmax-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmin-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmul-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vor-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vor-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vrem-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/vxor-run.c: Ditto.
* gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c: Ditto.
---
gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c | 2 +-
.../gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c | 4 ++--
gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c | 2 +-
22 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
index 67e9f8ca242..159478c6947 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "shift-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
index aba9c842b1d..d9109fd8774 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "shift-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
index 1e801743cf9..a8ecf9767e5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-run.c
@@ -1,4 +1,4 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "shift-scalar-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
index aabd2e03231..82a5fe23e7d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/shift-scalar-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "shift-scalar-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
index d9ba5a385b9..64c2eeec7cf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vadd-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vadd-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
index 1c7def563ac..c13755ed06a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vand-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
index 3cd766b95a3..67f37c1e170 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vand-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vand-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
index c8f4ce88f65..aa9a3c55abe 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vdiv-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
index 40fdfbd8922..7d9b75ae0b1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vdiv-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vdiv-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
index 90e5c971150..cf184e24b1e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmax-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
index 03496305901..9bbaf763157 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmax-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmax-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
index 34f9348498b..b461f8ba484 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmin-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
index ff1d0bbf32e..07278b22b2d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmin-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmin-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
index 19e38ca8ff1..e8441c0605b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmul-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
index a21bae4708f..f436b8a82a8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmul-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vmul-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
index e5eb1c48f73..5401e8d3ecd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vor-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
index d364871fd4f..ae115a2f503 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vor-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vor-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
index db3bee3c49a..4a4c064e101 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vrem-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
index 68dbdcf021a..5b6961d1f63 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vrem-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vrem-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
index 26867a0bbd7..f7a2691b9f3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vsub-rv64gcv.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-do compile } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vsub-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
index 68b9648738f..ab0975a6408 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target { riscv_vector } } } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vxor-template.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
index 3e5885eb659..9729ad14eb1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vxor-rv64gcv.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-additional-options "-std=c99 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
#include "vxor-template.h"
--
2.36.3
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2023-05-11 23:29 [PATCH] RISC-V: Fix RVV binary auto-vectorizaiton test fails juzhe.zhong
2023-05-12 1:03 ` juzhe.zhong
2023-05-12 2:13 ` Kito Cheng
2023-05-12 6:34 ` Robin Dapp
2023-05-12 7:02 ` Kito Cheng
2023-05-11 23:29 juzhe.zhong
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