From: Kito Cheng <kito.cheng@gmail.com>
To: Jeff Law <jeffreyalaw@gmail.com>
Cc: juzhe.zhong@rivai.ai, gcc-patches@gcc.gnu.org, palmer@dabbelt.com
Subject: Re: [PATCH] RISC-V: Reorder VSETVL PASS location
Date: Fri, 27 Jan 2023 17:40:48 +0800 [thread overview]
Message-ID: <CA+yXCZAHOuuS3Tvv6yunxM7r9VSmVc7W7KUgS5b0DsY-hse=BA@mail.gmail.com> (raw)
In-Reply-To: <f50ed263-1062-c10e-1054-0494500abe87@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 735 bytes --]
Added more comments and committed, thanks!
On Mon, Jan 23, 2023 at 3:36 AM Jeff Law <jeffreyalaw@gmail.com> wrote:
>
>
> On 1/17/23 20:03, juzhe.zhong@rivai.ai wrote:
> > From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
> >
> > gcc/ChangeLog:
> >
> > * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder
> VSETVL PASS.
> It'd be useful to know the motivation here, I could easily see someone
> in the future finding a case where the location of the vsetvl gets
> influenced by some dead code that would have been removed by the DCE
> pass. Then they're going to want to know the motivation behind the
> current pass placement.
>
> So, OK after adding a comment describing why the pass is placed where it
> is.
>
> Jeff
>
prev parent reply other threads:[~2023-01-27 9:41 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-18 3:03 juzhe.zhong
2023-01-22 19:36 ` Jeff Law
2023-01-27 9:40 ` Kito Cheng [this message]
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