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From: Kito Cheng <kito.cheng@gmail.com>
To: juzhe.zhong@rivai.ai
Cc: gcc-patches@gcc.gnu.org, kito.cheng@sifive.com,
	palmer@dabbelt.com,  palmer@rivosinc.com, jeffreyalaw@gmail.com,
	rdapp.gcc@gmail.com,  pan2.li@intel.com
Subject: Re: [V2 COMMITTED] RISC-V: Add RVV mask logic auto-vectorization
Date: Wed, 24 May 2023 15:31:17 +0800	[thread overview]
Message-ID: <CA+yXCZAJ--_mB8RsB=RxKvp5zEHGrH1kmKS-4-mw13fV==VigQ@mail.gmail.com> (raw)
In-Reply-To: <20230524072723.1387346-1-juzhe.zhong@rivai.ai>

LGTM, just one comment in git comment, no need v3, just commit with
the fix is fine :)

On Wed, May 24, 2023 at 3:28 PM <juzhe.zhong@rivai.ai> wrote:
>
> From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
>
> This patch is adding mask logic auto-vectorization.
> define the pattern as "define_insn_and_split" to allow

don't forgot to update here ^^^^^

> combine PASS easily combine series instructions.
>
> For example:
> combine vmxor.mm + vmnot.m into vmxnor.mm
>
> Build success and regression PASS
>
> And committed.

  reply	other threads:[~2023-05-24  7:31 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-24  7:27 juzhe.zhong
2023-05-24  7:31 ` Kito Cheng [this message]
2023-05-24  7:41   ` juzhe.zhong
2023-05-24  8:07     ` Kito Cheng
2023-05-24  8:14       ` Li, Pan2

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