From: Kito Cheng <kito.cheng@gmail.com>
To: Jeff Law <jeffreyalaw@gmail.com>
Cc: Jin Ma <jinma@linux.alibaba.com>,
gcc-patches@gcc.gnu.org, kito.cheng@sifive.com,
palmer@dabbelt.com
Subject: Re: [PATCH v6] RISC-V: Add support for experimental zfa extension.
Date: Wed, 3 May 2023 18:30:46 +0800 [thread overview]
Message-ID: <CA+yXCZALFCh0av+46Y6Mg4151qgGVHnOGjhcGCvp8xYas19YZA@mail.gmail.com> (raw)
In-Reply-To: <f18bfa1e-7d32-e49b-aa86-6d365078264b@gmail.com>
FYI:
This PR described the syntax of fli instruction, which is implemented
in LLVM, and the latest binutils patch (IIRC :P):
https://github.com/riscv-non-isa/riscv-asm-manual/pull/85
prev parent reply other threads:[~2023-05-03 10:30 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-10 12:40 Jin Ma
2023-03-14 18:00 ` Jeff Law
2023-04-13 9:22 ` Christoph Müllner
2023-04-13 11:15 ` jinma
2023-04-20 17:40 ` Jeff Law
2023-05-03 10:30 ` Kito Cheng [this message]
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