From: Kito Cheng <kito.cheng@gmail.com>
To: shiyulong@iscas.ac.cn
Cc: "GCC Patches" <gcc-patches@gcc.gnu.org>,
"Andrew Waterman" <andrew@sifive.com>,
jiawei <jiawei@iscas.ac.cn>,
wuwei2016@iscas.ac.cn, 廖仕华 <shihua@iscas.ac.cn>
Subject: Re: [PATCH V4 0/3] RISC-V:Add mininal support for Zicbo[mzp]
Date: Tue, 24 May 2022 21:02:41 +0800 [thread overview]
Message-ID: <CA+yXCZAnjDaqD2bJoUObVGvnGiYq770un9BBHq0oNAKKT+W_2A@mail.gmail.com> (raw)
In-Reply-To: <20220510032526.11560-1-shiyulong@iscas.ac.cn>
Committed with a few minor style fixes, thanks!
On Tue, May 10, 2022 at 11:26 AM <shiyulong@iscas.ac.cn> wrote:
>
> From: yulong <shiyulong@iscas.ac.cn>
>
> This patchset adds support for three recently ratified RISC-V extensions:
>
> - Zicbom (Cache-Block Management Instructions)
> - Zicbop (Cache-Block Prefetch hint instructions)
> - Zicboz (Cache-Block Zero Instructions)
>
> Patch 1: Add Zicbom/z/p mininal support
> Patch 2: Add Zicbom/z/p instructions arch support
> Patch 3: Add Zicbom/z/p instructions testcases
>
> diff with the previous version:
> We use unspec_volatile instead of unspec for those cache operations, and move those UNSPEC from unspec to unspecv.
> 19
> 20 cf. <https://github.com/riscv/riscv-CMOs/blob/fc8e97a9531ac9811971a182ae431976b86216e1/specifications/cmobase-v1.0-rc2.pdf>;
>
> yulong (3):
> RISC-V: Add mininal support for Zicbo[mzp]
> RISC-V:Cache Management Operation instructions
> RISC-V:Cache Management Operation instructions testcases
>
> gcc/common/config/riscv/riscv-common.cc | 8 +++
> gcc/config/riscv/predicates.md | 4 ++
> gcc/config/riscv/riscv-builtins.cc | 16 ++++++
> gcc/config/riscv/riscv-cmo.def | 17 +++++++
> gcc/config/riscv/riscv-ftypes.def | 4 ++
> gcc/config/riscv/riscv-opts.h | 8 +++
> gcc/config/riscv/riscv.md | 51 +++++++++++++++++++
> gcc/config/riscv/riscv.opt | 3 ++
> gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c | 21 ++++++++
> gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c | 21 ++++++++
> gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c | 23 +++++++++
> gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c | 23 +++++++++
> gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c | 9 ++++
> gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c | 9 ++++
> 14 files changed, 217 insertions(+)
> create mode 100644 gcc/config/riscv/riscv-cmo.def
> create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
> create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
>
> --
> 2.17.1
>
prev parent reply other threads:[~2022-05-24 13:02 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-10 3:25 shiyulong
2022-05-10 3:25 ` [PATCH V4 1/3] RISC-V: Add " shiyulong
2022-05-10 3:25 ` [PATCH V4 2/3] RISC-V:Cache Management Operation instructions shiyulong
2022-05-26 11:58 ` Simon Cook
2022-05-26 15:37 ` Kito Cheng
2022-05-10 3:25 ` [PATCH V4 3/3] RISC-V:Cache Management Operation instructions testcases shiyulong
2022-05-24 13:02 ` Kito Cheng [this message]
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