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From: Kito Cheng <kito.cheng@gmail.com>
To: Jeff Law <jeffreyalaw@gmail.com>
Cc: 钟居哲 <juzhe.zhong@rivai.ai>, gcc-patches <gcc-patches@gcc.gnu.org>,
	palmer <palmer@dabbelt.com>
Subject: Re: [PATCH] RISC-V: Add testcases for VSETVL PASS
Date: Mon, 19 Dec 2022 11:22:16 +0800	[thread overview]
Message-ID: <CA+yXCZDOUHmTCkxhQeK1F82C6U6nSzNQB8isJc=ui5MGxS5J2g@mail.gmail.com> (raw)
In-Reply-To: <31305c93-d716-f8f2-a061-ccecc62f95b2@gmail.com>

Hi Jeff:

> Ah, I should have looked at those regexps closer.  Understood about the
> checking for hoisting the vsetvl.  Though it makes me wonder if we'd be
> better off dumping information out of the vsetvl pass.


I've discussed adding an extra verify pass and a kind of rating
mechnish to vsetvli pass with Ju-Zhe,
so that we don't need to do such asm scan, which is relatively fragile
to broken.

And we'll implement that in the next few weeks :)

Thanks

  reply	other threads:[~2022-12-19  3:22 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-14  8:09 juzhe.zhong
2022-12-16 20:07 ` Jeff Law
2022-12-17  1:31   ` 钟居哲
2022-12-17  1:42     ` Jeff Law
2022-12-19  3:22       ` Kito Cheng [this message]
2022-12-26  9:20 ` Andreas Schwab
2022-12-26  9:28   ` 钟居哲
2022-12-27 15:04   ` Jeff Law
2022-12-27 15:12     ` Kito Cheng

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