From: "Li, Pan2" <pan2.li@intel.com>
To: 钟居哲 <juzhe.zhong@rivai.ai>, "Jeff Law" <jeffreyalaw@gmail.com>,
"rdapp.gcc" <rdapp.gcc@gmail.com>,
"kito.cheng" <kito.cheng@sifive.com>
Cc: gcc-patches <gcc-patches@gcc.gnu.org>,
"Wang, Yanzhang" <yanzhang.wang@intel.com>
Subject: RE: Re: [PATCH v7] RISC-V: Support CALL for RVV floating-point dynamic rounding
Date: Thu, 27 Jul 2023 01:38:27 +0000 [thread overview]
Message-ID: <MW5PR11MB59084D84CC959F0A8B87EF86A901A@MW5PR11MB5908.namprd11.prod.outlook.com> (raw)
In-Reply-To: <041F6335ED3A6D77+2023072706560713312772@rivai.ai>
[-- Attachment #1: Type: text/plain, Size: 3106 bytes --]
Thanks Juzhe and Jeff for suggestion. The approach like emit_insn_before_noloc will result in below ICE here.
../../../.././gcc/libstdc++-v3/libsupc++/new_opant.cc:42:1: error: flow control insn inside a basic block.
../../../.././gcc/libstdc++-v3/libsupc++/new_opant.cc:42:1: internal compiler error: in rtl_verify_bb_insns, at cfgrtl.cc:2796
Then I tried below approach but also have ICE like below.
../../../.././gcc/libstdc++-v3/libsupc++/eh_personality.cc:805:1: internal compiler error: in insert_insn_on_edge, at cfgrtl.cc:1976.
The insert_insn_end_basic_block have some special handling when end bb is CALL.
Pan
From: 钟居哲 <juzhe.zhong@rivai.ai>
Sent: Thursday, July 27, 2023 6:56 AM
To: Jeff Law <jeffreyalaw@gmail.com>; rdapp.gcc <rdapp.gcc@gmail.com>; kito.cheng <kito.cheng@sifive.com>; Li, Pan2 <pan2.li@intel.com>
Cc: gcc-patches <gcc-patches@gcc.gnu.org>; Wang, Yanzhang <yanzhang.wang@intel.com>
Subject: Re: Re: [PATCH v7] RISC-V: Support CALL for RVV floating-point dynamic rounding
Thanks Jeff.
Hi, Pan:
Plz try (insert edge and put 'frrm' on that edge) instead of insert end of block to see whether it works
(I have tried onece but I don't remember what happens).
Try that with following codes:
edge eg;
edge_iterator ei;
FOR_EACH_EDGE (eg, ei, bb->succs)
{
start_sequence ();
emit_insn (gen_frrmsi (DYNAMIC_FRM_RTL (cfun)));
rtx_insn *backup_insn = get_insns ();
end_sequence ();
insert_insn_on_edge (backup_insn, eg);
}
to see how's going.
Not sure whether it is correct, Jeff could comments on that.
Thanks.
________________________________
juzhe.zhong@rivai.ai<mailto:juzhe.zhong@rivai.ai>
From: Jeff Law<mailto:jeffreyalaw@gmail.com>
Date: 2023-07-27 06:46
To: 钟居哲<mailto:juzhe.zhong@rivai.ai>; rdapp.gcc<mailto:rdapp.gcc@gmail.com>; kito.cheng<mailto:kito.cheng@sifive.com>; pan2.li<mailto:pan2.li@intel.com>
CC: gcc-patches<mailto:gcc-patches@gcc.gnu.org>; yanzhang.wang<mailto:yanzhang.wang@intel.com>
Subject: Re: [PATCH v7] RISC-V: Support CALL for RVV floating-point dynamic rounding
On 7/26/23 16:21, 钟居哲 wrote:
> Hi, Jeff.
>
> insert_insn_end_basic_block is to handle this following case:
>
> bb 1:
> ...
> CALL.---->BB_END of bb
> bb 2:
> vfadd rne
>
> You can see there is no instructions after CALL.
>
> So you we use insert_insn_end_basic_block insert a "frrm" at the end of
> the bb 1.
>
> I know typically it's better to insert a edge between bb 1 and bb 2,
> then put "frrm" in that edgen.
> However, it causes ICE.
We'd need to know the reason for the ICE.
>
> If we really need to follow this approach, it seems that we need to
> modify the "mode_sw" PASS?
> Currently, we are avoiding changing the codes of PASS.
Generally wise, but sometimes we do need to change generic bits. Let's
dive a bit into this.
We have more freedom here to loosen the profitability constraints since
its a target specific pass, but let's at least understand the what's
going on with the ICE, then make some decisions about the best way forward.
jeff
next prev parent reply other threads:[~2023-07-27 1:38 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-19 3:28 [PATCH v1] " pan2.li
2023-07-19 3:31 ` juzhe.zhong
2023-07-19 6:30 ` Li, Pan2
2023-07-20 6:43 ` [PATCH v4] " pan2.li
2023-07-20 6:47 ` juzhe.zhong
2023-07-21 3:11 ` juzhe.zhong
2023-07-21 6:44 ` Li, Pan2
2023-07-23 13:11 ` [PATCH v5] " pan2.li
2023-07-24 0:53 ` juzhe.zhong
2023-07-24 1:51 ` Li, Pan2
2023-07-24 2:45 ` Li, Pan2
2023-07-24 2:42 ` [PATCH v6] " pan2.li
2023-07-24 10:28 ` Robin Dapp
2023-07-24 11:59 ` Li, Pan2
2023-07-24 12:03 ` Li, Pan2
2023-07-25 5:51 ` [PATCH v7] " pan2.li
2023-07-25 6:07 ` Li, Pan2
2023-07-25 8:38 ` Robin Dapp
2023-07-25 11:53 ` Li, Pan2
2023-07-25 13:23 ` Kito Cheng
2023-07-25 14:12 ` Robin Dapp
2023-07-26 13:08 ` Robin Dapp
2023-07-26 21:40 ` Jeff Law
2023-07-26 22:21 ` 钟居哲
2023-07-26 22:46 ` Jeff Law
2023-07-26 22:56 ` 钟居哲
2023-07-27 1:38 ` Li, Pan2 [this message]
2023-07-27 8:19 ` Li, Pan2
2023-07-27 2:09 ` Li, Pan2
2023-07-27 7:25 ` Robin Dapp
2023-07-27 8:26 ` Li, Pan2
2023-07-27 8:41 ` Robin Dapp
2023-07-27 10:27 ` Li, Pan2
[not found] ` <63471C6E126E44CF+D1CEA4C9-0050-43CD-8DE3-26EBD7AEE6DA@rivai.ai>
2023-07-26 13:35 ` Li, Pan2
2023-07-26 13:43 ` Li, Pan2
2023-07-26 13:46 ` Robin Dapp
2023-07-26 13:57 ` Kito Cheng
2023-07-26 14:05 ` Kito Cheng
2023-07-26 14:10 ` Robin Dapp
2023-07-26 14:18 ` 钟居哲
2023-07-26 14:30 ` Li, Pan2
2023-07-26 15:34 ` Kito Cheng
2023-07-26 16:00 ` Palmer Dabbelt
2023-07-26 21:01 ` Robin Dapp
2023-07-28 1:15 ` [PATCH v8] " pan2.li
2023-07-28 10:05 ` Robin Dapp
2023-07-28 12:34 ` Li, Pan2
2023-08-01 7:50 ` Kito Cheng
2023-08-01 8:00 ` Li, Pan2
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