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From: "Li, Pan2" <pan2.li@intel.com>
To: Kito Cheng <kito.cheng@sifive.com>,
	Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
Cc: Richard Biener <rguenther@suse.de>,
	Richard Biener via Gcc-patches <gcc-patches@gcc.gnu.org>,
	"juzhe.zhong@rivai.ai" <juzhe.zhong@rivai.ai>,
	"Wang, Yanzhang" <yanzhang.wang@intel.com>,
	"jeffreyalaw@gmail.com" <jeffreyalaw@gmail.com>,
	"richard.sandiford@arm.com" <richard.sandiford@arm.com>
Subject: RE: [PATCH] Machine_Mode: Extend machine_mode from 8 to 16 bits
Date: Sat, 13 May 2023 12:26:56 +0000	[thread overview]
Message-ID: <MW5PR11MB59087B9DA956ABA60E7F1823A97A9@MW5PR11MB5908.namprd11.prod.outlook.com> (raw)
In-Reply-To: <CALLt3TiCbguYiZhrYLGtMCdT9d_-TsWKiT777qU1D4imqedWFw@mail.gmail.com>

Oops, looks missed this part when I search all machine_mode by word. Thanks kito for catching this.

It seems there is no easy way to remind the developer to change (for example 16 to 32 bits) the below part in future, how about add some comments to MACHINE_MODE_BITSIZE for this?

Pan

-----Original Message-----
From: Kito Cheng <kito.cheng@sifive.com> 
Sent: Saturday, May 13, 2023 4:45 PM
To: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
Cc: Richard Biener <rguenther@suse.de>; Richard Biener via Gcc-patches <gcc-patches@gcc.gnu.org>; Li, Pan2 <pan2.li@intel.com>; juzhe.zhong@rivai.ai; Wang, Yanzhang <yanzhang.wang@intel.com>; jeffreyalaw@gmail.com; richard.sandiford@arm.com
Subject: Re: [PATCH] Machine_Mode: Extend machine_mode from 8 to 16 bits

Hi Pan:

Tried this patch and I ran into some issues, some variables are using unsigned char to hold machine mode and will have problems when the number of modes is larger than 255...

And here is the fix:


diff --git a/gcc/genmodes.cc b/gcc/genmodes.cc index 715787b8f483..55ac2adb5596 100644
--- a/gcc/genmodes.cc
+++ b/gcc/genmodes.cc
@@ -1141,10 +1141,10 @@ inline __attribute__((__always_inline__))\n\
#else\n\
extern __inline__ __attribute__((__always_inline__, __gnu_inline__))\n\ #endif\n\ -unsigned char\n\
+unsigned short\n\
mode_inner_inline (machine_mode mode)\n\ {\n\
-  extern const unsigned char mode_inner[NUM_MACHINE_MODES];\n\
+  extern const unsigned short mode_inner[NUM_MACHINE_MODES];\n\
  gcc_assert (mode >= 0 && mode < NUM_MACHINE_MODES);\n\
  switch (mode)\n\
    {");
@@ -1529,7 +1529,7 @@ emit_mode_wider (void)
  int c;
  struct mode_data *m;

-  print_decl ("unsigned char", "mode_next", "NUM_MACHINE_MODES");
+  print_decl ("unsigned short", "mode_next", "NUM_MACHINE_MODES");

  for_all_modes (c, m)
    tagged_printf ("E_%smode",
@@ -1537,7 +1537,7 @@ emit_mode_wider (void)
                  m->name);

  print_closer ();
-  print_decl ("unsigned char", "mode_wider", "NUM_MACHINE_MODES");
+  print_decl ("unsigned short", "mode_wider", "NUM_MACHINE_MODES");

  for_all_modes (c, m)
    {
@@ -1568,7 +1568,7 @@ emit_mode_wider (void)
    }

  print_closer ();
-  print_decl ("unsigned char", "mode_2xwider", "NUM_MACHINE_MODES");
+  print_decl ("unsigned short", "mode_2xwider", "NUM_MACHINE_MODES");

  for_all_modes (c, m)
    {
@@ -1625,7 +1625,7 @@ emit_mode_complex (void)
  int c;
  struct mode_data *m;

-  print_decl ("unsigned char", "mode_complex", "NUM_MACHINE_MODES");
+  print_decl ("unsigned short", "mode_complex", "NUM_MACHINE_MODES");

  for_all_modes (c, m)
    tagged_printf ("E_%smode",
@@ -1665,7 +1665,7 @@ emit_mode_inner (void)
  int c;
  struct mode_data *m;

-  print_decl ("unsigned char", "mode_inner", "NUM_MACHINE_MODES");
+  print_decl ("unsigned short", "mode_inner", "NUM_MACHINE_MODES");

  for_all_modes (c, m)
    tagged_printf ("E_%smode",
@@ -1738,7 +1738,7 @@ emit_class_narrowest_mode (void) {
  int c;

-  print_decl ("unsigned char", "class_narrowest_mode", "MAX_MODE_CLASS");
+  print_decl ("unsigned short", "class_narrowest_mode", 
+ "MAX_MODE_CLASS");

  for (c = 0; c < MAX_MODE_CLASS; c++)
    {
diff --git a/gcc/machmode.h b/gcc/machmode.h index f1865c1ef425..a168d6f0da2e 100644
--- a/gcc/machmode.h
+++ b/gcc/machmode.h
@@ -24,13 +24,13 @@ typedef opt_mode<machine_mode> opt_machine_mode;

extern CONST_MODE_SIZE poly_uint16_pod mode_size[NUM_MACHINE_MODES]; extern CONST_MODE_PRECISION poly_uint16_pod mode_precision[NUM_MACHINE_MODES];
-extern const unsigned char mode_inner[NUM_MACHINE_MODES];
+extern const unsigned short mode_inner[NUM_MACHINE_MODES];
extern CONST_MODE_NUNITS poly_uint16_pod mode_nunits[NUM_MACHINE_MODES]; extern CONST_MODE_UNIT_SIZE unsigned char mode_unit_size[NUM_MACHINE_MODES];
extern const unsigned short mode_unit_precision[NUM_MACHINE_MODES];
-extern const unsigned char mode_next[NUM_MACHINE_MODES]; -extern const unsigned char mode_wider[NUM_MACHINE_MODES]; -extern const unsigned char mode_2xwider[NUM_MACHINE_MODES];
+extern const unsigned short mode_next[NUM_MACHINE_MODES]; extern const 
+unsigned short mode_wider[NUM_MACHINE_MODES]; extern const unsigned 
+short mode_2xwider[NUM_MACHINE_MODES];

template<typename T>
struct mode_traits
@@ -797,7 +797,7 @@ GET_MODE_2XWIDER_MODE (const T &m) }

/* Get the complex mode from the component mode.  */ -extern const unsigned char mode_complex[NUM_MACHINE_MODES];
+extern const unsigned short mode_complex[NUM_MACHINE_MODES];
#define GET_MODE_COMPLEX_MODE(MODE) ((machine_mode) mode_complex[MODE])

/* Represents a machine mode that must have a fixed size.  The main @@ -946,7 +946,7 @@ extern unsigned get_mode_alignment (machine_mode);

/* For each class, get the narrowest mode in that class.  */

-extern const unsigned char class_narrowest_mode[MAX_MODE_CLASS];
+extern const unsigned short class_narrowest_mode[MAX_MODE_CLASS];
#define GET_CLASS_NARROWEST_MODE(CLASS) \
  ((machine_mode) class_narrowest_mode[CLASS])

--
2.39.2

  reply	other threads:[~2023-05-13 12:27 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-12  5:00 pan2.li
2023-05-12  6:49 ` Richard Biener
2023-05-12 19:14   ` Bernhard Reutner-Fischer
2023-05-13  8:44     ` Kito Cheng
2023-05-13 12:26       ` Li, Pan2 [this message]
2023-06-30 11:46       ` Adjust LTO mode tables for "Machine_Mode: Extend machine_mode from 8 to 16 bits" (was: [PATCH] Machine_Mode: Extend machine_mode from 8 to 16 bits) Thomas Schwinge
2023-06-30 12:45         ` Kito Cheng
2023-06-30 16:11           ` Thomas Schwinge
2023-06-30 16:37           ` Jakub Jelinek
2023-07-04 15:45             ` Thomas Schwinge
     [not found]         ` <MW5PR11MB590876BB7E52B78E837C95C9A913A@MW5PR11MB5908.namprd11.prod.outlook.com>
     [not found]           ` <CAFiYyc0Ajoi__g1YJhdrh-Z3DsOyU7+1iG6SEmZMDzAShX-L6g@mail.gmail.com>
     [not found]             ` <MW5PR11MB5908E5743F472D48ACF60039A913A@MW5PR11MB5908.namprd11.prod.outlook.com>
2023-08-10 13:23               ` Machine Mode ICE in RISC-V when LTO Thomas Schwinge
2023-08-10 14:14                 ` Li, Pan2
2023-08-11  6:40                   ` Li, Pan2
2023-09-15 13:33                     ` Robin Dapp
2023-09-18 14:46                       ` LTO: Get rid of 'lto_mode_identity_table' (was: Machine Mode ICE in RISC-V when LTO) Thomas Schwinge
2023-09-18 14:53                         ` Richard Biener
2023-05-12  8:24 ` [PATCH] Machine_Mode: Extend machine_mode from 8 to 16 bits Richard Sandiford
2023-05-12 11:16   ` Li, Pan2
2023-05-12 11:31     ` Richard Sandiford
2023-05-12 11:48       ` Li, Pan2
2023-05-16 15:35 ` pan2.li
2023-05-18  8:57   ` Richard Sandiford
2023-05-18  9:17     ` Li, Pan2
     [not found] <Message-Id: <20230512050016.476110-1-pan2.li@intel.com>
2023-05-12 15:38 ` [PATCH v2] " pan2.li
2023-05-13 13:13 ` [PATCH v3] " pan2.li
2023-05-16  1:12   ` Li, Pan2
2023-05-16  7:29     ` Richard Sandiford
2023-05-16  7:55       ` Li, Pan2
2023-05-16  8:03         ` Xi Ruoyao
2023-05-16  8:05           ` Li, Pan2
2023-05-16  9:09   ` Richard Sandiford
2023-05-16 12:17     ` Li, Pan2
2023-05-16 15:39       ` Li, Pan2

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