From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
To: Andrea Corallo <Andrea.Corallo@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>,
Andrea Corallo <Andrea.Corallo@arm.com>
Subject: RE: [PATCH 22/23] arm: improve tests for vld2q*
Date: Fri, 20 Jan 2023 18:09:47 +0000 [thread overview]
Message-ID: <PAXPR08MB692608E1F4E0BEE27F4D9FB393C59@PAXPR08MB6926.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20230120163948.752531-23-andrea.corallo@arm.com>
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 22/23] arm: improve tests for vld2q*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vld2q_f16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vld2q_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vld2q_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vld2q_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vld2q_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vld2q_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vld2q_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vld2q_u8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../gcc.target/arm/mve/intrinsics/vld2q_f16.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_f32.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_s16.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_s32.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_s8.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_u16.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_u32.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_u8.c | 33 ++++++++++++++++---
> 8 files changed, 224 insertions(+), 40 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
> index 24e7a2ea4d0..81690b1022e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> float16x8x2_t
> -foo (float16_t const * addr)
> +foo (float16_t const *addr)
> {
> return vld2q_f16 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.16" } } */
> -/* { dg-final { scan-assembler "vld21.16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> float16x8x2_t
> -foo1 (float16_t const * addr)
> +foo1 (float16_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
> index 727484caaf6..d2ae31fa9e5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> float32x4x2_t
> -foo (float32_t const * addr)
> +foo (float32_t const *addr)
> {
> return vld2q_f32 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.32" } } */
> -/* { dg-final { scan-assembler "vld21.32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> float32x4x2_t
> -foo1 (float32_t const * addr)
> +foo1 (float32_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
> index f2864a00478..fb4dc1b4fcf 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> int16x8x2_t
> -foo (int16_t const * addr)
> +foo (int16_t const *addr)
> {
> return vld2q_s16 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.16" } } */
> -/* { dg-final { scan-assembler "vld21.16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> int16x8x2_t
> -foo1 (int16_t const * addr)
> +foo1 (int16_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
> index 9fe2e0459b5..aeb85238fd2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> int32x4x2_t
> -foo (int32_t const * addr)
> +foo (int32_t const *addr)
> {
> return vld2q_s32 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.32" } } */
> -/* { dg-final { scan-assembler "vld21.32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> int32x4x2_t
> -foo1 (int32_t const * addr)
> +foo1 (int32_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
> index 736080a94a7..687e5ded48c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> int8x16x2_t
> -foo (int8_t const * addr)
> +foo (int8_t const *addr)
> {
> return vld2q_s8 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.8" } } */
> -/* { dg-final { scan-assembler "vld21.8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> int8x16x2_t
> -foo1 (int8_t const * addr)
> +foo1 (int8_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
> index 2d89ebdcf6b..281fe5eaf10 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> uint16x8x2_t
> -foo (uint16_t const * addr)
> +foo (uint16_t const *addr)
> {
> return vld2q_u16 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.16" } } */
> -/* { dg-final { scan-assembler "vld21.16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> uint16x8x2_t
> -foo1 (uint16_t const * addr)
> +foo1 (uint16_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
> index 28d311eca68..524afee72e9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> uint32x4x2_t
> -foo (uint32_t const * addr)
> +foo (uint32_t const *addr)
> {
> return vld2q_u32 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.32" } } */
> -/* { dg-final { scan-assembler "vld21.32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> uint32x4x2_t
> -foo1 (uint32_t const * addr)
> +foo1 (uint32_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
> index 790c9743c9a..9eebbd42719 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> uint8x16x2_t
> -foo (uint8_t const * addr)
> +foo (uint8_t const *addr)
> {
> return vld2q_u8 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.8" } } */
> -/* { dg-final { scan-assembler "vld21.8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> uint8x16x2_t
> -foo1 (uint8_t const * addr)
> +foo1 (uint8_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
next prev parent reply other threads:[~2023-01-20 18:10 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
2023-01-20 16:39 ` [PATCH 01/23] arm: improve tests and fix vclsq* Andrea Corallo
2023-01-20 17:44 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 02/23] arm: improve tests and fix vclzq* Andrea Corallo
2023-01-20 17:46 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 03/23] arm: improve tests and fix vnegq* Andrea Corallo
2023-01-20 17:47 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 04/23] arm: improve tests for vmulhq* Andrea Corallo
2023-01-20 17:48 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 05/23] arm: improve tests for vmullbq* Andrea Corallo
2023-01-20 17:51 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 06/23] arm: improve tests for vmulltq* Andrea Corallo
2023-01-20 17:52 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 07/23] arm: improve tests for vcaddq* Andrea Corallo
2023-01-20 17:52 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 08/23] arm: improve tests for vcmlaq* Andrea Corallo
2023-01-20 17:53 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 09/23] arm: improve tests for vcmulq* Andrea Corallo
2023-01-20 17:59 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 10/23] arm: improve tests and fix vqabsq* Andrea Corallo
2023-01-20 18:01 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 11/23] arm: improve tests for vqdmladhq* Andrea Corallo
2023-01-20 18:03 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 12/23] arm: improve tests for vqdmladhxq* Andrea Corallo
2023-01-20 18:04 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 13/23] arm: improve tests for vqrdmladhq* Andrea Corallo
2023-01-20 18:04 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 14/23] arm: improve tests for vqrdmladhxq* Andrea Corallo
2023-01-20 18:05 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 15/23] arm: improve tests for vqrdmlashq* Andrea Corallo
2023-01-20 18:06 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 16/23] arm: improve tests for vqdmlsdhq* Andrea Corallo
2023-01-20 18:06 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 17/23] arm: improve tests for vqdmlsdhxq* Andrea Corallo
2023-01-20 18:07 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 18/23] arm: improve tests for vqrdmlsdhq* Andrea Corallo
2023-01-20 18:07 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 19/23] arm: improve tests for vqrdmlsdhxq* Andrea Corallo
2023-01-20 18:08 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 20/23] arm: improve tests for vqrdmulhq* Andrea Corallo
2023-01-20 18:08 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 21/23] arm: improve tests and fix vqnegq* Andrea Corallo
2023-01-20 18:08 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 22/23] arm: improve tests for vld2q* Andrea Corallo
2023-01-20 18:09 ` Kyrylo Tkachov [this message]
2023-01-20 16:39 ` [PATCH 23/23] arm: fix missing extern "C" in MVE tests Andrea Corallo
2023-01-20 18:10 ` Kyrylo Tkachov
2023-01-25 13:53 ` Andrea Corallo
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