Re: [PATCH] [X86_64]: Enable support for next generation AMD Zen4 CPU

[Jan Hubicka <hubicka@ucw.cz>]

> On Fri, Oct 21, 2022 at 12:00 PM Kumar, Venkataramanan via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
> >
> > Hi all,
> >
> > > -----Original Message-----
> > > From: Joshi, Tejas Sanjay <TejasSanjay.Joshi@amd.com>
> > > Sent: Monday, October 17, 2022 8:09 PM
> > > To: gcc-patches@gcc.gnu.org
> > > Cc: Kumar, Venkataramanan <Venkataramanan.Kumar@amd.com>;
> > > honza.hubicka@gmail.com; Uros Bizjak <ubizjak@gmail.com>
> > > Subject: RE: [PATCH] [X86_64]: Enable support for next generation AMD
> > > Zen4 CPU
> > >
> > > [Public]
> > >
> > > Hi,
> > >
> > > > BTW: Perhaps znver1.md is not the right filename anymore, since it hosts
> > > all four Zen schedulers.
> > >
> > > I have renamed the file to znver.md in this revision, PFA.
> > > Thank you for the review, we will push it for trunk if we don't get any
> > > further comments.
> >
> > I have pushed the patch on behalf of Tejas.
> 
> This grew insn-automata.cc from 201502 lines to 639968 lines and the build
> of the automata (genautomata) to several minutes in my dev tree.
> 
> You did something wrong.  Please fix!

I think it may make sense to make the initial patch without scheduler
model update with zen3 scheduling.  I can work on updating the model
which needs some benchmarking and setting up the cost tables first.
The problem here is that adding extra variants to execution core model
likely forces too many states.

In general DFA is not best model for such symmetirc and parallel
execution core (since there are way too many combinations individual
pipes may get).  I was thinking of adding an option to generate
alternative model based on bitmasks, but never got around implementing
that.

So with current infrastructure we always need to simplify a bit. Which
is also not big deal since the scheduling is not well documented
anyway and our model is not precise at all (it misses the on-chip
scheduler).

Honza
> 
> Richard.
> 
> > Regards,
> > Venkat.
> >