From: Jeff Law <jeffreyalaw@gmail.com>
To: Philipp Tomsich <philipp.tomsich@vrull.eu>, gcc-patches@gcc.gnu.org
Cc: Palmer Dabbelt <palmer@rivosinc.com>,
Vineet Gupta <vineetg@rivosinc.com>,
Jeff Law <jlaw@ventanamicro.com>,
Kito Cheng <kito.cheng@gmail.com>,
Christoph Muellner <christoph.muellner@vrull.eu>
Subject: Re: [PATCH v2 2/2] RISC-V: Add instruction fusion (for ventana-vt1)
Date: Mon, 14 Nov 2022 09:06:10 -0700 [thread overview]
Message-ID: <ae0e7d10-f5a8-7ca9-72fd-cf99d905b571@gmail.com> (raw)
In-Reply-To: <20221113204824.4062042-3-philipp.tomsich@vrull.eu>
On 11/13/22 13:48, Philipp Tomsich wrote:
> The Ventana VT1 core supports quad-issue and instruction fusion.
> This implemented TARGET_SCHED_MACRO_FUSION_P to keep fusible sequences
> together and adds idiom matcheing for the supported fusion cases.
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.cc (enum riscv_fusion_pairs): Add symbolic
> constants to identify supported fusion patterns.
> (struct riscv_tune_param): Add fusible_op field.
> (riscv_macro_fusion_p): Implement.
> (riscv_fusion_enabled_p): Implement.
> (riscv_macro_fusion_pair_p): Implement and recoginze fusible
> idioms for Ventana VT1.
> (TARGET_SCHED_MACRO_FUSION_P): Point to riscv_macro_fusion_p.
> (TARGET_SCHED_MACRO_FUSION_PAIR_P): Point to riscv_macro_fusion_pair_p.
You know the fusion rules for VT1 better than I... I'm happy to largely
defer to you on this.
I do wonder if going forward hand matching RTL like this is going to be
an unmaintainable mess and whether or not we would be better served
using insn attributes to describe instruction fusion.
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
> ---
>
> Changes in v2:
> - Update fusion patterns and catch some missing idioms/fusion pairs.
>
> gcc/config/riscv/riscv.cc | 219 ++++++++++++++++++++++++++++++++++++++
> 1 file changed, 219 insertions(+)
>
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 31d651f8744..43ba520885c 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
>
> +static bool
> +riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
> +{
> + rtx prev_set = single_set (prev);
> + rtx curr_set = single_set (curr);
> + /* prev and curr are simple SET insns i.e. no flag setting or branching. */
> + bool simple_sets_p = prev_set && curr_set && !any_condjump_p (curr);
> +
> + if (!riscv_macro_fusion_p ())
> + return false;
> +
> + if (simple_sets_p && (riscv_fusion_enabled_p (RISCV_FUSE_ZEXTW) ||
> + riscv_fusion_enabled_p (RISCV_FUSE_ZEXTH)))
Formatting nit. Bring the && down to a new line and if you still need a
line break for the "||", then the "||" should be on a new line as
well. Something like this...
if (simple_sets_p
&& (riscv_fusion_enabled_p (RISCV_FUSE_ZEXTW
|| riscv_fusion_enabled_p (RISCV_FUSE_ZEXTH)))
> + && REGNO (XEXP (SET_SRC (curr_set), 0)) == REGNO(SET_DEST (curr_set))
Space before open paren on this line.
>
> + && (( INTVAL (XEXP (SET_SRC (curr_set), 1)) == 32
> + && riscv_fusion_enabled_p(RISCV_FUSE_ZEXTW) )
> + || ( INTVAL (XEXP (SET_SRC (curr_set), 1)) < 32
> + && riscv_fusion_enabled_p(RISCV_FUSE_ZEXTWS))))
Extraneous spaces after the open parens before INTVALs above.
> + && REGNO (XEXP (SET_SRC (curr_set), 0)) == REGNO(SET_DEST (curr_set))
Missing whitespace before open paren on this line.
OK with the nits fixed.
Jeff
next prev parent reply other threads:[~2022-11-14 16:06 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-13 20:48 [PATCH v2 0/2] Basic support for the Ventana VT1 w/ instruction fusion Philipp Tomsich
2022-11-13 20:48 ` [PATCH v2 1/2] RISC-V: Add basic support for the Ventana-VT1 core Philipp Tomsich
2022-11-14 15:52 ` Jeff Law
2022-11-14 15:57 ` Philipp Tomsich
2022-11-14 18:50 ` Philipp Tomsich
2022-11-13 20:48 ` [PATCH v2 2/2] RISC-V: Add instruction fusion (for ventana-vt1) Philipp Tomsich
2022-11-14 16:06 ` Jeff Law [this message]
2022-11-14 16:11 ` Jakub Jelinek
2022-11-14 18:55 ` Philipp Tomsich
2022-11-14 19:10 ` Jeff Law
2022-11-14 20:00 ` [PATCH v2 0/2] Basic support for the Ventana VT1 w/ instruction fusion Palmer Dabbelt
2022-11-14 20:03 ` Philipp Tomsich
2022-11-14 20:58 ` Palmer Dabbelt
2022-11-14 21:14 ` Philipp Tomsich
2022-11-14 22:47 ` Palmer Dabbelt
2022-11-14 23:00 ` Philipp Tomsich
2022-11-15 7:25 ` Richard Biener
2022-11-15 17:30 ` Palmer Dabbelt
2022-11-14 21:23 ` Jeff Law
2022-11-14 21:28 ` Philipp Tomsich
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ae0e7d10-f5a8-7ca9-72fd-cf99d905b571@gmail.com \
--to=jeffreyalaw@gmail.com \
--cc=christoph.muellner@vrull.eu \
--cc=gcc-patches@gcc.gnu.org \
--cc=jlaw@ventanamicro.com \
--cc=kito.cheng@gmail.com \
--cc=palmer@rivosinc.com \
--cc=philipp.tomsich@vrull.eu \
--cc=vineetg@rivosinc.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).