From: Jeff Law <jeffreyalaw@gmail.com>
To: Sergei Lewis <slewis@rivosinc.com>
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [PATCH v2 2/3] RISC-V: setmem for RISCV with V extension
Date: Wed, 20 Dec 2023 09:02:28 -0700 [thread overview]
Message-ID: <d7d96b79-7462-44f9-8087-bee3899259ed@gmail.com> (raw)
In-Reply-To: <CAE2KcLq-w3NiWmQF123yboshcP7JT2rbFPX6tvcQuQnu7yFDvA@mail.gmail.com>
On 12/20/23 02:48, Sergei Lewis wrote:
> Hi,
>
> This has been tested with the following configurations:
> rv64gcv_zvl128b
> rv64gcv_zvl256b
> rv32imafd_zve32x1p0
> rv32gc_zve64f_zvl128b
>
> I'll drop the constraints and add the testing info to the cover email in
> v3. I'll hold off submitting v3 until gcc-15 as requested.
Adding them to the cover is good. And I think the patches are generally
OK and should go in as soon as we open up the trunk for new development.
I hate having to tell contributors patches have to wait, but we have to
draw a line somewhere. Thanks for your understanding.
jeff
next prev parent reply other threads:[~2023-12-20 16:02 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-19 9:53 [PATCH v2 0/3] RISC-V: vectorised memory operations Sergei Lewis
2023-12-19 9:53 ` [PATCH v2 1/3] RISC-V: movmem for RISCV with V extension Sergei Lewis
2023-12-20 5:28 ` Jeff Law
2023-12-20 9:44 ` Sergei Lewis
2024-05-13 23:36 ` Jeff Law
2023-12-19 9:53 ` [PATCH v2 2/3] RISC-V: setmem " Sergei Lewis
2023-12-20 5:38 ` Jeff Law
2023-12-20 9:48 ` Sergei Lewis
2023-12-20 16:02 ` Jeff Law [this message]
2023-12-19 9:53 ` [PATCH v2 3/3] RISC-V: cmpmem " Sergei Lewis
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