From: Jeff Law <jeffreyalaw@gmail.com>
To: "Christoph Müllner" <christoph.muellner@vrull.eu>
Cc: gcc-patches@gcc.gnu.org, Kito Cheng <kito.cheng@sifive.com>,
Jim Wilson <jim.wilson.gcc@gmail.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Andrew Waterman <andrew@sifive.com>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Cooper Qu <cooper.qu@linux.alibaba.com>,
Lifang Xia <lifang_xia@linux.alibaba.com>,
Yunhai Shang <yunhai@linux.alibaba.com>,
Zhiwei Liu <zhiwei_liu@linux.alibaba.com>
Subject: Re: [PATCH 10/11] riscv: thead: Add support for the XTheadMemIdx ISA extension
Date: Thu, 6 Jul 2023 09:28:40 -0600 [thread overview]
Message-ID: <d95fc95d-37a2-d26e-6b2e-e5682557af51@gmail.com> (raw)
In-Reply-To: <CAEg0e7iTD6Zn6HWxRU6-EBPKMK_9iqqMnV_GGRqJmAzV_7WvmA@mail.gmail.com>
On 7/6/23 00:48, Christoph Müllner wrote:
>
> Thanks for this!
> Of course I was "lucky" and ran into the issue that the patterns did not match,
> because of unexpected MULT insns where ASHIFTs were expected.
> But after reading enough of combiner.cc I understood that this is on purpose
> (for addresses) and I have to adjust my INSNs accordingly.
Yea, it's a wart that the same operation has two different canonical
forms depending on the context where it shows up :( It's definitely a wart.
>
> I've changed the patches for XTheadMemIdx and XTheadFMemIdx and will
> send out a new series.
Sounds good.
Jeff
prev parent reply other threads:[~2023-07-06 15:28 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-28 6:23 Christoph Muellner
2023-04-28 6:23 ` [PATCH 11/11] riscv: thead: Add support for the XTheadFMemIdx " Christoph Muellner
2023-06-10 17:54 ` Jeff Law
2023-06-28 12:39 ` Christoph Müllner
2023-06-10 17:53 ` [PATCH 10/11] riscv: thead: Add support for the XTheadMemIdx " Jeff Law
2023-06-28 12:39 ` Christoph Müllner
2023-06-28 18:23 ` Jeff Law
2023-06-29 7:39 ` Christoph Müllner
2023-06-29 14:09 ` Jeff Law
2023-07-06 6:48 ` Christoph Müllner
2023-07-06 15:28 ` Jeff Law [this message]
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