[PATCH] RISC-V: Fixbug for fsflags instruction error using immediate.

[PATCH] RISC-V: Fixbug for fsflags instruction error using immediate.

[Jin Ma]

The pattern mistakenly believes that fsflags can use immediate numbers,
but in fact it does not support it. Immediate numbers should use fsflagsi.

For example:
__builtin_riscv_fsflags(4);

The following error occurred:
/tmp/ccoWdWqT.s: Assembler messages:
/tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4'

gcc/ChangeLog:

	* config/riscv/riscv.md: Likewise.
---
 gcc/config/riscv/riscv.md | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 4615e811947..1ec85e30d7e 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr"
   "frcsr\t%0")
 
 (define_insn "riscv_fscsr"
-  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
+  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
   "fscsr\t%0")
 
@@ -3085,9 +3085,11 @@ (define_insn "riscv_frflags"
   "frflags\t%0")
 
 (define_insn "riscv_fsflags"
-  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSFLAGS)]
+  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r,K")] UNSPECV_FSFLAGS)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
-  "fsflags\t%0")
+  "@
+   fsflags\t%0
+   fsflagsi\t%0")
 
 (define_insn "*riscv_fsnvsnan<mode>2"
   [(unspec_volatile [(match_operand:ANYF 0 "register_operand" "f")
-- 
2.17.1

Re: [PATCH] RISC-V: Fixbug for fsflags instruction error using immediate.

[Robin Dapp]

Hi Jin,

this looks reasonable.  Would you mind adding (small) test cases
still to make sure we don't accidentally reintroduce the problem?

Regards
 Robin

[PATCH v2] RISC-V: Fixbug for fsflags instruction error using immediate.

[Jin Ma]

The pattern mistakenly believes that fsflags can use immediate numbers,
but in fact it does not support it. Immediate numbers should use fsflagsi.

For example:
__builtin_riscv_fsflags(4);

The following error occurred.
/tmp/ccoWdWqT.s: Assembler messages:
/tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4'

gcc/ChangeLog:

	* config/riscv/riscv.md: Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/fsflags.c: New test.
---
 gcc/config/riscv/riscv.md                |  8 +++++---
 gcc/testsuite/gcc.target/riscv/fsflags.c | 16 ++++++++++++++++
 2 files changed, 21 insertions(+), 3 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/fsflags.c

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 4615e811947..1ec85e30d7e 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr"
   "frcsr\t%0")
 
 (define_insn "riscv_fscsr"
-  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
+  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
   "fscsr\t%0")
 
@@ -3085,9 +3085,11 @@ (define_insn "riscv_frflags"
   "frflags\t%0")
 
 (define_insn "riscv_fsflags"
-  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSFLAGS)]
+  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r,K")] UNSPECV_FSFLAGS)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
-  "fsflags\t%0")
+  "@
+   fsflags\t%0
+   fsflagsi\t%0")
 
 (define_insn "*riscv_fsnvsnan<mode>2"
   [(unspec_volatile [(match_operand:ANYF 0 "register_operand" "f")
diff --git a/gcc/testsuite/gcc.target/riscv/fsflags.c b/gcc/testsuite/gcc.target/riscv/fsflags.c
new file mode 100644
index 00000000000..74a97b8a7c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/fsflags.c
@@ -0,0 +1,16 @@
+/* Verify that fsflags is using the correct register or immediate.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target hard_float } */
+/* { dg-options "-O" } */
+
+void foo1 (int a)
+{
+   __builtin_riscv_fsflags(a);
+}
+void foo2 ()
+{
+   __builtin_riscv_fsflags(4);
+}
+
+/* { dg-final { scan-assembler-times "fsflags\t" 1 } } */
+/* { dg-final { scan-assembler-times "fsflagsi\t" 1 } } */
-- 
2.17.1

Re: [PATCH] RISC-V: Fixbug for fsflags instruction error using immediate.

[Jin Ma]

> Hi Jin,
> 
> this looks reasonable.  Would you mind adding (small) test cases
> still to make sure we don't accidentally reintroduce the problem?
> 
> Regards
>  Robin

Ok, I have already sent the v2 version, please review it again, thanks.

Link:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/625390.html

Re: [PATCH v2] RISC-V: Fixbug for fsflags instruction error using immediate.

[Kito Cheng]

[-- Attachment #1: Type: text/plain, Size: 2669 bytes --]

Jin Ma via Gcc-patches <gcc-patches@gcc.gnu.org> 於 2023年7月25日 週二 15:29 寫道：

> The pattern mistakenly believes that fsflags can use immediate numbers,
> but in fact it does not support it. Immediate numbers should use fsflagsi.
>
> For example:
> __builtin_riscv_fsflags(4);
>
> The following error occurred.
> /tmp/ccoWdWqT.s: Assembler messages:
> /tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4'
>
> gcc/ChangeLog:
>
>         * config/riscv/riscv.md: Likewise.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/riscv/fsflags.c: New test.
> ---
>  gcc/config/riscv/riscv.md                |  8 +++++---
>  gcc/testsuite/gcc.target/riscv/fsflags.c | 16 ++++++++++++++++
>  2 files changed, 21 insertions(+), 3 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fsflags.c
>
> diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
> index 4615e811947..1ec85e30d7e 100644
> --- a/gcc/config/riscv/riscv.md
> +++ b/gcc/config/riscv/riscv.md
> @@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr"
>    "frcsr\t%0")
>
>  (define_insn "riscv_fscsr"
> -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")]
> UNSPECV_FSCSR)]
> +  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")]
> UNSPECV_FSCSR)]
>    "TARGET_HARD_FLOAT || TARGET_ZFINX"
>    "fscsr\t%0")
>
> @@ -3085,9 +3085,11 @@ (define_insn "riscv_frflags"
>    "frflags\t%0")
>
>  (define_insn "riscv_fsflags"
> -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")]
> UNSPECV_FSFLAGS)]
> +  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r,K")]
> UNSPECV_FSFLAGS)]
>    "TARGET_HARD_FLOAT || TARGET_ZFINX"
> -  "fsflags\t%0")
> +  "@
> +   fsflags\t%0
> +   fsflagsi\t%0")
>

You can be use fsflags%i0, you can reference addsi pattern.


>  (define_insn "*riscv_fsnvsnan<mode>2"
>    [(unspec_volatile [(match_operand:ANYF 0 "register_operand" "f")
> diff --git a/gcc/testsuite/gcc.target/riscv/fsflags.c
> b/gcc/testsuite/gcc.target/riscv/fsflags.c
> new file mode 100644
> index 00000000000..74a97b8a7c7
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/riscv/fsflags.c
> @@ -0,0 +1,16 @@
> +/* Verify that fsflags is using the correct register or immediate.  */
> +/* { dg-do compile } */
> +/* { dg-require-effective-target hard_float } */
> +/* { dg-options "-O" } */
> +
> +void foo1 (int a)
> +{
> +   __builtin_riscv_fsflags(a);
> +}
> +void foo2 ()
> +{
> +   __builtin_riscv_fsflags(4);
> +}
> +
> +/* { dg-final { scan-assembler-times "fsflags\t" 1 } } */
> +/* { dg-final { scan-assembler-times "fsflagsi\t" 1 } } */
> --
> 2.17.1
>
>

[PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.

[Jin Ma]

The pattern mistakenly believes that fsflags can use immediate numbers,
but in fact it does not support it. Immediate numbers should use fsflagsi.

For example:
__builtin_riscv_fsflags(4);

The following error occurred.
/tmp/ccoWdWqT.s: Assembler messages:
/tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4'

gcc/ChangeLog:

	* config/riscv/riscv.md: Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/fsflags.c: New test.
---
 gcc/config/riscv/riscv.md                |  4 ++--
 gcc/testsuite/gcc.target/riscv/fsflags.c | 16 ++++++++++++++++
 2 files changed, 18 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/fsflags.c

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 4615e811947..74ff9ccc968 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr"
   "frcsr\t%0")
 
 (define_insn "riscv_fscsr"
-  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
+  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
   "fscsr\t%0")
 
@@ -3087,7 +3087,7 @@ (define_insn "riscv_frflags"
 (define_insn "riscv_fsflags"
   [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSFLAGS)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
-  "fsflags\t%0")
+  "fsflags%i0\t%0")
 
 (define_insn "*riscv_fsnvsnan<mode>2"
   [(unspec_volatile [(match_operand:ANYF 0 "register_operand" "f")
diff --git a/gcc/testsuite/gcc.target/riscv/fsflags.c b/gcc/testsuite/gcc.target/riscv/fsflags.c
new file mode 100644
index 00000000000..74a97b8a7c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/fsflags.c
@@ -0,0 +1,16 @@
+/* Verify that fsflags is using the correct register or immediate.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target hard_float } */
+/* { dg-options "-O" } */
+
+void foo1 (int a)
+{
+   __builtin_riscv_fsflags(a);
+}
+void foo2 ()
+{
+   __builtin_riscv_fsflags(4);
+}
+
+/* { dg-final { scan-assembler-times "fsflags\t" 1 } } */
+/* { dg-final { scan-assembler-times "fsflagsi\t" 1 } } */
-- 
2.17.1

Re: [PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.

[juzhe.zhong]

[-- Attachment #1: Type: text/plain, Size: 2783 bytes --]

-  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
+  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]

If you don't allow immediate value in range 0 ~ 31, it should be "register_operand" instead of "csr_operand".



juzhe.zhong@rivai.ai
 
From: Jin Ma
Date: 2023-07-26 10:17
To: gcc-patches
CC: jeffreyalaw; palmer; richard.sandiford; kito.cheng; philipp.tomsich; christoph.muellner; rdapp.gcc; juzhe.zhong; jinma.contrib; Jin Ma
Subject: [PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.
The pattern mistakenly believes that fsflags can use immediate numbers,
but in fact it does not support it. Immediate numbers should use fsflagsi.
 
For example:
__builtin_riscv_fsflags(4);
 
The following error occurred.
/tmp/ccoWdWqT.s: Assembler messages:
/tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4'
 
gcc/ChangeLog:
 
* config/riscv/riscv.md: Likewise.
 
gcc/testsuite/ChangeLog:
 
* gcc.target/riscv/fsflags.c: New test.
---
gcc/config/riscv/riscv.md                |  4 ++--
gcc/testsuite/gcc.target/riscv/fsflags.c | 16 ++++++++++++++++
2 files changed, 18 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/fsflags.c
 
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 4615e811947..74ff9ccc968 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr"
   "frcsr\t%0")
(define_insn "riscv_fscsr"
-  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
+  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
   "fscsr\t%0")
@@ -3087,7 +3087,7 @@ (define_insn "riscv_frflags"
(define_insn "riscv_fsflags"
   [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSFLAGS)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
-  "fsflags\t%0")
+  "fsflags%i0\t%0")
(define_insn "*riscv_fsnvsnan<mode>2"
   [(unspec_volatile [(match_operand:ANYF 0 "register_operand" "f")
diff --git a/gcc/testsuite/gcc.target/riscv/fsflags.c b/gcc/testsuite/gcc.target/riscv/fsflags.c
new file mode 100644
index 00000000000..74a97b8a7c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/fsflags.c
@@ -0,0 +1,16 @@
+/* Verify that fsflags is using the correct register or immediate.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target hard_float } */
+/* { dg-options "-O" } */
+
+void foo1 (int a)
+{
+   __builtin_riscv_fsflags(a);
+}
+void foo2 ()
+{
+   __builtin_riscv_fsflags(4);
+}
+
+/* { dg-final { scan-assembler-times "fsflags\t" 1 } } */
+/* { dg-final { scan-assembler-times "fsflagsi\t" 1 } } */
-- 
2.17.1
 
 

Re: [PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.

[Jin Ma]

> -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> +  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
> 
> If you don't allow immediate value in range 0 ~ 31, it should be "register_operand" instead of "csr_operand".
> 
> 

I think directives that support the immediate pattern might be better, on the one
hand fsflagsi are supported in the manual, on the other hand fsflagsi can be
slightly faster than fsflags.

Regards
Jin

> 
> juzhe.zhong@rivai.ai
>

Re: Re: [PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.

[juzhe.zhong]

[-- Attachment #1: Type: text/plain, Size: 1214 bytes --]

I don't understand:
 (define_insn "riscv_fscsr"
-  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
+  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
   "fscsr\t%0")

This pattern never allows immediate in the constraint. Why still make predicate allow immediate?
 



juzhe.zhong@rivai.ai
 
From: Jin Ma
Date: 2023-07-26 11:33
To: gcc-patches; juzhe.zhong@rivai.ai
CC: jeffreyalaw; palmer; richard.sandiford; kito.cheng; philipp.tomsich; christoph.muellner; Robin Dapp; jinma.contrib
Subject: Re: [PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.
> -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> +  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
> 
> If you don't allow immediate value in range 0 ~ 31, it should be "register_operand" instead of "csr_operand".
> 
> 
 
I think directives that support the immediate pattern might be better, on the one
hand fsflagsi are supported in the manual, on the other hand fsflagsi can be
slightly faster than fsflags.
 
Regards
Jin
 
> 
> juzhe.zhong@rivai.ai
>

Re: Re: [PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.

[Kito Cheng]

So I guess you should change `fscsr` to `fscsr%i0` instead of dropping
K from the constraint list?

On Wed, Jul 26, 2023 at 11:42 AM juzhe.zhong@rivai.ai
<juzhe.zhong@rivai.ai> wrote:
>
> I don't understand:
>  (define_insn "riscv_fscsr"
> -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> +  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
>    "TARGET_HARD_FLOAT || TARGET_ZFINX"
>    "fscsr\t%0")
>
> This pattern never allows immediate in the constraint. Why still make predicate allow immediate?
>
>
>
>
> juzhe.zhong@rivai.ai
>
> From: Jin Ma
> Date: 2023-07-26 11:33
> To: gcc-patches; juzhe.zhong@rivai.ai
> CC: jeffreyalaw; palmer; richard.sandiford; kito.cheng; philipp.tomsich; christoph.muellner; Robin Dapp; jinma.contrib
> Subject: Re: [PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.
> > -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> > +  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
> >
> > If you don't allow immediate value in range 0 ~ 31, it should be "register_operand" instead of "csr_operand".
> >
> >
>
> I think directives that support the immediate pattern might be better, on the one
> hand fsflagsi are supported in the manual, on the other hand fsflagsi can be
> slightly faster than fsflags.
>
> Regards
> Jin
>
> >
> > juzhe.zhong@rivai.ai
> >

Re: Re: [PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.

[juzhe.zhong]

[-- Attachment #1: Type: text/plain, Size: 2096 bytes --]

Yes. I agree.

I didn't take a look into SPEC. Not sure whether fcsr has immediate form.

I mean this patch change in 'fcsr' is quite confusing.

You should either fix the assembly code-gen if fcsr has immediate form,

or fix predicate and constraint both (should not fix constraint only).

Thanks.


juzhe.zhong@rivai.ai
 
From: Kito Cheng
Date: 2023-07-26 11:45
To: juzhe.zhong@rivai.ai
CC: jinma; gcc-patches; jeffreyalaw; palmer; richard.sandiford; philipp.tomsich; christoph.muellner; Robin Dapp; jinma.contrib
Subject: Re: Re: [PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.
So I guess you should change `fscsr` to `fscsr%i0` instead of dropping
K from the constraint list?
 
On Wed, Jul 26, 2023 at 11:42 AM juzhe.zhong@rivai.ai
<juzhe.zhong@rivai.ai> wrote:
>
> I don't understand:
>  (define_insn "riscv_fscsr"
> -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> +  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
>    "TARGET_HARD_FLOAT || TARGET_ZFINX"
>    "fscsr\t%0")
>
> This pattern never allows immediate in the constraint. Why still make predicate allow immediate?
>
>
>
>
> juzhe.zhong@rivai.ai
>
> From: Jin Ma
> Date: 2023-07-26 11:33
> To: gcc-patches; juzhe.zhong@rivai.ai
> CC: jeffreyalaw; palmer; richard.sandiford; kito.cheng; philipp.tomsich; christoph.muellner; Robin Dapp; jinma.contrib
> Subject: Re: [PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.
> > -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> > +  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
> >
> > If you don't allow immediate value in range 0 ~ 31, it should be "register_operand" instead of "csr_operand".
> >
> >
>
> I think directives that support the immediate pattern might be better, on the one
> hand fsflagsi are supported in the manual, on the other hand fsflagsi can be
> slightly faster than fsflags.
>
> Regards
> Jin
>
> >
> > juzhe.zhong@rivai.ai
> >
 

Re: Re: [PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.

[Jin Ma]

> So I guess you should change `fscsr` to `fscsr%i0` instead of dropping
> K from the constraint list?
> 
Sorry, you are right. I thought you were talking about fsflags, 
but I didn't notice it was fscsr. I'll correct it right away.
> On Wed, Jul 26, 2023 at 11:42 AM juzhe.zhong@rivai.ai
> <juzhe.zhong@rivai.ai> wrote:
> >
> > I don't understand:
> >  (define_insn "riscv_fscsr"
> > -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> > +  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
> >    "TARGET_HARD_FLOAT || TARGET_ZFINX"
> >    "fscsr\t%0")
> >
> > This pattern never allows immediate in the constraint. Why still make predicate allow immediate?
> >
> >
> >
> >
> > juzhe.zhong@rivai.ai
> >
> > From: Jin Ma
> > Date: 2023-07-26 11:33
> > To: gcc-patches; juzhe.zhong@rivai.ai
> > CC: jeffreyalaw; palmer; richard.sandiford; kito.cheng; philipp.tomsich; christoph.muellner; Robin Dapp; jinma.contrib
> > Subject: Re: [PATCH v3] RISC-V: Fixbug for fsflags instruction error using immediate.
> > > -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> > > +  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "r")] UNSPECV_FSCSR)]
> > >
> > > If you don't allow immediate value in range 0 ~ 31, it should be "register_operand" instead of "csr_operand".
> > >
> > >
> >
> > I think directives that support the immediate pattern might be better, on the one
> > hand fsflagsi are supported in the manual, on the other hand fsflagsi can be
> > slightly faster than fsflags.
> >
> > Regards
> > Jin
> >
> > >
> > > juzhe.zhong@rivai.ai
> > >

[PATCH v4] RISC-V: Fixbug for fsflags instruction error using immediate.

[Jin Ma]

The pattern mistakenly believes that fsflags can use immediate numbers,
but in fact it does not support it. Immediate numbers should use fsflagsi.

For example:
__builtin_riscv_fsflags(4);

The following error occurred.
/tmp/ccoWdWqT.s: Assembler messages:
/tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4'

gcc/ChangeLog:

	* config/riscv/riscv.md: Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/fsflags.c: New test.
---
 gcc/config/riscv/riscv.md                |  4 ++--
 gcc/testsuite/gcc.target/riscv/fsflags.c | 16 ++++++++++++++++
 2 files changed, 18 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/fsflags.c

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 4615e811947..24515bcf706 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr"
   "frcsr\t%0")
 
 (define_insn "riscv_fscsr"
-  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
+  [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] UNSPECV_FSCSR)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
   "fscsr\t%0")
 
@@ -3087,7 +3087,7 @@ (define_insn "riscv_frflags"
 (define_insn "riscv_fsflags"
   [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSFLAGS)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
-  "fsflags\t%0")
+  "fsflags%i0\t%0")
 
 (define_insn "*riscv_fsnvsnan<mode>2"
   [(unspec_volatile [(match_operand:ANYF 0 "register_operand" "f")
diff --git a/gcc/testsuite/gcc.target/riscv/fsflags.c b/gcc/testsuite/gcc.target/riscv/fsflags.c
new file mode 100644
index 00000000000..74a97b8a7c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/fsflags.c
@@ -0,0 +1,16 @@
+/* Verify that fsflags is using the correct register or immediate.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target hard_float } */
+/* { dg-options "-O" } */
+
+void foo1 (int a)
+{
+   __builtin_riscv_fsflags(a);
+}
+void foo2 ()
+{
+   __builtin_riscv_fsflags(4);
+}
+
+/* { dg-final { scan-assembler-times "fsflags\t" 1 } } */
+/* { dg-final { scan-assembler-times "fsflagsi\t" 1 } } */
-- 
2.17.1

Re: [PATCH v4] RISC-V: Fixbug for fsflags instruction error using immediate.

[juzhe.zhong]

[-- Attachment #1: Type: text/plain, Size: 2545 bytes --]

LGTM. 
Thanks for fixing it.


juzhe.zhong@rivai.ai
 
From: Jin Ma
Date: 2023-07-26 13:41
To: gcc-patches
CC: jeffreyalaw; palmer; richard.sandiford; kito.cheng; philipp.tomsich; christoph.muellner; rdapp.gcc; juzhe.zhong; jinma.contrib; Jin Ma
Subject: [PATCH v4] RISC-V: Fixbug for fsflags instruction error using immediate.
The pattern mistakenly believes that fsflags can use immediate numbers,
but in fact it does not support it. Immediate numbers should use fsflagsi.
 
For example:
__builtin_riscv_fsflags(4);
 
The following error occurred.
/tmp/ccoWdWqT.s: Assembler messages:
/tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4'
 
gcc/ChangeLog:
 
* config/riscv/riscv.md: Likewise.
 
gcc/testsuite/ChangeLog:
 
* gcc.target/riscv/fsflags.c: New test.
---
gcc/config/riscv/riscv.md                |  4 ++--
gcc/testsuite/gcc.target/riscv/fsflags.c | 16 ++++++++++++++++
2 files changed, 18 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/fsflags.c
 
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 4615e811947..24515bcf706 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr"
   "frcsr\t%0")
(define_insn "riscv_fscsr"
-  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
+  [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] UNSPECV_FSCSR)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
   "fscsr\t%0")
@@ -3087,7 +3087,7 @@ (define_insn "riscv_frflags"
(define_insn "riscv_fsflags"
   [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSFLAGS)]
   "TARGET_HARD_FLOAT || TARGET_ZFINX"
-  "fsflags\t%0")
+  "fsflags%i0\t%0")
(define_insn "*riscv_fsnvsnan<mode>2"
   [(unspec_volatile [(match_operand:ANYF 0 "register_operand" "f")
diff --git a/gcc/testsuite/gcc.target/riscv/fsflags.c b/gcc/testsuite/gcc.target/riscv/fsflags.c
new file mode 100644
index 00000000000..74a97b8a7c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/fsflags.c
@@ -0,0 +1,16 @@
+/* Verify that fsflags is using the correct register or immediate.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target hard_float } */
+/* { dg-options "-O" } */
+
+void foo1 (int a)
+{
+   __builtin_riscv_fsflags(a);
+}
+void foo2 ()
+{
+   __builtin_riscv_fsflags(4);
+}
+
+/* { dg-final { scan-assembler-times "fsflags\t" 1 } } */
+/* { dg-final { scan-assembler-times "fsflagsi\t" 1 } } */
-- 
2.17.1
 
 

Re: [PATCH v4] RISC-V: Fixbug for fsflags instruction error using immediate.

[Kito Cheng]

On Wed, Jul 26, 2023 at 1:41 PM Jin Ma via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> The pattern mistakenly believes that fsflags can use immediate numbers,
> but in fact it does not support it. Immediate numbers should use fsflagsi.
>
> For example:
> __builtin_riscv_fsflags(4);
>
> The following error occurred.
> /tmp/ccoWdWqT.s: Assembler messages:
> /tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4'
>
> gcc/ChangeLog:
>
>         * config/riscv/riscv.md: Likewise.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/riscv/fsflags.c: New test.
> ---
>  gcc/config/riscv/riscv.md                |  4 ++--
>  gcc/testsuite/gcc.target/riscv/fsflags.c | 16 ++++++++++++++++
>  2 files changed, 18 insertions(+), 2 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fsflags.c
>
> diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
> index 4615e811947..24515bcf706 100644
> --- a/gcc/config/riscv/riscv.md
> +++ b/gcc/config/riscv/riscv.md
> @@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr"
>    "frcsr\t%0")
>
>  (define_insn "riscv_fscsr"
> -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> +  [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] UNSPECV_FSCSR)]
>    "TARGET_HARD_FLOAT || TARGET_ZFINX"
>    "fscsr\t%0")

Wait, this patch still drops K?

Re: Re: [PATCH v4] RISC-V: Fixbug for fsflags instruction error using immediate.

[juzhe.zhong]

[-- Attachment #1: Type: text/plain, Size: 1919 bytes --]

I just checked SPEC:

fscsr rd, rs csrrw rd, fcsr, rs 
Swap FP control/status register 
fscsr rs csrrw x0, fcsr, rs 
Write FP control/status register 

It seems that fscsr doesn't have immediate form? I am not sure.


juzhe.zhong@rivai.ai
 
From: Kito Cheng
Date: 2023-07-26 15:07
To: Jin Ma
CC: gcc-patches; jeffreyalaw; palmer; richard.sandiford; philipp.tomsich; christoph.muellner; rdapp.gcc; juzhe.zhong; jinma.contrib
Subject: Re: [PATCH v4] RISC-V: Fixbug for fsflags instruction error using immediate.
On Wed, Jul 26, 2023 at 1:41 PM Jin Ma via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> The pattern mistakenly believes that fsflags can use immediate numbers,
> but in fact it does not support it. Immediate numbers should use fsflagsi.
>
> For example:
> __builtin_riscv_fsflags(4);
>
> The following error occurred.
> /tmp/ccoWdWqT.s: Assembler messages:
> /tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4'
>
> gcc/ChangeLog:
>
>         * config/riscv/riscv.md: Likewise.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/riscv/fsflags.c: New test.
> ---
>  gcc/config/riscv/riscv.md                |  4 ++--
>  gcc/testsuite/gcc.target/riscv/fsflags.c | 16 ++++++++++++++++
>  2 files changed, 18 insertions(+), 2 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fsflags.c
>
> diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
> index 4615e811947..24515bcf706 100644
> --- a/gcc/config/riscv/riscv.md
> +++ b/gcc/config/riscv/riscv.md
> @@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr"
>    "frcsr\t%0")
>
>  (define_insn "riscv_fscsr"
> -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> +  [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] UNSPECV_FSCSR)]
>    "TARGET_HARD_FLOAT || TARGET_ZFINX"
>    "fscsr\t%0")
 
Wait, this patch still drops K?
 

Re: Re: [PATCH v4] RISC-V: Fixbug for fsflags instruction error using immediate.

[Kito Cheng]

Oh, yeah, my bad, there is no fscsri, gonna test and push :)

On Wed, Jul 26, 2023 at 3:20 PM juzhe.zhong@rivai.ai
<juzhe.zhong@rivai.ai> wrote:
>
> I just checked SPEC:
>
> fscsr rd, rs csrrw rd, fcsr, rs
> Swap FP control/status register
> fscsr rs csrrw x0, fcsr, rs
> Write FP control/status register
>
> It seems that fscsr doesn't have immediate form? I am not sure.
>
>
> juzhe.zhong@rivai.ai
>
> From: Kito Cheng
> Date: 2023-07-26 15:07
> To: Jin Ma
> CC: gcc-patches; jeffreyalaw; palmer; richard.sandiford; philipp.tomsich; christoph.muellner; rdapp.gcc; juzhe.zhong; jinma.contrib
> Subject: Re: [PATCH v4] RISC-V: Fixbug for fsflags instruction error using immediate.
> On Wed, Jul 26, 2023 at 1:41 PM Jin Ma via Gcc-patches
> <gcc-patches@gcc.gnu.org> wrote:
> >
> > The pattern mistakenly believes that fsflags can use immediate numbers,
> > but in fact it does not support it. Immediate numbers should use fsflagsi.
> >
> > For example:
> > __builtin_riscv_fsflags(4);
> >
> > The following error occurred.
> > /tmp/ccoWdWqT.s: Assembler messages:
> > /tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4'
> >
> > gcc/ChangeLog:
> >
> >         * config/riscv/riscv.md: Likewise.
> >
> > gcc/testsuite/ChangeLog:
> >
> >         * gcc.target/riscv/fsflags.c: New test.
> > ---
> >  gcc/config/riscv/riscv.md                |  4 ++--
> >  gcc/testsuite/gcc.target/riscv/fsflags.c | 16 ++++++++++++++++
> >  2 files changed, 18 insertions(+), 2 deletions(-)
> >  create mode 100644 gcc/testsuite/gcc.target/riscv/fsflags.c
> >
> > diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
> > index 4615e811947..24515bcf706 100644
> > --- a/gcc/config/riscv/riscv.md
> > +++ b/gcc/config/riscv/riscv.md
> > @@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr"
> >    "frcsr\t%0")
> >
> >  (define_insn "riscv_fscsr"
> > -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> > +  [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] UNSPECV_FSCSR)]
> >    "TARGET_HARD_FLOAT || TARGET_ZFINX"
> >    "fscsr\t%0")
>
> Wait, this patch still drops K?
>

Re: Re: [PATCH v4] RISC-V: Fixbug for fsflags instruction error using immediate.

[Kito Cheng]

commit, thanks :)

On Wed, Jul 26, 2023 at 3:39 PM Kito Cheng <kito.cheng@gmail.com> wrote:
>
> Oh, yeah, my bad, there is no fscsri, gonna test and push :)
>
> On Wed, Jul 26, 2023 at 3:20 PM juzhe.zhong@rivai.ai
> <juzhe.zhong@rivai.ai> wrote:
> >
> > I just checked SPEC:
> >
> > fscsr rd, rs csrrw rd, fcsr, rs
> > Swap FP control/status register
> > fscsr rs csrrw x0, fcsr, rs
> > Write FP control/status register
> >
> > It seems that fscsr doesn't have immediate form? I am not sure.
> >
> >
> > juzhe.zhong@rivai.ai
> >
> > From: Kito Cheng
> > Date: 2023-07-26 15:07
> > To: Jin Ma
> > CC: gcc-patches; jeffreyalaw; palmer; richard.sandiford; philipp.tomsich; christoph.muellner; rdapp.gcc; juzhe.zhong; jinma.contrib
> > Subject: Re: [PATCH v4] RISC-V: Fixbug for fsflags instruction error using immediate.
> > On Wed, Jul 26, 2023 at 1:41 PM Jin Ma via Gcc-patches
> > <gcc-patches@gcc.gnu.org> wrote:
> > >
> > > The pattern mistakenly believes that fsflags can use immediate numbers,
> > > but in fact it does not support it. Immediate numbers should use fsflagsi.
> > >
> > > For example:
> > > __builtin_riscv_fsflags(4);
> > >
> > > The following error occurred.
> > > /tmp/ccoWdWqT.s: Assembler messages:
> > > /tmp/ccoWdWqT.s:14: Error: illegal operands `fsflags 4'
> > >
> > > gcc/ChangeLog:
> > >
> > >         * config/riscv/riscv.md: Likewise.
> > >
> > > gcc/testsuite/ChangeLog:
> > >
> > >         * gcc.target/riscv/fsflags.c: New test.
> > > ---
> > >  gcc/config/riscv/riscv.md                |  4 ++--
> > >  gcc/testsuite/gcc.target/riscv/fsflags.c | 16 ++++++++++++++++
> > >  2 files changed, 18 insertions(+), 2 deletions(-)
> > >  create mode 100644 gcc/testsuite/gcc.target/riscv/fsflags.c
> > >
> > > diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
> > > index 4615e811947..24515bcf706 100644
> > > --- a/gcc/config/riscv/riscv.md
> > > +++ b/gcc/config/riscv/riscv.md
> > > @@ -3074,7 +3074,7 @@ (define_insn "riscv_frcsr"
> > >    "frcsr\t%0")
> > >
> > >  (define_insn "riscv_fscsr"
> > > -  [(unspec_volatile [(match_operand:SI 0 "csr_operand" "rK")] UNSPECV_FSCSR)]
> > > +  [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] UNSPECV_FSCSR)]
> > >    "TARGET_HARD_FLOAT || TARGET_ZFINX"
> > >    "fscsr\t%0")
> >
> > Wait, this patch still drops K?
> >