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From: Robin Dapp <rdapp.gcc@gmail.com>
To: "Li, Pan2" <pan2.li@intel.com>, Jeff Law <jeffreyalaw@gmail.com>,
	"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: rdapp.gcc@gmail.com,
	"juzhe.zhong@rivai.ai" <juzhe.zhong@rivai.ai>,
	"kito.cheng@gmail.com" <kito.cheng@gmail.com>,
	"richard.guenther@gmail.com" <richard.guenther@gmail.com>,
	"Wang, Yanzhang" <yanzhang.wang@intel.com>,
	"Liu, Hongtao" <hongtao.liu@intel.com>
Subject: Re: [PATCH v2] DSE: Bugfix ICE after allow vector type in get_stored_val
Date: Thu, 29 Feb 2024 14:28:56 +0100	[thread overview]
Message-ID: <e9d298a1-8f83-47df-90ae-3c5497ab64f7@gmail.com> (raw)
In-Reply-To: <MW5PR11MB59085A54CC6DFF9B8FBC27C2A95F2@MW5PR11MB5908.namprd11.prod.outlook.com>

On 2/29/24 02:38, Li, Pan2 wrote:
>> So it's going to check if V2SF can be tied to DI and V4QI with SI.  I 
>> suspect those are going to fail for RISC-V as those aren't tieable.
> 
> Yes, you are right. Different REG_CLASS are not allowed to be tieable in RISC-V.
> 
> static bool
> riscv_modes_tieable_p (machine_mode mode1, machine_mode mode2)
> {
>   /* We don't allow different REG_CLASS modes tieable since it
>      will cause ICE in register allocation (RA).
>      E.g. V2SI and DI are not tieable.  */
>   if (riscv_v_ext_mode_p (mode1) != riscv_v_ext_mode_p (mode2))
>     return false;
>   return (mode1 == mode2
>           || !(GET_MODE_CLASS (mode1) == MODE_FLOAT
>                && GET_MODE_CLASS (mode2) == MODE_FLOAT));
> }

Yes, but what we set tieable is e.g. V4QI and V2SF.

I suggested a target band-aid before:

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 799d7919a4a..982ca1a4250 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -8208,6 +8208,11 @@ riscv_modes_tieable_p (machine_mode mode1, machine_mode mode2)
      E.g. V2SI and DI are not tieable.  */
   if (riscv_v_ext_mode_p (mode1) != riscv_v_ext_mode_p (mode2))
     return false;
+  if (GET_MODE_CLASS (GET_MODE_INNER (mode1)) == MODE_INT
+      && GET_MODE_CLASS (GET_MODE_INNER (mode2)) == MODE_FLOAT
+      && GET_MODE_SIZE (GET_MODE_INNER (mode1))
+                       != GET_MODE_SIZE (GET_MODE_INNER (mode2)))
+    return false;
   return (mode1 == mode2
          || !(GET_MODE_CLASS (mode1) == MODE_FLOAT
               && GET_MODE_CLASS (mode2) == MODE_FLOAT));

but I don't like that as it just works around something
that I didn't even understand fully...

Regards
 Robin


  reply	other threads:[~2024-02-29 13:28 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-26  3:25 [PATCH v1] RTL: Bugfix ICE after allow vector type in DSE pan2.li
2024-02-26  3:41 ` Hongtao Liu
2024-02-26  3:42   ` Li, Pan2
2024-02-26  5:13     ` Hongtao Liu
2024-02-26  7:38 ` Richard Biener
2024-02-26  7:41   ` Li, Pan2
2024-02-26 14:22 ` [PATCH v2] DSE: Bugfix ICE after allow vector type in get_stored_val pan2.li
2024-02-27  9:47   ` Richard Biener
2024-02-27 15:02   ` Jeff Law
2024-02-28  1:40     ` Li, Pan2
2024-02-28  4:51       ` Li, Pan2
2024-02-28 17:33         ` Jeff Law
2024-02-29  1:38           ` Li, Pan2
2024-02-29 13:28             ` Robin Dapp [this message]
2024-03-02  1:04               ` Li, Pan2
2024-03-03 22:46               ` Jeff Law
2024-03-05  6:22                 ` Li, Pan2
2024-03-12  2:08                   ` Li, Pan2
2024-03-22  1:15                     ` Li, Pan2
2024-03-22 18:53                   ` Jeff Law
2024-03-23  5:45                     ` Li, Pan2
2024-04-06 12:02                       ` Li, Pan2
2024-04-18  1:46                         ` Li, Pan2
2024-04-28 12:10                           ` Li, Pan2
2024-04-29 15:20                       ` Jeff Law
2024-04-30  1:02                         ` Li, Pan2
2024-04-30  7:17 ` [PATCH v3] DSE: Fix " pan2.li
2024-04-30 11:35   ` Li, Pan2
2024-05-03  1:57     ` Li, Pan2
2024-05-03  1:51 ` [PATCH v4] " pan2.li
2024-05-16  4:06   ` Li, Pan2
2024-05-19 16:23   ` Jeff Law
2024-05-20  1:08     ` Li, Pan2

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