* [PATCH] RISC-V: Fix rvv intrinsic pragma tests dejagnu selector
@ 2024-01-29 19:38 Edwin Lu
2024-01-30 17:51 ` Palmer Dabbelt
0 siblings, 1 reply; 3+ messages in thread
From: Edwin Lu @ 2024-01-29 19:38 UTC (permalink / raw)
To: gcc-patches; +Cc: gnu-toolchain, Edwin Lu
Adding rvv related flags (i.e. --param=riscv-autovec-preference) to
non vector targets bypassed the dejagnu skip test directive. Change the
target selector to skip if rvv is enabled
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/abi-1.c: change selector
* gcc.target/riscv/rvv/base/pragma-2.c: ditto
* gcc.target/riscv/rvv/base/pragma-3.c: ditto
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
---
gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c | 2 +-
gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
index 2eef9e1e1a8..a072bdd47bf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target { ! riscv_xtheadvector } } } */
-/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
+/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } } */
void foo0 () {__rvv_bool64_t t;}
void foo1 () {__rvv_bool32_t t;}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
index fd2aa3066cd..fc1bb13c53d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
@@ -1,4 +1,4 @@
/* { dg-do compile } */
-/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
+/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } } */
#pragma riscv intrinsic "vector"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
index 96a0e051a29..45580bb2faa 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
@@ -1,4 +1,4 @@
/* { dg-do compile } */
-/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
+/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } */
#pragma riscv intrinsic "report-error" /* { dg-error {unknown '#pragma riscv intrinsic' option 'report-error'} } */
--
2.34.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] RISC-V: Fix rvv intrinsic pragma tests dejagnu selector
2024-01-29 19:38 [PATCH] RISC-V: Fix rvv intrinsic pragma tests dejagnu selector Edwin Lu
@ 2024-01-30 17:51 ` Palmer Dabbelt
2024-02-08 17:59 ` [Committed] " Edwin Lu
0 siblings, 1 reply; 3+ messages in thread
From: Palmer Dabbelt @ 2024-01-30 17:51 UTC (permalink / raw)
To: ewlu; +Cc: gcc-patches, gnu-toolchain, ewlu
On Mon, 29 Jan 2024 11:38:12 PST (-0800), ewlu@rivosinc.com wrote:
> Adding rvv related flags (i.e. --param=riscv-autovec-preference) to
> non vector targets bypassed the dejagnu skip test directive. Change the
> target selector to skip if rvv is enabled
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/abi-1.c: change selector
> * gcc.target/riscv/rvv/base/pragma-2.c: ditto
> * gcc.target/riscv/rvv/base/pragma-3.c: ditto
>
> Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
> ---
> gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c | 2 +-
> gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
> index 2eef9e1e1a8..a072bdd47bf 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile { target { ! riscv_xtheadvector } } } */
> -/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
> +/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } } */
>
> void foo0 () {__rvv_bool64_t t;}
> void foo1 () {__rvv_bool32_t t;}
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
> index fd2aa3066cd..fc1bb13c53d 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
> @@ -1,4 +1,4 @@
> /* { dg-do compile } */
> -/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
> +/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } } */
>
> #pragma riscv intrinsic "vector"
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
> index 96a0e051a29..45580bb2faa 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
> @@ -1,4 +1,4 @@
> /* { dg-do compile } */
> -/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } { "-march=rv*v*" } } */
> +/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } */
>
> #pragma riscv intrinsic "report-error" /* { dg-error {unknown '#pragma riscv intrinsic' option 'report-error'} } */
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Committed] RISC-V: Fix rvv intrinsic pragma tests dejagnu selector
2024-01-30 17:51 ` Palmer Dabbelt
@ 2024-02-08 17:59 ` Edwin Lu
0 siblings, 0 replies; 3+ messages in thread
From: Edwin Lu @ 2024-02-08 17:59 UTC (permalink / raw)
To: Palmer Dabbelt; +Cc: gcc-patches, gnu-toolchain
Committed
On 1/30/2024 9:51 AM, Palmer Dabbelt wrote:
> On Mon, 29 Jan 2024 11:38:12 PST (-0800), ewlu@rivosinc.com wrote:
>> Adding rvv related flags (i.e. --param=riscv-autovec-preference) to
>> non vector targets bypassed the dejagnu skip test directive. Change the
>> target selector to skip if rvv is enabled
>>
>> gcc/testsuite/ChangeLog:
>>
>> * gcc.target/riscv/rvv/base/abi-1.c: change selector
>> * gcc.target/riscv/rvv/base/pragma-2.c: ditto
>> * gcc.target/riscv/rvv/base/pragma-3.c: ditto
>>
>> Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
>> ---
>> gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c | 2 +-
>> gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c | 2 +-
>> gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c | 2 +-
>> 3 files changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
>> b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
>> index 2eef9e1e1a8..a072bdd47bf 100644
>> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
>> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-1.c
>> @@ -1,5 +1,5 @@
>> /* { dg-do compile { target { ! riscv_xtheadvector } } } */
>> -/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } {
>> "-march=rv*v*" } } */
>> +/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } } */
>>
>> void foo0 () {__rvv_bool64_t t;}
>> void foo1 () {__rvv_bool32_t t;}
>> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
>> b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
>> index fd2aa3066cd..fc1bb13c53d 100644
>> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
>> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-2.c
>> @@ -1,4 +1,4 @@
>> /* { dg-do compile } */
>> -/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } {
>> "-march=rv*v*" } } */
>> +/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } } */
>>
>> #pragma riscv intrinsic "vector"
>> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
>> b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
>> index 96a0e051a29..45580bb2faa 100644
>> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
>> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pragma-3.c
>> @@ -1,4 +1,4 @@
>> /* { dg-do compile } */
>> -/* { dg-skip-if "test rvv intrinsic" { *-*-* } { "*" } {
>> "-march=rv*v*" } } */
>> +/* { dg-skip-if "test rvv intrinsic" { ! riscv_v } */
>>
>> #pragma riscv intrinsic "report-error" /* { dg-error {unknown
>> '#pragma riscv intrinsic' option 'report-error'} } */
>
> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2024-01-29 19:38 [PATCH] RISC-V: Fix rvv intrinsic pragma tests dejagnu selector Edwin Lu
2024-01-30 17:51 ` Palmer Dabbelt
2024-02-08 17:59 ` [Committed] " Edwin Lu
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