Re: [aarch64] Code-gen for vector initialization involving constants

[Richard Sandiford <richard.sandiford@arm.com>]

Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> writes:
> Hi Richard,
> After committing the interleave+zip1 patch for vector initialization,
> it seems to regress the s32 case for this patch:
>
> int32x4_t f_s32(int32_t x)
> {
>   return (int32x4_t) { x, x, x, 1 };
> }
>
> code-gen:
> f_s32:
>         movi    v30.2s, 0x1
>         fmov    s31, w0
>         dup     v0.2s, v31.s[0]
>         ins     v30.s[0], v31.s[0]
>         zip1    v0.4s, v0.4s, v30.4s
>         ret
>
> instead of expected code-gen:
> f_s32:
>         movi    v31.2s, 0x1
>         dup     v0.4s, w0
>         ins     v0.s[3], v31.s[0]
>         ret
>
> Cost for fallback sequence: 16
> Cost for interleave and zip sequence: 12
>
> For the above case, the cost for interleave+zip1 sequence is computed as:
> halves[0]:
> (set (reg:V2SI 96)
>     (vec_duplicate:V2SI (reg/v:SI 93 [ x ])))
> cost = 8
>
> halves[1]:
> (set (reg:V2SI 97)
>     (const_vector:V2SI [
>             (const_int 1 [0x1]) repeated x2
>         ]))
> (set (reg:V2SI 97)
>     (vec_merge:V2SI (vec_duplicate:V2SI (reg/v:SI 93 [ x ]))
>         (reg:V2SI 97)
>         (const_int 1 [0x1])))
> cost = 8
>
> followed by:
> (set (reg:V4SI 95)
>     (unspec:V4SI [
>             (subreg:V4SI (reg:V2SI 96) 0)
>             (subreg:V4SI (reg:V2SI 97) 0)
>         ] UNSPEC_ZIP1))
> cost = 4
>
> So the total cost becomes
> max(costs[0], costs[1]) + zip1_insn_cost
> = max(8, 8) + 4
> = 12
>
> While the fallback rtl sequence is:
> (set (reg:V4SI 95)
>     (vec_duplicate:V4SI (reg/v:SI 93 [ x ])))
> cost = 8
> (set (reg:SI 98)
>     (const_int 1 [0x1]))
> cost = 4
> (set (reg:V4SI 95)
>     (vec_merge:V4SI (vec_duplicate:V4SI (reg:SI 98))
>         (reg:V4SI 95)
>         (const_int 8 [0x8])))
> cost = 4
>
> So total cost = 8 + 4 + 4 = 16, and we choose the interleave+zip1 sequence.
>
> I think the issue is probably that for the interleave+zip1 sequence we take
> max(costs[0], costs[1]) to reflect that both halves are interleaved,
> but for the fallback seq we use seq_cost, which assumes serial execution
> of insns in the sequence.
> For above fallback sequence,
> set (reg:V4SI 95)
>     (vec_duplicate:V4SI (reg/v:SI 93 [ x ])))
> and
> (set (reg:SI 98)
>     (const_int 1 [0x1]))
> could be executed in parallel, which would make it's cost max(8, 4) + 4 = 12.

Agreed.

A good-enough substitute for this might be to ignore scalar moves
(for both alternatives) when costing for speed.

> I was wondering if we should we make cost for interleave+zip1 sequence
> more conservative
> by not taking max, but summing up costs[0] + costs[1] even for speed ?
> For this case,
> that would be 8 + 8 + 4 = 20.
>
> It generates the fallback sequence for other cases (s8, s16, s64) from
> the test-case.

What does it do for the tests in the interleave+zip1 patch?  If it doesn't
make a difference there then it sounds like we don't have enough tests. :)

Summing is only conservative if the fallback sequence is somehow "safer".
But I don't think it is.   Building an N-element vector from N scalars
can be done using N instructions in the fallback case and N+1 instructions
in the interleave+zip1 case.  But the interleave+zip1 case is still
better (speedwise) for N==16.

Thanks,
Richard