* [PATCH] aarch64: Use type-qualified builtins for ADDV Neon intrinsics
@ 2021-11-11 10:31 Jonathan Wright
2021-11-11 10:38 ` Richard Sandiford
0 siblings, 1 reply; 2+ messages in thread
From: Jonathan Wright @ 2021-11-11 10:31 UTC (permalink / raw)
To: gcc-patches; +Cc: Richard Sandiford, Kyrylo Tkachov
[-- Attachment #1: Type: text/plain, Size: 720 bytes --]
Hi,
This patch declares unsigned type-qualified builtins and uses them to
implement the vector reduction Neon intrinsics. This removes the need
for many casts in arm_neon.h.
Regression tested and bootstrapped on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeLog:
2021-11-09 Jonathan Wright <jonathan.wright@arm.com>
* config/aarch64/aarch64-simd-builtins.def: Declare unsigned
builtins for vector reduction.
* config/aarch64/arm_neon.h (vaddv_u8): Use type-qualified
builtin and remove casts.
(vaddv_u16): Likewise.
(vaddv_u32): Likewise.
(vaddvq_u8): Likewise.
(vaddvq_u16): Likewise.
(vaddvq_u32): Likewise.
(vaddvq_u64): Likewise.
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diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
index 7d6de6728cf7c63872e09850a394101f7abf21d4..35a099e1fb8dd1acb9e35583d1267df257d961b0 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -513,6 +513,7 @@
/* Implemented by aarch64_reduc_plus_<mode>. */
BUILTIN_VALL (UNOP, reduc_plus_scal_, 10, NONE)
+ BUILTIN_VDQ_I (UNOPU, reduc_plus_scal_, 10, NONE)
/* Implemented by reduc_<maxmin_uns>_scal_<mode> (producing scalar). */
BUILTIN_VDQIF_F16 (UNOP, reduc_smax_scal_, 10, NONE)
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index ab46897d784b81bec9654d87557640ca4c1e5681..3c03432b5b6c6cd0f349671366615925d38121e5 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -9695,21 +9695,21 @@ __extension__ extern __inline uint8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vaddv_u8 (uint8x8_t __a)
{
- return (uint8_t) __builtin_aarch64_reduc_plus_scal_v8qi ((int8x8_t) __a);
+ return __builtin_aarch64_reduc_plus_scal_v8qi_uu (__a);
}
__extension__ extern __inline uint16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vaddv_u16 (uint16x4_t __a)
{
- return (uint16_t) __builtin_aarch64_reduc_plus_scal_v4hi ((int16x4_t) __a);
+ return __builtin_aarch64_reduc_plus_scal_v4hi_uu (__a);
}
__extension__ extern __inline uint32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vaddv_u32 (uint32x2_t __a)
{
- return (int32_t) __builtin_aarch64_reduc_plus_scal_v2si ((int32x2_t) __a);
+ return __builtin_aarch64_reduc_plus_scal_v2si_uu (__a);
}
__extension__ extern __inline int8_t
@@ -9744,28 +9744,28 @@ __extension__ extern __inline uint8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vaddvq_u8 (uint8x16_t __a)
{
- return (uint8_t) __builtin_aarch64_reduc_plus_scal_v16qi ((int8x16_t) __a);
+ return __builtin_aarch64_reduc_plus_scal_v16qi_uu (__a);
}
__extension__ extern __inline uint16_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vaddvq_u16 (uint16x8_t __a)
{
- return (uint16_t) __builtin_aarch64_reduc_plus_scal_v8hi ((int16x8_t) __a);
+ return __builtin_aarch64_reduc_plus_scal_v8hi_uu (__a);
}
__extension__ extern __inline uint32_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vaddvq_u32 (uint32x4_t __a)
{
- return (uint32_t) __builtin_aarch64_reduc_plus_scal_v4si ((int32x4_t) __a);
+ return __builtin_aarch64_reduc_plus_scal_v4si_uu (__a);
}
__extension__ extern __inline uint64_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vaddvq_u64 (uint64x2_t __a)
{
- return (uint64_t) __builtin_aarch64_reduc_plus_scal_v2di ((int64x2_t) __a);
+ return __builtin_aarch64_reduc_plus_scal_v2di_uu (__a);
}
__extension__ extern __inline float32_t
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] aarch64: Use type-qualified builtins for ADDV Neon intrinsics
2021-11-11 10:31 [PATCH] aarch64: Use type-qualified builtins for ADDV Neon intrinsics Jonathan Wright
@ 2021-11-11 10:38 ` Richard Sandiford
0 siblings, 0 replies; 2+ messages in thread
From: Richard Sandiford @ 2021-11-11 10:38 UTC (permalink / raw)
To: Jonathan Wright; +Cc: gcc-patches, Kyrylo Tkachov
Jonathan Wright <Jonathan.Wright@arm.com> writes:
> Hi,
>
> This patch declares unsigned type-qualified builtins and uses them to
> implement the vector reduction Neon intrinsics. This removes the need
> for many casts in arm_neon.h.
>
> Regression tested and bootstrapped on aarch64-none-linux-gnu - no
> issues.
>
> Ok for master?
>
> Thanks,
> Jonathan
>
> ---
>
> gcc/ChangeLog:
>
> 2021-11-09 Jonathan Wright <jonathan.wright@arm.com>
>
> * config/aarch64/aarch64-simd-builtins.def: Declare unsigned
> builtins for vector reduction.
> * config/aarch64/arm_neon.h (vaddv_u8): Use type-qualified
> builtin and remove casts.
> (vaddv_u16): Likewise.
> (vaddv_u32): Likewise.
> (vaddvq_u8): Likewise.
> (vaddvq_u16): Likewise.
> (vaddvq_u32): Likewise.
> (vaddvq_u64): Likewise.
OK, thanks.
Richard
>
> diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
> index 7d6de6728cf7c63872e09850a394101f7abf21d4..35a099e1fb8dd1acb9e35583d1267df257d961b0 100644
> --- a/gcc/config/aarch64/aarch64-simd-builtins.def
> +++ b/gcc/config/aarch64/aarch64-simd-builtins.def
> @@ -513,6 +513,7 @@
>
> /* Implemented by aarch64_reduc_plus_<mode>. */
> BUILTIN_VALL (UNOP, reduc_plus_scal_, 10, NONE)
> + BUILTIN_VDQ_I (UNOPU, reduc_plus_scal_, 10, NONE)
>
> /* Implemented by reduc_<maxmin_uns>_scal_<mode> (producing scalar). */
> BUILTIN_VDQIF_F16 (UNOP, reduc_smax_scal_, 10, NONE)
> diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
> index ab46897d784b81bec9654d87557640ca4c1e5681..3c03432b5b6c6cd0f349671366615925d38121e5 100644
> --- a/gcc/config/aarch64/arm_neon.h
> +++ b/gcc/config/aarch64/arm_neon.h
> @@ -9695,21 +9695,21 @@ __extension__ extern __inline uint8_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vaddv_u8 (uint8x8_t __a)
> {
> - return (uint8_t) __builtin_aarch64_reduc_plus_scal_v8qi ((int8x8_t) __a);
> + return __builtin_aarch64_reduc_plus_scal_v8qi_uu (__a);
> }
>
> __extension__ extern __inline uint16_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vaddv_u16 (uint16x4_t __a)
> {
> - return (uint16_t) __builtin_aarch64_reduc_plus_scal_v4hi ((int16x4_t) __a);
> + return __builtin_aarch64_reduc_plus_scal_v4hi_uu (__a);
> }
>
> __extension__ extern __inline uint32_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vaddv_u32 (uint32x2_t __a)
> {
> - return (int32_t) __builtin_aarch64_reduc_plus_scal_v2si ((int32x2_t) __a);
> + return __builtin_aarch64_reduc_plus_scal_v2si_uu (__a);
> }
>
> __extension__ extern __inline int8_t
> @@ -9744,28 +9744,28 @@ __extension__ extern __inline uint8_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vaddvq_u8 (uint8x16_t __a)
> {
> - return (uint8_t) __builtin_aarch64_reduc_plus_scal_v16qi ((int8x16_t) __a);
> + return __builtin_aarch64_reduc_plus_scal_v16qi_uu (__a);
> }
>
> __extension__ extern __inline uint16_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vaddvq_u16 (uint16x8_t __a)
> {
> - return (uint16_t) __builtin_aarch64_reduc_plus_scal_v8hi ((int16x8_t) __a);
> + return __builtin_aarch64_reduc_plus_scal_v8hi_uu (__a);
> }
>
> __extension__ extern __inline uint32_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vaddvq_u32 (uint32x4_t __a)
> {
> - return (uint32_t) __builtin_aarch64_reduc_plus_scal_v4si ((int32x4_t) __a);
> + return __builtin_aarch64_reduc_plus_scal_v4si_uu (__a);
> }
>
> __extension__ extern __inline uint64_t
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vaddvq_u64 (uint64x2_t __a)
> {
> - return (uint64_t) __builtin_aarch64_reduc_plus_scal_v2di ((int64x2_t) __a);
> + return __builtin_aarch64_reduc_plus_scal_v2di_uu (__a);
> }
>
> __extension__ extern __inline float32_t
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2021-11-11 10:38 ` Richard Sandiford
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