Re: [AArch64] Enable generation of FRINTNZ instructions

[Richard Biener <rguenther@suse.de>]

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On Fri, 4 Nov 2022, Andre Vieira (lists) wrote:

> Sorry for the delay, just been reminded I still had this patch outstanding
> from last stage 1. Hopefully since it has been mostly reviewed it could go in
> for this stage 1?
> 
> I addressed the comments and gave the slp-part of vectorizable_call some TLC
> to make it work.
> 
> I also changed vect_get_slp_defs as I noticed that the call from
> vectorizable_call was creating an auto_vec with 'nargs' that might be less
> than the number of children in the slp_node

how so?  Please fix that in the caller.  It looks like it probably
shoud use vect_nargs instead?

> , so that quick_push might not be
> safe as is, so I added the reserve (n) to ensure it's safe to push. I didn't
> actually come across any failure because of it though. Happy to split this
> into a separate patch if needed.
> 
> Bootstrapped and regression tested on aarch64-none-linux-gnu and
> x86_64-pc-linux-gnu.
> 
> OK for trunk?

I'll leave final approval to Richard but

-     This only needs 1 bit, but occupies the full 16 to ensure a nice
+     This only needs 1 bit, but occupies the full 15 to ensure a nice
      layout.  */
   unsigned int vectorizable : 16;

you don't actually change the width of the bitfield.  I would find
it more natural to have

  signed int type0 : 7;
  signed int type0_vtrans : 1;
  signed int type1 : 7;
  signed int type1_vtrans : 1;

with typeN_vtrans specifying how the types transform when vectorized.
I would imagine another variant we could need is narrow/widen
according to either result or other argument type?  That said,
just your flag would then be

  signed int type0 : 7;
  signed int pad   : 1;
  signed int type1 : 7;
  signed int type1_vect_as_scalar : 1; 

?

> gcc/ChangeLog:
> 
>         * config/aarch64/aarch64.md (ftrunc<mode><frintnz_mode>2): New
> pattern.
>         * config/aarch64/iterators.md (FRINTNZ): New iterator.
>         (frintnz_mode): New int attribute.
>         (VSFDF): Make iterator conditional.
>         * internal-fn.def (FTRUNC_INT): New IFN.
>         * internal-fn.cc (ftrunc_int_direct): New define.
>         (expand_ftrunc_int_optab_fn): New custom expander.
>         (direct_ftrunc_int_optab_supported_p): New supported_p.
>         * internal-fn.h (direct_internal_fn_info): Add new member
>         type1_is_scalar_p.
>         * match.pd: Add to the existing TRUNC pattern match.
>         * optabs.def (ftrunc_int): New entry.
>         * stor-layout.h (element_precision): Moved from here...
>         * tree.h (element_precision): ... to here.
>         (element_type): New declaration.
>         * tree.cc (element_type): New function.
>         (element_precision): Changed to use element_type.
>         * tree-vect-stmts.cc (vectorizable_internal_function): Add 
> support for
>         IFNs with different input types.
>         (vect_get_scalar_oprnds): New function.
>         (vectorizable_call): Teach to handle IFN_FTRUNC_INT.
>         * tree-vect-slp.cc (check_scalar_arg_ok): New function.
>         (vect_slp_analyze_node_operations): Use check_scalar_arg_ok.
>         (vect_get_slp_defs): Ensure vec_oprnds has enough slots to push.
>         * doc/md.texi: New entry for ftrunc pattern name.
>         * doc/sourcebuild.texi (aarch64_frintzx_ok): New target.
> 
> gcc/testsuite/ChangeLog:
> 
>         * gcc.target/aarch64/merge_trunc1.c: Adapted to skip if frintnz
> instructions available.
>         * lib/target-supports.exp: Added aarch64_frintnzx_ok target and
> aarch64_frintz options.
>         * gcc.target/aarch64/frintnz.c: New test.
>         * gcc.target/aarch64/frintnz_vec.c: New test.
>         * gcc.target/aarch64/frintnz_slp.c: New test.
> 

-- 
Richard Biener <rguenther@suse.de>
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