Re: [PATCH] [testsuite] [powerpc] adjust -m32 counts for fold-vec-extract*

[Alexandre Oliva <oliva@adacore.com>]

On May 25, 2023, Segher Boessenkool <segher@kernel.crashing.org> wrote:

> Fwiw, updating the insn counts blindly like this

... is a claim that carries a wildly incorrect and insulting underlying
assumption: I've actually identified the corresponding change to the
lp64 tests, compared the effects of the codegen changes, and concluded
the tests needed this changing for ilp32 to keep on testing for the same
thing after code changes brought about by changes that AFAICT had been
well understood when making the lp64 adjustments.

> If it is not possible to keep these tests up-to-date easily

The counts have been stable for a couple of release cycles already.

The change that caused the codegen differences is identified and
understood; the PR confirmed my findings, naming the root cause and the
incomplete testsuite adjustment.

I suspect there may also be ABI-related assumptions implied by the 'add'
counts, but I don't know enough about all the ppc variants to be sure.


Now, if your implied claim is correct that counting 'add/addi'
instructions in these tests is fragile, dropping the checks for those
would probably be best.  But if ppc maintainers seem to have different
opinions as to how to deal with the fallout of that one-time codegen
change, it would be foolish for me to get pulled into the cross fire.

Here's the patch that corrects the long-broken counts, with the
requested adjustments, retested with ppc- and ppc64-vx7r2.  Ok?


[testsuite] [powerpc] adjust -m32 counts for fold-vec-extract*

Codegen changes caused add instruction count mismatches on
ppc-*-linux-gnu and other 32-bit ppc targets.  At some point the
expected counts were adjusted for lp64, but ilp32 differences
remained, and published test results confirm it.


for  gcc/testsuite/ChangeLog

	PR testsuite/101169
	* gcc.target/powerpc/fold-vec-extract-char.p7.c: Adjust addi
	counts for ilp32.
	* gcc.target/powerpc/fold-vec-extract-double.p7.c: Likewise.
	* gcc.target/powerpc/fold-vec-extract-float.p7.c: Likewise.
	* gcc.target/powerpc/fold-vec-extract-float.p8.c: Likewise.
	* gcc.target/powerpc/fold-vec-extract-int.p7.c: Likewise.
	* gcc.target/powerpc/fold-vec-extract-int.p8.c: Likewise.
	* gcc.target/powerpc/fold-vec-extract-short.p7.c: Likewise.
	* gcc.target/powerpc/fold-vec-extract-short.p8.c: Likewise.
---
 .../gcc.target/powerpc/fold-vec-extract-char.p7.c  |    3 ++-
 .../powerpc/fold-vec-extract-double.p7.c           |    3 +--
 .../gcc.target/powerpc/fold-vec-extract-float.p7.c |    3 +--
 .../gcc.target/powerpc/fold-vec-extract-float.p8.c |    2 +-
 .../gcc.target/powerpc/fold-vec-extract-int.p7.c   |    3 +--
 .../gcc.target/powerpc/fold-vec-extract-int.p8.c   |    2 +-
 .../gcc.target/powerpc/fold-vec-extract-short.p7.c |    3 +--
 .../gcc.target/powerpc/fold-vec-extract-short.p8.c |    2 +-
 8 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c
index 29a8aa84db282..c6647431d09c9 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c
@@ -11,7 +11,8 @@
 /* one extsb (extend sign-bit) instruction generated for each test against
    unsigned types */
 
-/* { dg-final { scan-assembler-times {\maddi\M} 9 } } */
+/* { dg-final { scan-assembler-times {\maddi\M} 9 { target { lp64 } } } } */
+/* { dg-final { scan-assembler-times {\maddi\M} 6 { target { ilp32 } } } } */
 /* { dg-final { scan-assembler-times {\mli\M} 6 } } */
 /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */
 /* -m32 target uses rlwinm in place of rldicl. */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
index 3cae644b90b71..cbf6cffbeba17 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
@@ -13,8 +13,7 @@
 /* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 } } */
 /* { dg-final { scan-assembler-times {\mli\M} 1 } } */
 /* -m32 target has an 'add' in place of one of the 'addi'. */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 } } */
 /* -m32 target has a rlwinm in place of a rldic .  */
 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */
 /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
index 59a4979457dcb..c9abb6c1f352c 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
@@ -12,8 +12,7 @@
 /* { dg-final { scan-assembler-times {\mxscvspdp\M} 1 } } */
 /* { dg-final { scan-assembler-times {\mli\M} 1 } } */
 /* -m32 as an add in place of an addi. */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 } } */
 /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 1 } } */
 /* -m32 uses rlwinm in place of rldic */
 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
index 4b1d75ee26d0f..68eeeede4b307 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
@@ -26,7 +26,7 @@
 /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\madd\M} 1 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlfs\M} 1 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M} 1 { target ilp32 } } } */
 
 
 #include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
index 3729a1646e9c9..418762e3948a5 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
@@ -10,8 +10,7 @@
 // P7 variables:  li, addi, stxvw4x, lwa/lwz
 
 /* { dg-final { scan-assembler-times {\mli\M} 6 } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 } } */
 /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */
 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */
 /* { dg-final { scan-assembler-times {\mlwz\M|\mlwa\M|\mlwzx\M|\mlwax\M} 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
index 75eaf25943b70..d1e3b62373f80 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
@@ -30,7 +30,7 @@
 /* { dg-final { scan-assembler-times {\mstxvw4x\M} 6 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlwz\M} 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */
 
 
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
index a495d9f3928fa..46e943faa6a41 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
@@ -10,8 +10,7 @@
 // P7 (be) constants:            li, addi,              stxvw4x, lha/lhz
 
 /* { dg-final { scan-assembler-times {\mli\M} 6 } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 } } */
 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */
 /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M} 6 } } */
 /* { dg-final { scan-assembler-times "lhz|lha|lhzx|lhax" 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
index 0ddecb4e4b55d..00685aca1367b 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
@@ -32,7 +32,7 @@
 /* add and rlwinm instructions only on the variable tests. */
 /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times "rlwinm" 3 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlha\M|\mlhz\M} 6 { target ilp32 } } } */
 
 


-- 
Alexandre Oliva, happy hacker                https://FSFLA.org/blogs/lxo/
   Free Software Activist                       GNU Toolchain Engineer
Disinformation flourishes because many people care deeply about injustice
but very few check the facts.  Ask me about <https://stallmansupport.org>