Re: target/9757: Gcc should use swp instruction in ARM targets

Re: target/9757: Gcc should use swp instruction in ARM targets

[rearnsha]

Synopsis: Gcc should use swp instruction in ARM targets

State-Changed-From-To: open->closed
State-Changed-By: rearnsha
State-Changed-When: Thu Feb 20 12:13:24 2003
State-Changed-Why:
    No, the SWP instruction should not be used.  For several reasons.
    
    1) It's very slow on some processors, since it forces an external bus access even if the data is already in the cache.
    2) It's behaviour is not defined if access is made to a MMU managed page that is non-cacheable/bufferable.

http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit-trail&database=gcc&pr=9757

target/9757: Gcc should use swp instruction in ARM targets

[gertom]

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>Number:         9757
>Category:       target
>Synopsis:       Gcc should use swp instruction in ARM targets
>Confidential:   no
>Severity:       non-critical
>Priority:       medium
>Responsible:    unassigned
>State:          open
>Class:          pessimizes-code
>Submitter-Id:   net
>Arrival-Date:   Wed Feb 19 16:56:00 UTC 2003
>Closed-Date:
>Last-Modified:
>Originator:     Tamás Gergely
>Release:        gcc version 3.3 20030210 (prerelease)
>Organization:
>Environment:
BUILD & HOST: Linux 2.4.20 i686 unknown
TARGET: arm-unknown-elf
>Description:
Swp instruction is not used at all in ARM target. Subsequent "LDR rA, [rB]; STR rC, [rB];" instructions could be done with one swp instruction: "SWP rA, rC, [rB]" if rA!=rC. The swp also works, and exchanges register and memory content, if rA=rC.
>How-To-Repeat:

>Fix:
arm.md should be extended?
>Release-Note:
>Audit-Trail:
>Unformatted: