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* Reloading is going wrong?
@ 2009-09-03 14:02 Mohamed Shafi
  2009-09-03 15:30 ` Dave Korn
  0 siblings, 1 reply; 3+ messages in thread
From: Mohamed Shafi @ 2009-09-03 14:02 UTC (permalink / raw)
  To: GCC

Hello all,

I am doing a port for a 32bit target in GCC 4.4.0. Of the addressing
modes that are allowed by my target the one with (base register +
offset) is restrictive in QImode. The restriction is that if the base
register is not Stack Pointer then this kind of address cannot come in
a load instruction but only in store instruction.

 To implement this i added constrains for all supported memory
operations in QImode. So the pattern is as follows

(define_insn "movqi"
  [(set (match_operand:QI 0 "nonimmediate_operand"
             "=b,b,d,t,d, b,Ss0, Ss1, a,Se1, Sb2,  b,Sd3,  d,Se0")
        (match_operand:QI 1 "general_operand"
              "I,  L,d,d,t, Ss0,b,  b,    Se1,a,  b,     Sd3,b,  Se0,d"))]

where
d is data registers
a is address registers
b is data and address registers
Sb2 is Rn + offset addressing mode
Sd3 is SP + offset addressing mode

Se0 - (Rn), (Rn)+, (Rn)-, (Rn + Ri) and Post modify register addressing mode
Se1 - Se0 excluding Post modify register addressing mode

I believe that there are enough combinations available for the reload
to try for alternate addressing mode if it encounters the restrictive
addressing mode. But I am still getting the following error

main1.c:11: error: insn does not satisfy its constraints:
(insn 30 29 7 2 main1.c:9 (set (reg:QI 2 d2 [orig:61 <variable>.a+1 ] [61])
        (mem/s/j:QI (plus:SI (reg:SI 16 r0)
                (const_int 1 [0x1])) [0 <variable>.a+1 S1 A8])) 41
{movqi} (nil))
main1.c:11: internal compiler error: in reload_cse_simplify_operands,
at postreload.c:396


So what am i doing wrong?
Cant this scenario be solved by the reload pass?
How can generate instructions with the QImode restriction?

Regards,
Shafi

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: Reloading is going wrong?
  2009-09-03 14:02 Reloading is going wrong? Mohamed Shafi
@ 2009-09-03 15:30 ` Dave Korn
  2009-09-03 15:40   ` Jeff Law
  0 siblings, 1 reply; 3+ messages in thread
From: Dave Korn @ 2009-09-03 15:30 UTC (permalink / raw)
  To: Mohamed Shafi; +Cc: GCC

Mohamed Shafi wrote:

> The restriction is that if the base
> register is not Stack Pointer then this kind of address cannot come in
> a load instruction but only in store instruction.
> 
>  To implement this i added constrains for all supported memory
> operations in QImode. So the pattern is as follows
> 
> (define_insn "movqi"
>   [(set (match_operand:QI 0 "nonimmediate_operand"
>              "=b,b,d,t,d, b,Ss0, Ss1, a,Se1,  Sb2,  b,Sd3,  d,Se0")
>         (match_operand:QI 1 "general_operand"
>               "I,L,d,d,t, Ss0,b,  b,  Se1,a,  b,    Sd3,b,  Se0,d"))]
> 
> where
> d is data registers
> a is address registers
> b is data and address registers
> Sb2 is Rn + offset addressing mode
> Sd3 is SP + offset addressing mode
> 
> Se0 - (Rn), (Rn)+, (Rn)-, (Rn + Ri) and Post modify register addressing mode
> Se1 - Se0 excluding Post modify register addressing mode
> 
> I believe that there are enough combinations available for the reload
> to try for alternate addressing mode if it encounters the restrictive
> addressing mode. But I am still getting the following error
> 
> main1.c:11: error: insn does not satisfy its constraints:
> (insn 30 29 7 2 main1.c:9 (set (reg:QI 2 d2 [orig:61 <variable>.a+1 ] [61])
>         (mem/s/j:QI (plus:SI (reg:SI 16 r0)
>                 (const_int 1 [0x1])) [0 <variable>.a+1 S1 A8])) 41
> {movqi} (nil))
> main1.c:11: internal compiler error: in reload_cse_simplify_operands,
> at postreload.c:396

  This approach can't work.  There has to be a combination of constraints to
accept any and every combination of operands permitted by the predicates
"nonimmediate_operand" and "general_operand".  Since neither of these exclude
base registers beside the SP, they make it through to recog which punts when
it can't find a which_alternative set to use.  In this case general_operand
has allowed an operand of type (mem (plus (reg) (const)), equivalent to your
Sb2 constraint, but there is no constraint for operand 1 that permits that.

  You can't use constraints to filter the initial selection performed by
predicates.  What I think you need to do is to have a variant version of
general_operand that refuses Sb2 types.

    cheers,
      DaveK

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: Reloading is going wrong?
  2009-09-03 15:30 ` Dave Korn
@ 2009-09-03 15:40   ` Jeff Law
  0 siblings, 0 replies; 3+ messages in thread
From: Jeff Law @ 2009-09-03 15:40 UTC (permalink / raw)
  To: Dave Korn; +Cc: Mohamed Shafi, GCC

On 09/03/09 09:44, Dave Korn wrote:
> Mohamed Shafi wrote:
>
>    
>> The restriction is that if the base
>> register is not Stack Pointer then this kind of address cannot come in
>> a load instruction but only in store instruction.
>>
>>   To implement this i added constrains for all supported memory
>> operations in QImode. So the pattern is as follows
>>
>> (define_insn "movqi"
>>    [(set (match_operand:QI 0 "nonimmediate_operand"
>>               "=b,b,d,t,d, b,Ss0, Ss1, a,Se1,  Sb2,  b,Sd3,  d,Se0")
>>          (match_operand:QI 1 "general_operand"
>>                "I,L,d,d,t, Ss0,b,  b,  Se1,a,  b,    Sd3,b,  Se0,d"))]
>>
>> where
>> d is data registers
>> a is address registers
>> b is data and address registers
>> Sb2 is Rn + offset addressing mode
>> Sd3 is SP + offset addressing mode
>>
>> Se0 - (Rn), (Rn)+, (Rn)-, (Rn + Ri) and Post modify register addressing mode
>> Se1 - Se0 excluding Post modify register addressing mode
>>
>> I believe that there are enough combinations available for the reload
>> to try for alternate addressing mode if it encounters the restrictive
>> addressing mode. But I am still getting the following error
>>
>> main1.c:11: error: insn does not satisfy its constraints:
>> (insn 30 29 7 2 main1.c:9 (set (reg:QI 2 d2 [orig:61<variable>.a+1 ] [61])
>>          (mem/s/j:QI (plus:SI (reg:SI 16 r0)
>>                  (const_int 1 [0x1])) [0<variable>.a+1 S1 A8])) 41
>> {movqi} (nil))
>> main1.c:11: internal compiler error: in reload_cse_simplify_operands,
>> at postreload.c:396
>>      
>    This approach can't work.  There has to be a combination of constraints to
> accept any and every combination of operands permitted by the predicates
> "nonimmediate_operand" and "general_operand".  Since neither of these exclude
> base registers beside the SP, they make it through to recog which punts when
> it can't find a which_alternative set to use.  In this case general_operand
> has allowed an operand of type (mem (plus (reg) (const)), equivalent to your
> Sb2 constraint, but there is no constraint for operand 1 that permits that.
>
>    You can't use constraints to filter the initial selection performed by
> predicates.  What I think you need to do is to have a variant version of
> general_operand that refuses Sb2 types.
>    
Also note that reload does not distinguish between a load and a store 
when verifying the legitimacy of an address, meaning that reload doesn't 
handle cases where a particular addressing mode is available for loads, 
but not stores (or vice-versa).

This can be worked around with careful selection of operand predicates, 
secondary reloads, sometimes additional patterns.    It's been a long 
time since I worked on a port with this kind of characteristic, so I 
can't offhand give a recipe to make it work.

Obviously looking at how other ports with these characteristics handle 
this case would be useful.  The PA for example has integer indexed 
loads, but no integer indexed stores.  There's likely other ports with 
similar characteristics as well.


Jeff

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2009-09-03 14:02 Reloading is going wrong? Mohamed Shafi
2009-09-03 15:30 ` Dave Korn
2009-09-03 15:40   ` Jeff Law

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