* Suboptimal code generated for __buitlin_ceil on AMD64 without SS4_4.1
@ 2021-08-05 7:31 Stefan Kanthak
2021-08-05 7:41 ` Hongtao Liu
0 siblings, 1 reply; 2+ messages in thread
From: Stefan Kanthak @ 2021-08-05 7:31 UTC (permalink / raw)
To: gcc
Hi,
targeting AMD64 alias x86_64 with -O3, GCC 10.2.0 generates the
following code (17 instructions using 78 bytes, plus 6 quadwords
using 48 bytes) for __builtin_ceil() when -msse4.1 is NOT given:
.text
0: f2 0f 10 15 10 00 00 00 movsd .LC1(%rip), %xmm2
4: R_X86_64_PC32 .rdata
8: f2 0f 10 25 00 00 00 00 movsd .LC0(%rip), %xmm4
c: R_X86_64_PC32 .rdata
10: 66 0f 28 d8 movapd %xmm0, %xmm3
14: 66 0f 28 c8 movapd %xmm0, %xmm1
18: 66 0f 54 da andpd %xmm2, %xmm3
1c: 66 0f 2e e3 ucomisd %xmm3, %xmm4
20: 76 2b jbe 4d <_ceil+0x4d>
22: f2 48 0f 2c c0 cvttsd2si %xmm0, %rax
27: 66 0f ef db pxor %xmm3, %xmm3
2b: f2 0f 10 25 20 00 00 00 movsd 0x20(%rip), %xmm4
2f: R_X86_64_PC32 .rdata
33: 66 0f 55 d1 andnpd %xmm1, %xmm2
37: f2 48 0f 2a d8 cvtsi2sd %rax, %xmm3
3c: f2 0f c2 c3 06 cmpnlesd %xmm3, %xmm0
41: 66 0f 54 c4 andpd %xmm4, %xmm0
45: f2 0f 58 c3 addsd %xmm3, %xmm0
49: 66 0f 56 c2 orpd %xmm2, %xmm0
4d: c3 retq
.rdata
.align 8
0: 00 00 00 00 .LC0: .quad 0x1.0p52
00 00 30 43
00 00 00 00
00 00 00 00
.align 16
10: ff ff ff ff .LC1: .quad ~(-0.0)
ff ff ff 7f
18: 00 00 00 00 .quad 0.0
00 00 00 00
.align 8
20: 00 00 00 00 .LC2: .quad 0x1.0p0
00 00 f0 3f
00 00 00 00
00 00 00 00
.end
JFTR: in the best case, the memory accesses cost several cycles,
while in the worst case they yield a page fault!
Properly optimized, faster and shorter code, using just 15 instructions
in 65 bytes, WITHOUT superfluous constants, thus avoiding costly memory
accesses and saving at least 32 bytes, follows:
.intel_syntax
.equ BIAS, 1023
.text
0: f2 48 0f 2c c0 cvttsd2si rax, xmm0 # rax = trunc(argument)
5: 48 f7 d8 neg rax
# jz .L0 # argument zero?
8: 70 36 jo .L0 # argument indefinite?
# argument overflows 64-bit integer?
a: 48 f7 d8 neg rax
d: f2 48 0f 2a c8 cvtsi2sd xmm1, rax # xmm1 = trunc(argument)
12: 48 a1 00 00 00 mov rax, BIAS << 52
19: 00 00 00 f0 3f
1c: 66 48 0f 6e d0 movq xmm2, rax # xmm2 = 0x1.0p0
21: f2 0f 10 d8 movsd xmm3, xmm0 # xmm3 = argument
25: f2 0f c2 d9 02 cmplesd xmm3, xmm1 # xmm3 = (argument <= trunc(argument)) ? ~0L : 0L
2a: 66 0f 55 da andnpd xmm3, xmm2 # xmm3 = (argument <= trunc(argument)) ? 0.0 : 1.0
2e: f2 0f 58 d9 addsd xmm3, xmm1 # xmm3 = (argument > trunc(argument)) ? 1.0 : 0.0
# + trunc(argument)
# = ceil(argument)
32: 66 0f 73 d0 3f psrlq xmm0, 63
37: 66 0f 73 f0 3f psllq xmm0, 63 # xmm0 = (argument & -0.0) ? -0.0 : 0.0
3c: 66 0f 56 c3 orpd xmm0, xmm3 # xmm0 = ceil(argument)
40: c3 .L0: ret
.end
regards
Stefan
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: Suboptimal code generated for __buitlin_ceil on AMD64 without SS4_4.1
2021-08-05 7:31 Suboptimal code generated for __buitlin_ceil on AMD64 without SS4_4.1 Stefan Kanthak
@ 2021-08-05 7:41 ` Hongtao Liu
0 siblings, 0 replies; 2+ messages in thread
From: Hongtao Liu @ 2021-08-05 7:41 UTC (permalink / raw)
To: Stefan Kanthak; +Cc: GCC Development
Could you file a bugzilla for that?
https://gcc.gnu.org/bugzilla/enter_bug.cgi?product=gcc
On Thu, Aug 5, 2021 at 3:34 PM Stefan Kanthak <stefan.kanthak@nexgo.de> wrote:
>
> Hi,
>
> targeting AMD64 alias x86_64 with -O3, GCC 10.2.0 generates the
> following code (17 instructions using 78 bytes, plus 6 quadwords
> using 48 bytes) for __builtin_ceil() when -msse4.1 is NOT given:
>
> .text
> 0: f2 0f 10 15 10 00 00 00 movsd .LC1(%rip), %xmm2
> 4: R_X86_64_PC32 .rdata
> 8: f2 0f 10 25 00 00 00 00 movsd .LC0(%rip), %xmm4
> c: R_X86_64_PC32 .rdata
> 10: 66 0f 28 d8 movapd %xmm0, %xmm3
> 14: 66 0f 28 c8 movapd %xmm0, %xmm1
> 18: 66 0f 54 da andpd %xmm2, %xmm3
> 1c: 66 0f 2e e3 ucomisd %xmm3, %xmm4
> 20: 76 2b jbe 4d <_ceil+0x4d>
> 22: f2 48 0f 2c c0 cvttsd2si %xmm0, %rax
> 27: 66 0f ef db pxor %xmm3, %xmm3
> 2b: f2 0f 10 25 20 00 00 00 movsd 0x20(%rip), %xmm4
> 2f: R_X86_64_PC32 .rdata
> 33: 66 0f 55 d1 andnpd %xmm1, %xmm2
> 37: f2 48 0f 2a d8 cvtsi2sd %rax, %xmm3
> 3c: f2 0f c2 c3 06 cmpnlesd %xmm3, %xmm0
> 41: 66 0f 54 c4 andpd %xmm4, %xmm0
> 45: f2 0f 58 c3 addsd %xmm3, %xmm0
> 49: 66 0f 56 c2 orpd %xmm2, %xmm0
> 4d: c3 retq
>
> .rdata
> .align 8
> 0: 00 00 00 00 .LC0: .quad 0x1.0p52
> 00 00 30 43
> 00 00 00 00
> 00 00 00 00
> .align 16
> 10: ff ff ff ff .LC1: .quad ~(-0.0)
> ff ff ff 7f
> 18: 00 00 00 00 .quad 0.0
> 00 00 00 00
> .align 8
> 20: 00 00 00 00 .LC2: .quad 0x1.0p0
> 00 00 f0 3f
> 00 00 00 00
> 00 00 00 00
> .end
>
> JFTR: in the best case, the memory accesses cost several cycles,
> while in the worst case they yield a page fault!
>
>
> Properly optimized, faster and shorter code, using just 15 instructions
> in 65 bytes, WITHOUT superfluous constants, thus avoiding costly memory
> accesses and saving at least 32 bytes, follows:
>
> .intel_syntax
> .equ BIAS, 1023
> .text
> 0: f2 48 0f 2c c0 cvttsd2si rax, xmm0 # rax = trunc(argument)
> 5: 48 f7 d8 neg rax
> # jz .L0 # argument zero?
> 8: 70 36 jo .L0 # argument indefinite?
> # argument overflows 64-bit integer?
> a: 48 f7 d8 neg rax
> d: f2 48 0f 2a c8 cvtsi2sd xmm1, rax # xmm1 = trunc(argument)
> 12: 48 a1 00 00 00 mov rax, BIAS << 52
> 19: 00 00 00 f0 3f
> 1c: 66 48 0f 6e d0 movq xmm2, rax # xmm2 = 0x1.0p0
> 21: f2 0f 10 d8 movsd xmm3, xmm0 # xmm3 = argument
> 25: f2 0f c2 d9 02 cmplesd xmm3, xmm1 # xmm3 = (argument <= trunc(argument)) ? ~0L : 0L
> 2a: 66 0f 55 da andnpd xmm3, xmm2 # xmm3 = (argument <= trunc(argument)) ? 0.0 : 1.0
> 2e: f2 0f 58 d9 addsd xmm3, xmm1 # xmm3 = (argument > trunc(argument)) ? 1.0 : 0.0
> # + trunc(argument)
> # = ceil(argument)
> 32: 66 0f 73 d0 3f psrlq xmm0, 63
> 37: 66 0f 73 f0 3f psllq xmm0, 63 # xmm0 = (argument & -0.0) ? -0.0 : 0.0
> 3c: 66 0f 56 c3 orpd xmm0, xmm3 # xmm0 = ceil(argument)
> 40: c3 .L0: ret
> .end
>
> regards
> Stefan
--
BR,
Hongtao
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2021-08-05 7:41 ` Hongtao Liu
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