Re: ARM Cortex-R5F Support

[Richard Earnshaw <Richard.Earnshaw@foss.arm.com>]

On 01/03/2022 16:23, Kinsey Moore wrote:
> Hi,
> 
> I'm looking at working on Cortex-R5F support for RTEMS, but it seems as 
> if latest GCC supports the Cortex-R5. This R5 has implicit FPU support 
> which would make it really R5F. The ARM reference page on this core 
> (https://developer.arm.com/Processors/Cortex-R5) specifies that the FPU 
> is optional. I see that the FPU support can probably be disabled using 
> the nofp option to achieve Cortex-R5 support, but I was wondering why 
> this is handled differently from the Cortex-R4[F] support since that is 
> broken out into two different CPU entries in gcc/config/arm/arm-cpus.in. 
> It appears that R7 and R8 are handled the same way as R5.
> 
> Is the R4/R4F just the legacy way of handling this and R5/7/8 are the 
> new way?
> 

Arm no-longer gives distinct product names for products that come in 
multiple guises.  Another example of this is that many armv8-a products 
have an optional crypto unit but have the same product name.

So to answer your question more directly, the -mcpu=cortex-r5 will by 
default be considered to have an FPU, provided that the compiler was 
built with --with-fpu=auto (the default).  If you specify 
--with-float-abi=soft, then even if the product has an FPU, or for some 
cases a SIMD unit, then these will never be used.  So I'd recommend:

For FP support: -mcpu=cortex-r5 -mfloat-abi=hard
For no FP support: -mcpu=cortex-r5 -mfloat-abi=soft

There's also a mid-way variant of -mcpu=cortex-r5 -mfloat-abi=softfp, 
which would use the FP hardware but use the soft-float calling 
conventions; this code is abi-compatible with the no-fp variant above.

HTH,
R.

> 
> Thanks,
> 
> Kinsey
>