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* [binutils-gdb] gdb/arm: fix IPSR field test in arm_m_exception_cache ()
@ 2022-10-26 12:03 Luis Machado
0 siblings, 0 replies; only message in thread
From: Luis Machado @ 2022-10-26 12:03 UTC (permalink / raw)
To: gdb-cvs
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=b2e9e754e122d97511bbd6b990e38a23dafb6176
commit b2e9e754e122d97511bbd6b990e38a23dafb6176
Author: Luis Machado <luis.machado@arm.com>
Date: Wed Oct 26 13:00:17 2022 +0100
gdb/arm: fix IPSR field test in arm_m_exception_cache ()
Arm v8-M Architecture Reference Manual,
D1.2.141 IPSR, Interrupt Program Status Register reads
"Exception, bits [8:0]"
9 bits, not 8! It is uncommon but true!
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Diff:
---
gdb/arm-tdep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index ae0882f9c4a..247e5522b8e 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -3441,7 +3441,7 @@ arm_m_exception_cache (frame_info_ptr this_frame)
}
ULONGEST xpsr = get_frame_register_unsigned (this_frame, ARM_PS_REGNUM);
- if ((xpsr & 0xff) != 0)
+ if ((xpsr & 0x1ff) != 0)
/* Handler mode: This is the mode that exceptions are handled in. */
arm_cache_switch_prev_sp (cache, tdep, tdep->m_profile_msp_s_regnum);
else
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2022-10-26 12:03 [binutils-gdb] gdb/arm: fix IPSR field test in arm_m_exception_cache () Luis Machado
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