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* [binutils-gdb] sim: mips: rename "igen" generation mode to "single"
@ 2022-12-27 5:39 Michael Frysinger
0 siblings, 0 replies; only message in thread
From: Michael Frysinger @ 2022-12-27 5:39 UTC (permalink / raw)
To: gdb-cvs
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=07f60ed83166c163794b2f5987b217e22e1ef6b2
commit 07f60ed83166c163794b2f5987b217e22e1ef6b2
Author: Mike Frysinger <vapier@gentoo.org>
Date: Sun Dec 25 02:37:10 2022 -0500
sim: mips: rename "igen" generation mode to "single"
The naming in here has grown organically and is confusing to follow.
Originally there was only one set of rules for generating code from
the igen sources, so calling it "tmp-igen" and such made sense. But
when other multigen modes were added ("m16" & "multi") which also
used igen, it's not clear what's common igen and what's specific to
this generation mode. So rename the set of rules from "igen" to
"single" so it's easier to follow.
Diff:
---
sim/Makefile.in | 2 +-
sim/configure | 50 +++++++++++++++++++++++++-------------------------
sim/mips/Makefile.in | 18 +++++++++---------
sim/mips/acinclude.m4 | 50 +++++++++++++++++++++++++-------------------------
4 files changed, 60 insertions(+), 60 deletions(-)
diff --git a/sim/Makefile.in b/sim/Makefile.in
index 667b3192e5d..a1884d6b0fe 100644
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -1114,12 +1114,12 @@ SIM_INLINE = @SIM_INLINE@
SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
SIM_MIPS_GEN = @SIM_MIPS_GEN@
-SIM_MIPS_IGEN_FLAGS = @SIM_MIPS_IGEN_FLAGS@
SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
+SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
diff --git a/sim/configure b/sim/configure
index 093142f3c03..b9626ce0ac3 100755
--- a/sim/configure
+++ b/sim/configure
@@ -647,7 +647,7 @@ SIM_MIPS_MULTI_IGEN_CONFIGS
SIM_MIPS_IGEN_ITABLE_FLAGS
SIM_MIPS_GEN
SIM_MIPS_M16_FLAGS
-SIM_MIPS_IGEN_FLAGS
+SIM_MIPS_SINGLE_FLAGS
SIM_MIPS_FPU_BITSIZE
SIM_MIPS_BITSIZE
SIM_MIPS_SUBTARGET
@@ -16390,19 +16390,19 @@ esac
$as_echo "$SIM_MIPS_FPU_BITSIZE" >&6; }
-SIM_MIPS_GEN=IGEN
-sim_mips_igen_machine="-M mipsIV"
+SIM_MIPS_GEN=SINGLE
+sim_mips_single_machine="-M mipsIV"
sim_mips_m16_machine="-M mips16,mipsIII"
-sim_mips_igen_filter="32,64,f"
+sim_mips_single_filter="32,64,f"
sim_mips_m16_filter="16"
case ${target} in #(
mips*tx39*) :
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_filter="32,f"
- sim_mips_igen_machine="-M r3900" ;; #(
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_filter="32,f"
+ sim_mips_single_machine="-M r3900" ;; #(
mips64vr41*) :
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M vr4100"
+ sim_mips_single_machine="-M vr4100"
sim_mips_m16_machine="-M vr4100" ;; #(
mips64*) :
SIM_MIPS_GEN=MULTI
@@ -16429,36 +16429,36 @@ case ${target} in #(
mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
sim_mips_multi_default=mipsisa32r2 ;; #(
mipsisa32r6*) :
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_machine="-M mips32r6"
- sim_mips_igen_filter="32,f" ;; #(
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_machine="-M mips32r6"
+ sim_mips_single_filter="32,f" ;; #(
mipsisa32*) :
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M mips32,mips16,mips16e,smartmips"
+ sim_mips_single_machine="-M mips32,mips16,mips16e,smartmips"
sim_mips_m16_machine="-M mips16,mips16e,mips32"
- sim_mips_igen_filter="32,f" ;; #(
+ sim_mips_single_filter="32,f" ;; #(
mipsisa64r2*) :
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
+ sim_mips_single_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
sim_mips_m16_machine="-M mips16,mips16e,mips64r2" ;; #(
mipsisa64r6*) :
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_machine="-M mips64r6" ;; #(
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_machine="-M mips64r6" ;; #(
mipsisa64sb1*) :
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_machine="-M mips64,mips3d,sb1" ;; #(
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_machine="-M mips64,mips3d,sb1" ;; #(
mipsisa64*) :
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
+ sim_mips_single_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
sim_mips_m16_machine="-M mips16,mips16e,mips64" ;; #(
mips*lsi*) :
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M mipsIII,mips16"
+ sim_mips_single_machine="-M mipsIII,mips16"
sim_mips_m16_machine="-M mips16,mipsIII"
- sim_mips_igen_filter="32,f" ;; #(
+ sim_mips_single_filter="32,f" ;; #(
mips*) :
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_filter="32,f" ;; #(
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_filter="32,f" ;; #(
*) :
;;
esac
@@ -16601,13 +16601,13 @@ __EOF__
else
SIM_MIPS_MULTI_SRC=doesnt-exist.c
- SIM_MIPS_IGEN_ITABLE_FLAGS='$(SIM_MIPS_IGEN_FLAGS)'
+ SIM_MIPS_IGEN_ITABLE_FLAGS='$(SIM_MIPS_SINGLE_FLAGS)'
if test "x$SIM_MIPS_GEN" = x"M16"; then :
as_fn_append SIM_MIPS_IGEN_ITABLE_FLAGS ' $(SIM_MIPS_M16_FLAGS)'
fi
fi
-SIM_MIPS_IGEN_FLAGS="-F ${sim_mips_igen_filter} ${sim_mips_igen_machine}"
+SIM_MIPS_SINGLE_FLAGS="-F ${sim_mips_single_filter} ${sim_mips_single_machine}"
SIM_MIPS_M16_FLAGS="-F ${sim_mips_m16_filter} ${sim_mips_m16_machine}"
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index 187f574f249..d9b489858c5 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -3,7 +3,7 @@
## COMMON_PRE_CONFIG_FRAG
-SIM_MIPS_IGEN_FLAGS = @SIM_MIPS_IGEN_FLAGS@
+SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
SIM_MIPS_GEN = @SIM_MIPS_GEN@
SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
@@ -15,7 +15,7 @@ arch = mips
# Object files created by various simulator generators.
-SIM_IGEN_OBJ = \
+SIM_SINGLE_OBJ = \
support.o \
itable.o \
semantics.o \
@@ -86,11 +86,11 @@ IGEN_INCLUDE=\
$(srcdir)/mips3264r2.igen \
$(srcdir)/mips3264r6.igen \
-SIM_IGEN_ALL = tmp-igen
+SIM_SINGLE_ALL = tmp-single
SIM_M16_ALL = tmp-m16
SIM_MULTI_ALL = tmp-multi
-BUILT_SRC_FROM_IGEN = \
+BUILT_SRC_FROM_SINGLE = \
icache.h \
icache.c \
idecode.h \
@@ -105,15 +105,15 @@ BUILT_SRC_FROM_IGEN = \
engine.c \
irun.c \
-$(BUILT_SRC_FROM_IGEN): tmp-igen
+$(BUILT_SRC_FROM_SINGLE): tmp-single
-tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
+tmp-single: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
$(ECHO_IGEN) $(IGEN_RUN) \
$(IGEN_TRACE) \
-I $(srcdir) \
-Werror \
-Wnodiscard \
- $(SIM_MIPS_IGEN_FLAGS) \
+ $(SIM_MIPS_SINGLE_FLAGS) \
-G gen-direct-access \
-G gen-zero-r0 \
-B 32 \
@@ -192,7 +192,7 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
-I $(srcdir) \
-Werror \
-Wnodiscard \
- $(SIM_MIPS_IGEN_FLAGS) \
+ $(SIM_MIPS_SINGLE_FLAGS) \
-G gen-direct-access \
-G gen-zero-r0 \
-B 32 \
@@ -303,7 +303,7 @@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
$(SILENCE) touch $@
clean-extra:
- rm -f $(BUILT_SRC_FROM_IGEN)
+ rm -f $(BUILT_SRC_FROM_SINGLE)
rm -f $(BUILT_SRC_FROM_M16)
rm -f $(BUILT_SRC_FROM_MULTI)
rm -f tmp-*
diff --git a/sim/mips/acinclude.m4 b/sim/mips/acinclude.m4
index 452dfc84514..111dd87618e 100644
--- a/sim/mips/acinclude.m4
+++ b/sim/mips/acinclude.m4
@@ -59,19 +59,19 @@ AC_MSG_RESULT([$SIM_MIPS_FPU_BITSIZE])
AC_SUBST(SIM_MIPS_FPU_BITSIZE)
dnl Select the IGEN architecture.
-SIM_MIPS_GEN=IGEN
-sim_mips_igen_machine="-M mipsIV"
+SIM_MIPS_GEN=SINGLE
+sim_mips_single_machine="-M mipsIV"
sim_mips_m16_machine="-M mips16,mipsIII"
-sim_mips_igen_filter="32,64,f"
+sim_mips_single_filter="32,64,f"
sim_mips_m16_filter="16"
AS_CASE([${target}],
[mips*tx39*], [dnl
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_filter="32,f"
- sim_mips_igen_machine="-M r3900"],
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_filter="32,f"
+ sim_mips_single_machine="-M r3900"],
[mips64vr41*], [dnl
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M vr4100"
+ sim_mips_single_machine="-M vr4100"
sim_mips_m16_machine="-M vr4100"],
[mips64*], [dnl
SIM_MIPS_GEN=MULTI
@@ -98,36 +98,36 @@ AS_CASE([${target}],
mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
sim_mips_multi_default=mipsisa32r2],
[mipsisa32r6*], [dnl
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_machine="-M mips32r6"
- sim_mips_igen_filter="32,f"],
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_machine="-M mips32r6"
+ sim_mips_single_filter="32,f"],
[mipsisa32*], [dnl
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M mips32,mips16,mips16e,smartmips"
+ sim_mips_single_machine="-M mips32,mips16,mips16e,smartmips"
sim_mips_m16_machine="-M mips16,mips16e,mips32"
- sim_mips_igen_filter="32,f"],
+ sim_mips_single_filter="32,f"],
[mipsisa64r2*], [dnl
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
+ sim_mips_single_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
sim_mips_m16_machine="-M mips16,mips16e,mips64r2"],
[mipsisa64r6*], [dnl
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_machine="-M mips64r6"],
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_machine="-M mips64r6"],
[mipsisa64sb1*], [dnl
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_machine="-M mips64,mips3d,sb1"],
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_machine="-M mips64,mips3d,sb1"],
[mipsisa64*], [dnl
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
+ sim_mips_single_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
sim_mips_m16_machine="-M mips16,mips16e,mips64"],
[mips*lsi*], [dnl
SIM_MIPS_GEN=M16
- sim_mips_igen_machine="-M mipsIII,mips16"
+ sim_mips_single_machine="-M mipsIII,mips16"
sim_mips_m16_machine="-M mips16,mipsIII"
- sim_mips_igen_filter="32,f"],
+ sim_mips_single_filter="32,f"],
[mips*], [dnl
- SIM_MIPS_GEN=IGEN
- sim_mips_igen_filter="32,f"])
+ SIM_MIPS_GEN=SINGLE
+ sim_mips_single_filter="32,f"])
dnl The MULTI generator can combine several simulation engines into one.
dnl executable. A configuration which uses the MULTI should set two
@@ -321,12 +321,12 @@ __EOF__
], [dnl
dnl For clean-extra target.
SIM_MIPS_MULTI_SRC=doesnt-exist.c
- SIM_MIPS_IGEN_ITABLE_FLAGS='$(SIM_MIPS_IGEN_FLAGS)'
+ SIM_MIPS_IGEN_ITABLE_FLAGS='$(SIM_MIPS_SINGLE_FLAGS)'
AS_VAR_IF([SIM_MIPS_GEN], ["M16"], [AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [' $(SIM_MIPS_M16_FLAGS)'])])
])
-SIM_MIPS_IGEN_FLAGS="-F ${sim_mips_igen_filter} ${sim_mips_igen_machine}"
+SIM_MIPS_SINGLE_FLAGS="-F ${sim_mips_single_filter} ${sim_mips_single_machine}"
SIM_MIPS_M16_FLAGS="-F ${sim_mips_m16_filter} ${sim_mips_m16_machine}"
-AC_SUBST(SIM_MIPS_IGEN_FLAGS)
+AC_SUBST(SIM_MIPS_SINGLE_FLAGS)
AC_SUBST(SIM_MIPS_M16_FLAGS)
AC_SUBST(SIM_MIPS_GEN)
AC_SUBST(SIM_MIPS_IGEN_ITABLE_FLAGS)
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2022-12-27 5:39 [binutils-gdb] sim: mips: rename "igen" generation mode to "single" Michael Frysinger
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