From: John Baldwin <jhb@FreeBSD.org>
To: gdb-patches@sourceware.org
Cc: Aleksandar Paunovic <aleksandar.paunovic@intel.com>
Subject: [PATCH v4 12/13] gdbserver: Read offsets of the XSAVE extended region via CPUID
Date: Fri, 17 Mar 2023 18:09:04 -0700 [thread overview]
Message-ID: <20230318010905.14294-13-jhb@FreeBSD.org> (raw)
In-Reply-To: <20230318010905.14294-1-jhb@FreeBSD.org>
From: Aleksandar Paunovic <aleksandar.paunovic@intel.com>
The legacy region and the XSAVE header region are refactored to be a
part of a class. The extended region memory offsets are changed.
The offsets for XSAVE components AVX, MPX, BNDREGS, BNDCSR, AVX-512, PRKU
and AMX were previously hardcoded by having a fixed position within the
xsave structure. Memory offsets for these components is now computed by
adding the relevant offsets from xsave_layout.
SDM recommends to obtain memory offsets values only by calling CPUID
because they can change depending on the CPU mode.
Two functions: i387_xsave_to_cache and i387_cache_to_xsave are
refactored but the logic on how they deal with the XSAVE area remains
the same.
The two changed functions are called within all tests which runs
gdbserver.
Signed-off-by: Aleksandar Paunovic <aleksandar.paunovic@intel.com>
Co-authored-by: John Baldwin <jhb@FreeBSD.org>
---
gdbserver/i387-fp.cc | 275 +++++++++++++++++++++++++++----------------
1 file changed, 175 insertions(+), 100 deletions(-)
diff --git a/gdbserver/i387-fp.cc b/gdbserver/i387-fp.cc
index eaff47be3d8..462bed0e092 100644
--- a/gdbserver/i387-fp.cc
+++ b/gdbserver/i387-fp.cc
@@ -81,11 +81,11 @@ struct i387_fxsave {
unsigned char xmm_space[256];
};
-struct i387_xsave {
+struct xsave_fixed_addresses {
+ /* Size of i387_fxsave is 416 bytes. */
struct i387_fxsave fx;
unsigned char reserved1[48];
-
/* The extended control register 0 (the XFEATURE_ENABLED_MASK
register). */
unsigned long long xcr0;
@@ -95,34 +95,110 @@ struct i387_xsave {
/* The XSTATE_BV bit vector. */
unsigned long long xstate_bv;
- unsigned char reserved3[56];
+ /* The XCOMP_BV bit vector. */
+ unsigned long long xcomp_bv;
- /* Space for eight upper 128-bit YMM values, or 16 on x86-64. */
- unsigned char ymmh_space[256];
+ unsigned char reserved3[48];
- unsigned char reserved4[128];
+ /* Byte 576. End of registers with fixed position in XSAVE.
+ The position of other XSAVE registers will be calculated
+ from the appropriate CPUID calls. */
+};
- /* Space for 4 bound registers values of 128 bits. */
- unsigned char mpx_bnd_space[64];
+class i387_xsave {
+ /* Pointer to the legacy region of the XSAVE area. Legacy region
+ has fixed memory offsets. */
+ struct xsave_fixed_addresses *xsave_fixed = nullptr;
- /* Space for 2 MPX configuration registers of 64 bits
+ /* Pointer to the XSAVE area. The purpose of the pointer is to use it
+ as a base for calculating offsets of the extended region. For example:
+ avx_offset = xsave + CPUID_CALL_FOR (AVX); */
+ unsigned char *xsave = nullptr;
+
+public:
+ i387_xsave (const void *buf):
+ xsave_fixed {(struct xsave_fixed_addresses *) buf},
+ xsave {(unsigned char *) buf} {}
+
+ i387_fxsave* get_fxsave () const
+ {
+ return &xsave_fixed->fx;
+ }
+
+ /* Get a reference to xcr0 register. */
+ unsigned long long& xcr0 () const
+ {
+ return xsave_fixed->xcr0;
+ }
+
+ /* Get a reference to xstate_bv register. */
+ unsigned long long& xstate_bv () const
+ {
+ return xsave_fixed->xstate_bv;
+ }
+
+ /* Get a reference to xcomp_bv register. */
+ unsigned long long& xcomp_bv () const
+ {
+ return xsave_fixed->xcomp_bv;
+ }
+
+ /* Memory address of ST values. */
+ unsigned char* st_space () const
+ {
+ return &get_fxsave ()->st_space[0];
+ }
+
+ /* Memory address of XMM values. */
+ unsigned char* xmm_space () const
+ {
+ return &get_fxsave ()->xmm_space[0];
+ }
+
+ /* Memory address of eight upper 128-bit YMM values, or 16 on x86-64. */
+ unsigned char* ymmh_space () const
+ {
+ return xsave + xsave_layout.avx_offset;
+ }
+
+ /* Memory address of 4 bound registers values of 128 bits. */
+ unsigned char* mpx_bnd_space () const
+ {
+ return xsave + xsave_layout.bndregs_offset;
+ }
+
+ /* Memory address of 2 MPX configuration registers of 64 bits
plus reserved space. */
- unsigned char mpx_cfg_space[16];
+ unsigned char* mpx_cfg_space () const
+ {
+ return xsave + xsave_layout.bndcfg_offset;
+ }
- unsigned char reserved5[48];
+ /* Memory address of 8 OpMask register values of 64 bits. */
+ unsigned char* k_space () const
+ {
+ return xsave + xsave_layout.k_offset;
+ }
- /* Space for 8 OpMask register values of 64 bits. */
- unsigned char k_space[64];
+ /* Memory address of 16 256-bit zmm0-15. */
+ unsigned char* zmmh_low_space () const
+ {
+ return xsave + xsave_layout.zmm_h_offset;
+ }
- /* Space for 16 256-bit zmm0-15. */
- unsigned char zmmh_low_space[512];
+ /* Memory address of 16 512-bit zmm16-31 values. */
+ unsigned char* zmmh_high_space () const
+ {
+ return xsave + xsave_layout.zmm_offset;
+ }
- /* Space for 16 512-bit zmm16-31 values. */
- unsigned char zmmh_high_space[1024];
-
- /* Space for 1 32-bit PKRU register. The HW XSTATE size for this feature is
- actually 64 bits, but WRPKRU/RDPKRU instructions ignore upper 32 bits. */
- unsigned char pkru_space[8];
+ /* Memory address of 1 32-bit PKRU register. The HW XSTATE size for this
+ feature is actually 64 bits, but WRPKRU/RDPKRU instructions ignore upper
+ 32 bits. */
+ unsigned char* pkru_space () const
+ {
+ return xsave + xsave_layout.pkru_offset;
+ }
};
void
@@ -237,15 +313,14 @@ i387_cache_to_fxsave (struct regcache *regcache, void *buf)
void
i387_cache_to_xsave (struct regcache *regcache, void *buf)
{
- struct i387_xsave *fp = (struct i387_xsave *) buf;
+ i387_xsave fp {buf};
bool amd64 = register_size (regcache->tdesc, 0) == 8;
int i;
unsigned long val, val2;
unsigned long long xstate_bv = 0;
unsigned long long clear_bv = 0;
char raw[64];
- char *p;
-
+ unsigned char *p;
/* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
int num_xmm_registers = amd64 ? 16 : 8;
/* AVX512 extends the existing xmm/ymm registers to a wider mode: zmm. */
@@ -257,7 +332,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
/* The supported bits in `xstat_bv' are 8 bytes. Clear part in
vector registers if its bit in xstat_bv is zero. */
- clear_bv = (~fp->xstate_bv) & x86_xcr0;
+ clear_bv = (~fp.xstate_bv ()) & x86_xcr0;
/* Clear part in x87 and vector registers if its bit in xstat_bv is
zero. */
@@ -266,58 +341,59 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
if ((clear_bv & X86_XSTATE_X87))
{
for (i = 0; i < 8; i++)
- memset (((char *) &fp->fx.st_space[0]) + i * 16, 0, 10);
+ memset (fp.st_space () + i * 16, 0, 10);
- fp->fx.fioff = 0;
- fp->fx.fooff = 0;
- fp->fx.fctrl = I387_FCTRL_INIT_VAL;
- fp->fx.fstat = 0;
- fp->fx.ftag = 0;
- fp->fx.fiseg = 0;
- fp->fx.foseg = 0;
- fp->fx.fop = 0;
+ fp.get_fxsave ()->fioff = 0;
+ fp.get_fxsave ()->fooff = 0;
+ fp.get_fxsave ()->fctrl = I387_FCTRL_INIT_VAL;
+ fp.get_fxsave ()->fstat = 0;
+ fp.get_fxsave ()->ftag = 0;
+ fp.get_fxsave ()->fiseg = 0;
+ fp.get_fxsave ()->foseg = 0;
+ fp.get_fxsave ()->fop = 0;
}
if ((clear_bv & X86_XSTATE_SSE))
for (i = 0; i < num_xmm_registers; i++)
- memset (((char *) &fp->fx.xmm_space[0]) + i * 16, 0, 16);
+ memset (fp.xmm_space () + i * 16, 0, 16);
+
if ((clear_bv & X86_XSTATE_AVX))
for (i = 0; i < num_xmm_registers; i++)
- memset (((char *) &fp->ymmh_space[0]) + i * 16, 0, 16);
+ memset (fp.ymmh_space () + i * 16, 0, 16);
if ((clear_bv & X86_XSTATE_SSE) && (clear_bv & X86_XSTATE_AVX))
- memset (((char *) &fp->fx.mxcsr), 0, 4);
+ memset (((char *) &fp.get_fxsave ()->mxcsr), 0, 4);
if ((clear_bv & X86_XSTATE_BNDREGS))
for (i = 0; i < num_mpx_bnd_registers; i++)
- memset (((char *) &fp->mpx_bnd_space[0]) + i * 16, 0, 16);
+ memset (fp.mpx_bnd_space () + i * 16, 0, 16);
if ((clear_bv & X86_XSTATE_BNDCFG))
for (i = 0; i < num_mpx_cfg_registers; i++)
- memset (((char *) &fp->mpx_cfg_space[0]) + i * 8, 0, 8);
+ memset (fp.mpx_cfg_space () + i * 8, 0, 8);
if ((clear_bv & X86_XSTATE_K))
for (i = 0; i < num_avx512_k_registers; i++)
- memset (((char *) &fp->k_space[0]) + i * 8, 0, 8);
+ memset (fp.k_space () + i * 8, 0, 8);
if ((clear_bv & X86_XSTATE_ZMM_H))
for (i = 0; i < num_avx512_zmmh_low_registers; i++)
- memset (((char *) &fp->zmmh_low_space[0]) + i * 32, 0, 32);
+ memset (fp.zmmh_low_space () + i * 32, 0, 32);
if ((clear_bv & X86_XSTATE_ZMM))
{
for (i = 0; i < num_avx512_zmmh_high_registers; i++)
- memset (((char *) &fp->zmmh_low_space[0]) + 32 + i * 64, 0, 32);
+ memset (fp.zmmh_low_space () + 32 + i * 64, 0, 32);
for (i = 0; i < num_avx512_xmm_registers; i++)
- memset (((char *) &fp->zmmh_high_space[0]) + i * 64, 0, 16);
+ memset (fp.zmmh_high_space () + i * 64, 0, 16);
for (i = 0; i < num_avx512_ymmh_registers; i++)
- memset (((char *) &fp->zmmh_high_space[0]) + 16 + i * 64, 0, 16);
+ memset (fp.zmmh_high_space () + 16 + i * 64, 0, 16);
}
if ((clear_bv & X86_XSTATE_PKRU))
for (i = 0; i < num_pkeys_registers; i++)
- memset (((char *) &fp->pkru_space[0]) + i * 4, 0, 4);
+ memset (fp.pkru_space () + i * 4, 0, 4);
}
/* Check if any x87 registers are changed. */
@@ -328,7 +404,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
for (i = 0; i < 8; i++)
{
collect_register (regcache, i + st0_regnum, raw);
- p = ((char *) &fp->fx.st_space[0]) + i * 16;
+ p = fp.st_space () + i * 16;
if (memcmp (raw, p, 10))
{
xstate_bv |= X86_XSTATE_X87;
@@ -345,7 +421,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
for (i = 0; i < num_xmm_registers; i++)
{
collect_register (regcache, i + xmm0_regnum, raw);
- p = ((char *) &fp->fx.xmm_space[0]) + i * 16;
+ p = fp.xmm_space () + i * 16;
if (memcmp (raw, p, 16))
{
xstate_bv |= X86_XSTATE_SSE;
@@ -362,7 +438,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
for (i = 0; i < num_xmm_registers; i++)
{
collect_register (regcache, i + ymm0h_regnum, raw);
- p = ((char *) &fp->ymmh_space[0]) + i * 16;
+ p = fp.ymmh_space () + i * 16;
if (memcmp (raw, p, 16))
{
xstate_bv |= X86_XSTATE_AVX;
@@ -379,7 +455,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
for (i = 0; i < num_mpx_bnd_registers; i++)
{
collect_register (regcache, i + bnd0r_regnum, raw);
- p = ((char *) &fp->mpx_bnd_space[0]) + i * 16;
+ p = fp.mpx_bnd_space () + i * 16;
if (memcmp (raw, p, 16))
{
xstate_bv |= X86_XSTATE_BNDREGS;
@@ -396,7 +472,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
for (i = 0; i < num_mpx_cfg_registers; i++)
{
collect_register (regcache, i + bndcfg_regnum, raw);
- p = ((char *) &fp->mpx_cfg_space[0]) + i * 8;
+ p = fp.mpx_cfg_space () + i * 8;
if (memcmp (raw, p, 8))
{
xstate_bv |= X86_XSTATE_BNDCFG;
@@ -413,7 +489,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
for (i = 0; i < num_avx512_k_registers; i++)
{
collect_register (regcache, i + k0_regnum, raw);
- p = ((char *) &fp->k_space[0]) + i * 8;
+ p = fp.k_space () + i * 8;
if (memcmp (raw, p, 8) != 0)
{
xstate_bv |= X86_XSTATE_K;
@@ -430,7 +506,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
for (i = 0; i < num_avx512_zmmh_low_registers; i++)
{
collect_register (regcache, i + zmm0h_regnum, raw);
- p = ((char *) &fp->zmmh_low_space[0]) + i * 32;
+ p = fp.zmmh_low_space () + i * 32;
if (memcmp (raw, p, 32) != 0)
{
xstate_bv |= X86_XSTATE_ZMM_H;
@@ -449,7 +525,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
for (i = 0; i < num_avx512_zmmh_high_registers; i++)
{
collect_register (regcache, i + zmm16h_regnum, raw);
- p = ((char *) &fp->zmmh_high_space[0]) + 32 + i * 64;
+ p = fp.zmmh_high_space () + 32 + i * 64;
if (memcmp (raw, p, 32) != 0)
{
xstate_bv |= X86_XSTATE_ZMM;
@@ -468,7 +544,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
for (i = 0; i < num_avx512_xmm_registers; i++)
{
collect_register (regcache, i + xmm_avx512_regnum, raw);
- p = ((char *) &fp->zmmh_high_space[0]) + i * 64;
+ p = fp.zmmh_high_space () + i * 64;
if (memcmp (raw, p, 16) != 0)
{
xstate_bv |= X86_XSTATE_ZMM;
@@ -487,7 +563,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
for (i = 0; i < num_avx512_ymmh_registers; i++)
{
collect_register (regcache, i + ymmh_avx512_regnum, raw);
- p = ((char *) &fp->zmmh_high_space[0]) + 16 + i * 64;
+ p = fp.zmmh_high_space () + 16 + i * 64;
if (memcmp (raw, p, 16) != 0)
{
xstate_bv |= X86_XSTATE_ZMM;
@@ -504,7 +580,7 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
for (i = 0; i < num_pkeys_registers; i++)
{
collect_register (regcache, i + pkru_regnum, raw);
- p = ((char *) &fp->pkru_space[0]) + i * 4;
+ p = fp.pkru_space () + i * 4;
if (memcmp (raw, p, 4) != 0)
{
xstate_bv |= X86_XSTATE_PKRU;
@@ -516,53 +592,53 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
if ((x86_xcr0 & X86_XSTATE_SSE) || (x86_xcr0 & X86_XSTATE_AVX))
{
collect_register_by_name (regcache, "mxcsr", raw);
- if (memcmp (raw, &fp->fx.mxcsr, 4) != 0)
+ if (memcmp (raw, &fp.get_fxsave ()->mxcsr, 4) != 0)
{
- if (((fp->xstate_bv | xstate_bv)
+ if (((fp.xstate_bv () | xstate_bv)
& (X86_XSTATE_SSE | X86_XSTATE_AVX)) == 0)
xstate_bv |= X86_XSTATE_SSE;
- memcpy (&fp->fx.mxcsr, raw, 4);
+ memcpy (&fp.get_fxsave ()->mxcsr, raw, 4);
}
}
if (x86_xcr0 & X86_XSTATE_X87)
{
collect_register_by_name (regcache, "fioff", raw);
- if (memcmp (raw, &fp->fx.fioff, 4) != 0)
+ if (memcmp (raw, &fp.get_fxsave ()->fioff, 4) != 0)
{
xstate_bv |= X86_XSTATE_X87;
- memcpy (&fp->fx.fioff, raw, 4);
+ memcpy (&fp.get_fxsave ()->fioff, raw, 4);
}
collect_register_by_name (regcache, "fooff", raw);
- if (memcmp (raw, &fp->fx.fooff, 4) != 0)
+ if (memcmp (raw, &fp.get_fxsave ()->fooff, 4) != 0)
{
xstate_bv |= X86_XSTATE_X87;
- memcpy (&fp->fx.fooff, raw, 4);
+ memcpy (&fp.get_fxsave ()->fooff, raw, 4);
}
/* This one's 11 bits... */
val2 = regcache_raw_get_unsigned_by_name (regcache, "fop");
- val2 = (val2 & 0x7FF) | (fp->fx.fop & 0xF800);
- if (fp->fx.fop != val2)
+ val2 = (val2 & 0x7FF) | (fp.get_fxsave ()->fop & 0xF800);
+ if (fp.get_fxsave ()->fop != val2)
{
xstate_bv |= X86_XSTATE_X87;
- fp->fx.fop = val2;
+ fp.get_fxsave ()->fop = val2;
}
/* Some registers are 16-bit. */
val = regcache_raw_get_unsigned_by_name (regcache, "fctrl");
- if (fp->fx.fctrl != val)
+ if (fp.get_fxsave ()->fctrl != val)
{
xstate_bv |= X86_XSTATE_X87;
- fp->fx.fctrl = val;
+ fp.get_fxsave ()->fctrl = val;
}
val = regcache_raw_get_unsigned_by_name (regcache, "fstat");
- if (fp->fx.fstat != val)
+ if (fp.get_fxsave ()->fstat != val)
{
xstate_bv |= X86_XSTATE_X87;
- fp->fx.fstat = val;
+ fp.get_fxsave ()->fstat = val;
}
/* Convert to the simplifed tag form stored in fxsave data. */
@@ -575,30 +651,30 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
if (tag != 3)
val2 |= (1 << i);
}
- if (fp->fx.ftag != val2)
+ if (fp.get_fxsave ()->ftag != val2)
{
xstate_bv |= X86_XSTATE_X87;
- fp->fx.ftag = val2;
+ fp.get_fxsave ()->ftag = val2;
}
val = regcache_raw_get_unsigned_by_name (regcache, "fiseg");
- if (fp->fx.fiseg != val)
+ if (fp.get_fxsave ()->fiseg != val)
{
xstate_bv |= X86_XSTATE_X87;
- fp->fx.fiseg = val;
+ fp.get_fxsave ()->fiseg = val;
}
val = regcache_raw_get_unsigned_by_name (regcache, "foseg");
- if (fp->fx.foseg != val)
+ if (fp.get_fxsave ()->foseg != val)
{
xstate_bv |= X86_XSTATE_X87;
- fp->fx.foseg = val;
+ fp.get_fxsave ()->foseg = val;
}
}
/* Update the corresponding bits in xstate_bv if any SSE/AVX
registers are changed. */
- fp->xstate_bv |= xstate_bv;
+ fp.xstate_bv () |= xstate_bv;
}
static int
@@ -704,8 +780,7 @@ i387_fxsave_to_cache (struct regcache *regcache, const void *buf)
void
i387_xsave_to_cache (struct regcache *regcache, const void *buf)
{
- struct i387_xsave *fp = (struct i387_xsave *) buf;
- struct i387_fxsave *fxp = (struct i387_fxsave *) buf;
+ i387_xsave fp {buf};
bool amd64 = register_size (regcache->tdesc, 0) == 8;
int i, top;
unsigned long val;
@@ -723,7 +798,7 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
/* The supported bits in `xstat_bv' are 8 bytes. Clear part in
vector registers if its bit in xstat_bv is zero. */
- clear_bv = (~fp->xstate_bv) & x86_xcr0;
+ clear_bv = (~fp.xstate_bv ()) & x86_xcr0;
/* Check if any x87 registers are changed. */
if ((x86_xcr0 & X86_XSTATE_X87) != 0)
@@ -737,7 +812,7 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
else
{
- p = (gdb_byte *) &fp->fx.st_space[0];
+ p = fp.st_space ();
for (i = 0; i < 8; i++)
supply_register (regcache, i + st0_regnum, p + i * 16);
}
@@ -754,7 +829,7 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
else
{
- p = (gdb_byte *) &fp->fx.xmm_space[0];
+ p = fp.xmm_space ();
for (i = 0; i < num_xmm_registers; i++)
supply_register (regcache, i + xmm0_regnum, p + i * 16);
}
@@ -771,7 +846,7 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
else
{
- p = (gdb_byte *) &fp->ymmh_space[0];
+ p = fp.ymmh_space ();
for (i = 0; i < num_xmm_registers; i++)
supply_register (regcache, i + ymm0h_regnum, p + i * 16);
}
@@ -789,7 +864,7 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
else
{
- p = (gdb_byte *) &fp->mpx_bnd_space[0];
+ p = fp.mpx_bnd_space ();
for (i = 0; i < num_mpx_bnd_registers; i++)
supply_register (regcache, i + bnd0r_regnum, p + i * 16);
}
@@ -807,7 +882,7 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
else
{
- p = (gdb_byte *) &fp->mpx_cfg_space[0];
+ p = fp.mpx_cfg_space ();
for (i = 0; i < num_mpx_cfg_registers; i++)
supply_register (regcache, i + bndcfg_regnum, p + i * 8);
}
@@ -824,7 +899,7 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
else
{
- p = (gdb_byte *) &fp->k_space[0];
+ p = fp.k_space ();
for (i = 0; i < num_avx512_k_registers; i++)
supply_register (regcache, i + k0_regnum, p + i * 8);
}
@@ -841,7 +916,7 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
else
{
- p = (gdb_byte *) &fp->zmmh_low_space[0];
+ p = fp.zmmh_low_space ();
for (i = 0; i < num_avx512_zmmh_low_registers; i++)
supply_register (regcache, i + zmm0h_regnum, p + i * 32);
}
@@ -870,7 +945,7 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
else
{
- p = (gdb_byte *) &fp->zmmh_high_space[0];
+ p = fp.zmmh_high_space ();
for (i = 0; i < num_avx512_zmmh_high_registers; i++)
supply_register (regcache, i + zmm16h_regnum, p + 32 + i * 64);
for (i = 0; i < num_avx512_ymmh_registers; i++)
@@ -891,7 +966,7 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
else
{
- p = (gdb_byte *) &fp->pkru_space[0];
+ p = fp.pkru_space ();
for (i = 0; i < num_pkeys_registers; i++)
supply_register (regcache, i + pkru_regnum, p + i * 4);
}
@@ -904,7 +979,7 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
supply_register_by_name (regcache, "mxcsr", &default_mxcsr);
}
else
- supply_register_by_name (regcache, "mxcsr", &fp->fx.mxcsr);
+ supply_register_by_name (regcache, "mxcsr", &fp.get_fxsave ()->mxcsr);
if ((clear_bv & X86_XSTATE_X87) != 0)
{
@@ -925,37 +1000,37 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
}
else
{
- supply_register_by_name (regcache, "fioff", &fp->fx.fioff);
- supply_register_by_name (regcache, "fooff", &fp->fx.fooff);
+ supply_register_by_name (regcache, "fioff", &fp.get_fxsave ()->fioff);
+ supply_register_by_name (regcache, "fooff", &fp.get_fxsave ()->fooff);
/* Some registers are 16-bit. */
- val = fp->fx.fctrl & 0xFFFF;
+ val = fp.get_fxsave ()->fctrl & 0xFFFF;
supply_register_by_name (regcache, "fctrl", &val);
- val = fp->fx.fstat & 0xFFFF;
+ val = fp.get_fxsave ()->fstat & 0xFFFF;
supply_register_by_name (regcache, "fstat", &val);
/* Generate the form of ftag data that GDB expects. */
- top = (fp->fx.fstat >> 11) & 0x7;
+ top = (fp.get_fxsave ()->fstat >> 11) & 0x7;
val = 0;
for (i = 7; i >= 0; i--)
{
int tag;
- if (fp->fx.ftag & (1 << i))
- tag = i387_ftag (fxp, (i + 8 - top) % 8);
+ if (fp.get_fxsave ()->ftag & (1 << i))
+ tag = i387_ftag (fp.get_fxsave (), (i + 8 - top) % 8);
else
tag = 3;
val |= tag << (2 * i);
}
supply_register_by_name (regcache, "ftag", &val);
- val = fp->fx.fiseg & 0xFFFF;
+ val = fp.get_fxsave ()->fiseg & 0xFFFF;
supply_register_by_name (regcache, "fiseg", &val);
- val = fp->fx.foseg & 0xFFFF;
+ val = fp.get_fxsave ()->foseg & 0xFFFF;
supply_register_by_name (regcache, "foseg", &val);
- val = (fp->fx.fop) & 0x7FF;
+ val = (fp.get_fxsave ()->fop) & 0x7FF;
supply_register_by_name (regcache, "fop", &val);
}
}
--
2.39.1
next prev parent reply other threads:[~2023-03-18 1:09 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-18 1:08 [PATCH v4 00/13] Handle variable XSAVE layouts John Baldwin
2023-03-18 1:08 ` [PATCH v4 01/13] x86: Add an x86_xsave_layout structure to handle " John Baldwin
2023-03-28 11:35 ` George, Jini Susan
2023-04-10 19:28 ` John Baldwin
2023-04-06 19:09 ` Simon Marchi
2023-04-10 20:03 ` John Baldwin
2023-04-11 1:19 ` Simon Marchi
2023-04-11 14:23 ` Pedro Alves
2023-04-11 16:02 ` John Baldwin
2023-03-18 1:08 ` [PATCH v4 02/13] core: Support fetching TARGET_OBJECT_X86_XSAVE_LAYOUT from architectures John Baldwin
2023-04-06 19:28 ` Simon Marchi
2023-04-10 20:42 ` John Baldwin
2023-04-11 1:49 ` Simon Marchi
2023-04-11 16:06 ` John Baldwin
2023-04-11 16:21 ` Simon Marchi
2023-04-11 23:59 ` John Baldwin
2023-03-18 1:08 ` [PATCH v4 03/13] nat/x86-cpuid.h: Add x86_cpuid_count wrapper around __get_cpuid_count John Baldwin
2023-04-06 19:33 ` Simon Marchi
2023-04-10 20:49 ` John Baldwin
2023-04-11 1:49 ` Simon Marchi
2023-03-18 1:08 ` [PATCH v4 04/13] x86 nat: Add helper functions to save the XSAVE layout for the host John Baldwin
2023-04-06 19:40 ` Simon Marchi
2023-04-10 21:00 ` John Baldwin
2023-04-11 1:51 ` Simon Marchi
2023-03-18 1:08 ` [PATCH v4 05/13] gdb: Update x86 FreeBSD architectures to support XSAVE layouts John Baldwin
2023-04-06 19:54 ` Simon Marchi
2023-04-10 21:02 ` John Baldwin
2023-04-11 1:55 ` Simon Marchi
2023-03-18 1:08 ` [PATCH v4 06/13] gdb: Support XSAVE layouts for the current host in the FreeBSD x86 targets John Baldwin
2023-04-06 20:18 ` Simon Marchi
2023-04-10 21:27 ` John Baldwin
2023-04-11 2:23 ` Simon Marchi
2023-04-11 16:19 ` John Baldwin
2023-04-11 16:46 ` Simon Marchi
2023-04-11 21:37 ` John Baldwin
2023-04-11 22:35 ` John Baldwin
2023-04-12 14:35 ` Simon Marchi
2023-03-18 1:08 ` [PATCH v4 07/13] gdb: Update x86 Linux architectures to support XSAVE layouts John Baldwin
2023-04-07 1:43 ` Simon Marchi
2023-04-10 21:29 ` John Baldwin
2023-03-18 1:09 ` [PATCH v4 08/13] gdb: Support XSAVE layouts for the current host in the Linux x86 targets John Baldwin
2023-04-07 1:54 ` Simon Marchi
2023-03-18 1:09 ` [PATCH v4 09/13] gdb: Use x86_xstate_layout to parse the XSAVE extended state area John Baldwin
2023-04-07 2:13 ` Simon Marchi
2023-04-10 21:40 ` John Baldwin
2023-03-18 1:09 ` [PATCH v4 10/13] gdbserver: Add a function to set the XSAVE mask and size John Baldwin
2023-04-12 15:08 ` Simon Marchi
2023-04-27 17:24 ` John Baldwin
2023-03-18 1:09 ` [PATCH v4 11/13] gdbserver: Refactor the legacy region within the xsave struct John Baldwin
2023-04-12 18:34 ` Simon Marchi
2023-04-27 19:51 ` John Baldwin
2023-03-18 1:09 ` John Baldwin [this message]
2023-04-11 14:46 ` [PATCH v4 12/13] gdbserver: Read offsets of the XSAVE extended region via CPUID Pedro Alves
2023-04-11 16:25 ` John Baldwin
2023-04-12 19:11 ` Simon Marchi
2023-04-12 21:07 ` John Baldwin
2023-04-13 15:07 ` Simon Marchi
2023-03-18 1:09 ` [PATCH v4 13/13] x86: Remove X86_XSTATE_SIZE and related constants John Baldwin
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