[PATCH 2/2] gdb/doc: describe x87 registers

[Simon Marchi <simon.marchi@efficios.com>]

While investigating this [1], I initially had no idea what register
"fioff" stood for, making it difficult to map it to something in the
Intel or AMD manuals.  Similarly, I can imaging someone familiar with
x87 to want to print the "x87 last instruction address", and have no
clue that GDB makes it available as register "fioff".  The names of the
x87 state fields don't seem to be standardized, they even change between
sections of the Intel manual (between the FSAVE, FXSAVE and XSAVE area
descriptions).

Add some details to the doc to help one map GDB register names to x87
state fields.

[1] https://inbox.sourceware.org/gdb-patches/20230908022722.430741-1-simon.marchi@efficios.com/T/#u

Change-Id: I0ea1eb648358e62da4aa87eea3515ee8a09f2762
---
 gdb/doc/gdb.texinfo | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 72083fc5b64f..90d928fb295d 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -26310,6 +26310,25 @@ At this last step the value of bnd0 can be changed for investigation of bound
 violations caused along the execution of the call.  In order to know how to
 set the bound registers or bound table for the call consult the ABI.
 
+@subsubsection x87 registers
+
+GDB provides access to the x87 state through the following registers:
+
+@itemize
+
+@item @code{$st0} to @code{st7}: @code{ST(0)} to @code{ST(7)} floating-point
+registers
+@item @code{$fctrl}: control word register (@code{FCW})
+@item @code{$fstat}: status word register (@code{FSW})
+@item @code{$ftag}: tag word (@code{FTW})
+@item @code{$fiseg}: last instruction pointer segment
+@item @code{$fioff}: last instruction pointer
+@item @code{$foseg}: last data pointer segment
+@item @code{$fooff}: last data pointer
+@item @code{$fop}: last opcode
+
+@end itemize
+
 @node Alpha
 @subsection Alpha
 
-- 
2.42.0