[Ping] [PATCH 0/4] Add AMX support.

[Ping] [PATCH 0/4] Add AMX support.

[Willgerodt, Felix]

*Ping*

I have adapted all of Eli's comments on documentation locally.
They were all straightforward, so I didn't post a v2 for those yet.

Regards,
Felix

> -----Original Message-----
> From: Willgerodt, Felix <felix.willgerodt@intel.com>
> Sent: Freitag, 6. Mai 2022 14:12
> To: gdb-patches@sourceware.org
> Cc: Willgerodt, Felix <felix.willgerodt@intel.com>
> Subject: [PATCH 0/4] Add AMX support.
> 
> Hi all,
> 
> This is a series to add support for the new Advanced Matrix Extensions
> (AMX)
> on x86 architectures. They add new registers that require modeling
> in GDB and gdbserver.
> 
> Happy about any feedback!
> 
> Regards,
> Felix
> 
> Aleksandar Paunovic (1):
>   gdb: define int512 and uint512 as built-in types.
> 
> Felix Willgerodt (3):
>   gdb, gdbserver: Add AMX registers.
>   gdb, gdbserver: Allocate only a sane amount of buffer when fetching
>     registers.
>   gdb: Clear tilecfg.start_row for any PC modification.
> 
>  gdb/amd64-linux-nat.c                         |   2 +
>  gdb/amd64-linux-tdep.c                        |  36 +-
>  gdb/amd64-tdep.c                              | 214 +++++++++++-
>  gdb/amd64-tdep.h                              |   2 +
>  gdb/arch/amd64.c                              |   4 +
>  gdb/doc/gdb.texinfo                           |  44 +++
>  gdb/features/Makefile                         |   1 +
>  gdb/features/i386/64bit-amx.c                 |  60 ++++
>  gdb/features/i386/64bit-amx.xml               |  36 ++
>  gdb/gdbtypes.c                                |   4 +
>  gdb/gdbtypes.h                                |   2 +
>  gdb/i386-linux-tdep.c                         |   2 +
>  gdb/i386-linux-tdep.h                         |   2 +-
>  gdb/i386-tdep.c                               | 321 +++++++++++++++++-
>  gdb/i386-tdep.h                               | 122 ++++++-
>  gdb/i387-tdep.c                               | 156 ++++++++-
>  gdb/i387-tdep.h                               |   8 +
>  gdb/target-descriptions.c                     |   6 +
>  gdb/testsuite/gdb.arch/amd64-amx-corefile.exp | 113 ++++++
>  gdb/testsuite/gdb.arch/amd64-amx-startrow.c   | 122 +++++++
>  gdb/testsuite/gdb.arch/amd64-amx-startrow.exp |  91 +++++
>  gdb/testsuite/gdb.arch/amd64-amx.c            | 173 ++++++++++
>  gdb/testsuite/gdb.arch/amd64-amx.exp          | 231 +++++++++++++
>  gdb/testsuite/lib/gdb.exp                     |  67 ++++
>  gdbserver/i387-fp.cc                          |  70 +++-
>  gdbserver/linux-amd64-ipa.cc                  |   2 +-
>  gdbserver/linux-i386-ipa.cc                   |   2 +-
>  gdbserver/linux-x86-low.cc                    |   4 +-
>  gdbserver/linux-x86-tdesc.cc                  |   3 +
>  gdbserver/linux-x86-tdesc.h                   |   3 +-
>  gdbserver/server.h                            |   2 +-
>  gdbsupport/tdesc.cc                           |   2 +
>  gdbsupport/tdesc.h                            |   2 +
>  gdbsupport/x86-xstate.h                       |  33 +-
>  34 files changed, 1901 insertions(+), 41 deletions(-)
>  create mode 100644 gdb/features/i386/64bit-amx.c
>  create mode 100644 gdb/features/i386/64bit-amx.xml
>  create mode 100644 gdb/testsuite/gdb.arch/amd64-amx-corefile.exp
>  create mode 100644 gdb/testsuite/gdb.arch/amd64-amx-startrow.c
>  create mode 100755 gdb/testsuite/gdb.arch/amd64-amx-startrow.exp
>  create mode 100644 gdb/testsuite/gdb.arch/amd64-amx.c
>  create mode 100755 gdb/testsuite/gdb.arch/amd64-amx.exp
> 
> --
> 2.34.1

Intel Deutschland GmbH
Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de <http://www.intel.de>
Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva  
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928

Re: [Ping] [PATCH 0/4] Add AMX support.

[John Baldwin]

On 5/20/22 7:40 AM, Willgerodt, Felix via Gdb-patches wrote:
> *Ping*
> 
> I have adapted all of Eli's comments on documentation locally.
> They were all straightforward, so I didn't post a v2 for those yet.

I don't have any further feedback.  I will say that I think it's fine to not
support dynamic tile sizes.  I think the aarch64 arch in GDB uses the same
approach with respect to SVE which is to say that the SVE vector size
is fixed for a given process' lifetime (or something along those lines).

-- 
John Baldwin

RE: [Ping] [PATCH 0/4] Add AMX support.

[Willgerodt, Felix]

> -----Original Message-----
> From: John Baldwin <jhb@FreeBSD.org>
> Sent: Freitag, 20. Mai 2022 18:29
> To: Willgerodt, Felix <felix.willgerodt@intel.com>; gdb-
> patches@sourceware.org
> Subject: Re: [Ping] [PATCH 0/4] Add AMX support.
> 
> On 5/20/22 7:40 AM, Willgerodt, Felix via Gdb-patches wrote:
> > *Ping*
> >
> > I have adapted all of Eli's comments on documentation locally.
> > They were all straightforward, so I didn't post a v2 for those yet.
> 
> I don't have any further feedback.  I will say that I think it's fine to not
> support dynamic tile sizes.  I think the aarch64 arch in GDB uses the same
> approach with respect to SVE which is to say that the SVE vector size
> is fixed for a given process' lifetime (or something along those lines).
> 

I couldn't try SVE myself, but it seems like SVE is actually updated at each
BP, at least for native Linux GDB targets,
see aarch64_linux_nat_target::thread_architecture().

We tried implementing it that way as well, but the gdbserver
infrastructure to handle target description updates doesn't really exist.

That said, I don't think a fixed AMX dimension would provide a good
user experience though. Neither in the case of showing the whole
register nor when using a fixed dimension for a process' lifetime.

Regards,
Felix 
Intel Deutschland GmbH
Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de <http://www.intel.de>
Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva  
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928

Re: [Ping] [PATCH 0/4] Add AMX support.

[Luis Machado]

On 5/20/22 17:29, John Baldwin wrote:
> On 5/20/22 7:40 AM, Willgerodt, Felix via Gdb-patches wrote:
>> *Ping*
>>
>> I have adapted all of Eli's comments on documentation locally.
>> They were all straightforward, so I didn't post a v2 for those yet.
> 
> I don't have any further feedback.  I will say that I think it's fine to not
> support dynamic tile sizes.  I think the aarch64 arch in GDB uses the same
> approach with respect to SVE which is to say that the SVE vector size
> is fixed for a given process' lifetime (or something along those lines).
> 

Actually, it can be changed mid-execution for each thread, and native GDB supports that.

Unfortunately we lack the proper RSP extension to support a remote target changing
the vector length mid-execution.

It is mostly a matter of updating the thread's architecture description when the change
happens, but it tends to be an uncommon scenario.

Re: [Ping] [PATCH 0/4] Add AMX support.

[Luis Machado]

On 5/25/22 10:14, Willgerodt, Felix via Gdb-patches wrote:
>> -----Original Message-----
>> From: John Baldwin <jhb@FreeBSD.org>
>> Sent: Freitag, 20. Mai 2022 18:29
>> To: Willgerodt, Felix <felix.willgerodt@intel.com>; gdb-
>> patches@sourceware.org
>> Subject: Re: [Ping] [PATCH 0/4] Add AMX support.
>>
>> On 5/20/22 7:40 AM, Willgerodt, Felix via Gdb-patches wrote:
>>> *Ping*
>>>
>>> I have adapted all of Eli's comments on documentation locally.
>>> They were all straightforward, so I didn't post a v2 for those yet.
>>
>> I don't have any further feedback.  I will say that I think it's fine to not
>> support dynamic tile sizes.  I think the aarch64 arch in GDB uses the same
>> approach with respect to SVE which is to say that the SVE vector size
>> is fixed for a given process' lifetime (or something along those lines).
>>
> 
> I couldn't try SVE myself, but it seems like SVE is actually updated at each
> BP, at least for native Linux GDB targets,
> see aarch64_linux_nat_target::thread_architecture().
> 
> We tried implementing it that way as well, but the gdbserver
> infrastructure to handle target description updates doesn't really exist.

That is the main barrier for supporting vector/matrix length updates mid-execution for remote targets.

There was some early discussions here: https://sourceware.org/pipermail/gdb/2020-January/048274.html

But there wasn't much consensus on the best way to do it.

Ideally we'd have a proper sizeless type to describe the scalable vector/matrix, based on a dynamic
property (a register, for example). But that requires many more changes.

> 
> That said, I don't think a fixed AMX dimension would provide a good
> user experience though. Neither in the case of showing the whole
> register nor when using a fixed dimension for a process' lifetime.> 
> Regards,
> Felix
> Intel Deutschland GmbH
> Registered Address: Am Campeon 10, 85579 Neubiberg, Germany
> Tel: +49 89 99 8853-0, www.intel.de <http://www.intel.de>
> Managing Directors: Christin Eisenschmid, Sharon Heck, Tiffany Doon Silva
> Chairperson of the Supervisory Board: Nicole Lau
> Registered Office: Munich
> Commercial Register: Amtsgericht Muenchen HRB 186928