Re: [PATCH v4 14/16] [gdb/aarch64] sme: Core file support for Linux

[Thiago Jung Bauermann <thiago.bauermann@linaro.org>]

Hello Luis,

Just one minor comment:

Luis Machado <luis.machado@arm.com> writes:

> +/* Collect an inactive SVE register set state.  This is equivalent to a
> +   fpsimd layout.
> +
> +   Collect the data from REGCACHE to BUF, using the register
> +   map in REGSET.  */
> +
> +static void
> +collect_inactive_sve_regset (const struct regcache *regcache,
> +			     void *buf, size_t size, int vg_regnum)
> +{
> +  gdb_byte *header = (gdb_byte *) buf;
> +  struct gdbarch *gdbarch = regcache->arch ();
> +  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
> +
> +  gdb_assert (buf != nullptr);
> +  gdb_assert (size >= SVE_CORE_DUMMY_SIZE);
> +
> +  /* Zero out everything first.  */
> +  memset ((gdb_byte *) buf, 0, SVE_CORE_DUMMY_SIZE);
> +
> +  /* BUF starts with a SVE header prior to the register dump.  */
> +
> +  /* Dump the default size of an empty SVE payload.  */
> +  uint32_t real_size = SVE_CORE_DUMMY_SIZE;
> +  store_unsigned_integer (header + SVE_HEADER_SIZE_OFFSET,
> +			  SVE_HEADER_SIZE_LENGTH, byte_order, real_size);
> +
> +  /* Dump a dummy max size.  */
> +  uint32_t max_size = SVE_CORE_DUMMY_MAX_SIZE;
> +  store_unsigned_integer (header + SVE_HEADER_MAX_SIZE_OFFSET,
> +			  SVE_HEADER_MAX_SIZE_LENGTH, byte_order, max_size);
> +
> +  /* Dump the vector length.  */
> +  ULONGEST vg = 0;
> +  regcache->raw_collect (vg_regnum, &vg);
> +  uint16_t vl = sve_vl_from_vg (vg);
> +  store_unsigned_integer (header + SVE_HEADER_VL_OFFSET, SVE_HEADER_VL_LENGTH,
> +			  byte_order, vl);
> +
> +  /* Dump the standard maximum vector length.  */
> +  uint16_t max_vl = SVE_CORE_DUMMY_MAX_VL;
> +  store_unsigned_integer (header + SVE_HEADER_MAX_VL_OFFSET,
> +			  SVE_HEADER_MAX_VL_LENGTH, byte_order,
> +			  max_vl);
> +
> +  /* The rest of the fields are zero.  */
> +  uint16_t flags = SVE_CORE_DUMMY_FLAGS;
> +  store_unsigned_integer (header + SVE_HEADER_FLAGS_OFFSET,
> +			  SVE_HEADER_FLAGS_LENGTH, byte_order,
> +			  flags);
> +  uint16_t reserved = SVE_CORE_DUMMY_RESERVED;
> +  store_unsigned_integer (header + SVE_HEADER_RESERVED_OFFSET,
> +			  SVE_HEADER_RESERVED_LENGTH, byte_order, reserved);
> +
> +  /* We are done with the header part of it.  Now dump the register state
> +     in the FPSIMD format.  */
> +
> +  /* Dump the first 128 bits of each of the Z registers.  */
> +  header += AARCH64_SVE_CONTEXT_REGS_OFFSET;
> +  for (int i = 0; i < AARCH64_SVE_Z_REGS_NUM; i++)
> +    regcache->raw_collect_part (AARCH64_SVE_Z0_REGNUM + i, 0, V_REGISTER_SIZE,
> +				header + V_REGISTER_SIZE * i);
> +
> +  /* Dump FPSR and FPCR.  */
> +  header += 32 * V_REGISTER_SIZE;
> +  regcache->raw_collect (AARCH64_FPSR_REGNUM, header);
> +  header += 4;
> +  regcache->raw_collect (AARCH64_FPCR_REGNUM, header);
> +
> +  /* Dump two reserved empty fields of 4 bytes.  */
> +  header += 8;

Sorry, I missed this on my previous review: the header adjustment
position above looks a bit strange. Shouldn't the two reserved fields
come right after FPCR, instead of having a 4-byte gap?

> +  memset (header, 0, 8);
> +
> +  /* We should have a FPSIMD-formatted register dump now.  */
> +}

-- 
Thiago