[PATCH] sim: riscv: Make stack 16-byte aligned

[Bernd Edlinger <bernd.edlinger@hotmail.de>]

Various gcc test cases fail due to the stack
alignment of 16 bytes is expected by gcc,
causing issues mostly with vararg functinos;
e.g.

FAIL: gcc.c-torture/execute/nest-align-1.c   -O0  execution test
FAIL: gcc.c-torture/execute/nest-stdar-1.c   -O0  execution test
FAIL: gcc.c-torture/execute/va-arg-12.c   -O0  execution test
FAIL: gcc.c-torture/execute/va-arg-15.c   -O0  execution test
FAIL: gcc.c-torture/execute/va-arg-16.c   -O0  execution test
FAIL: gcc.c-torture/execute/va-arg-17.c   -O0  execution test
FAIL: gcc.c-torture/execute/va-arg-20.c   -O0  execution test
FAIL: gcc.c-torture/execute/va-arg-26.c   -O0  execution test
...
---
 sim/riscv/sim-main.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
index 4e3672505c6..0876d455570 100644
--- a/sim/riscv/sim-main.c
+++ b/sim/riscv/sim-main.c
@@ -1586,6 +1586,8 @@ initialize_env (SIM_DESC sd, const char * const *argv, const char * const *env)
   sp = sp_flat - ((argc + 1 + envc + 1) * sizeof (address_word));
   /* Then the argc.  */
   sp -= sizeof (unsigned_word);
+  /* Align to 16 bytes.  */
+  sp &= ~(address_word)15;
 
   /* Set up the regs the libgloss crt0 expects.  */
   riscv_cpu->a0 = argc;
-- 
2.25.1