* [Bug sim/30494] riscv ori x0, xn, imm decoded as incorrect instruction class
2023-05-27 14:52 [Bug sim/30494] New: ori x0, xn, imm decoded as incorrect instruction class tommy_murphy at hotmail dot com
@ 2023-05-27 14:54 ` tommy_murphy at hotmail dot com
2023-05-27 14:55 ` [Bug sim/30494] [RISCV] ori x0, xn, imm decoded as incorrect instruction class causing sim to terminate tommy_murphy at hotmail dot com
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: tommy_murphy at hotmail dot com @ 2023-05-27 14:54 UTC (permalink / raw)
To: gdb-prs
https://sourceware.org/bugzilla/show_bug.cgi?id=30494
Tommy Murphy <tommy_murphy at hotmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target| |riscv
Summary|ori x0, xn, imm decoded as |riscv ori x0, xn, imm
|incorrect instruction class |decoded as incorrect
| |instruction class
URL| |https://github.com/riscv-co
| |llab/riscv-gnu-toolchain/is
| |sues/1200
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* [Bug sim/30494] [RISCV] ori x0, xn, imm decoded as incorrect instruction class causing sim to terminate
2023-05-27 14:52 [Bug sim/30494] New: ori x0, xn, imm decoded as incorrect instruction class tommy_murphy at hotmail dot com
2023-05-27 14:54 ` [Bug sim/30494] riscv " tommy_murphy at hotmail dot com
@ 2023-05-27 14:55 ` tommy_murphy at hotmail dot com
2023-05-27 14:55 ` tommy_murphy at hotmail dot com
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: tommy_murphy at hotmail dot com @ 2023-05-27 14:55 UTC (permalink / raw)
To: gdb-prs
https://sourceware.org/bugzilla/show_bug.cgi?id=30494
Tommy Murphy <tommy_murphy at hotmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Summary|riscv ori x0, xn, imm |[RISCV] ori x0, xn, imm
|decoded as incorrect |decoded as incorrect
|instruction class |instruction class causing
| |sim to terminate
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* [Bug sim/30494] [RISCV] ori x0, xn, imm decoded as incorrect instruction class causing sim to terminate
2023-05-27 14:52 [Bug sim/30494] New: ori x0, xn, imm decoded as incorrect instruction class tommy_murphy at hotmail dot com
2023-05-27 14:54 ` [Bug sim/30494] riscv " tommy_murphy at hotmail dot com
2023-05-27 14:55 ` [Bug sim/30494] [RISCV] ori x0, xn, imm decoded as incorrect instruction class causing sim to terminate tommy_murphy at hotmail dot com
@ 2023-05-27 14:55 ` tommy_murphy at hotmail dot com
2023-05-27 16:32 ` tromey at sourceware dot org
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: tommy_murphy at hotmail dot com @ 2023-05-27 14:55 UTC (permalink / raw)
To: gdb-prs
https://sourceware.org/bugzilla/show_bug.cgi?id=30494
Tommy Murphy <tommy_murphy at hotmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |tommy_murphy at hotmail dot com
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* [Bug sim/30494] [RISCV] ori x0, xn, imm decoded as incorrect instruction class causing sim to terminate
2023-05-27 14:52 [Bug sim/30494] New: ori x0, xn, imm decoded as incorrect instruction class tommy_murphy at hotmail dot com
` (2 preceding siblings ...)
2023-05-27 14:55 ` tommy_murphy at hotmail dot com
@ 2023-05-27 16:32 ` tromey at sourceware dot org
2023-05-27 16:44 ` tommy_murphy at hotmail dot com
2023-05-27 16:48 ` tommy_murphy at hotmail dot com
5 siblings, 0 replies; 7+ messages in thread
From: tromey at sourceware dot org @ 2023-05-27 16:32 UTC (permalink / raw)
To: gdb-prs
https://sourceware.org/bugzilla/show_bug.cgi?id=30494
Tom Tromey <tromey at sourceware dot org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |tromey at sourceware dot org
--- Comment #1 from Tom Tromey <tromey at sourceware dot org> ---
I suspect this is more of a libopcodes bug than a sim bug.
Not sure which component is right for libopcodes though.
I'd say the binutils product but I don't see a libopcodes component.
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* [Bug sim/30494] [RISCV] ori x0, xn, imm decoded as incorrect instruction class causing sim to terminate
2023-05-27 14:52 [Bug sim/30494] New: ori x0, xn, imm decoded as incorrect instruction class tommy_murphy at hotmail dot com
` (3 preceding siblings ...)
2023-05-27 16:32 ` tromey at sourceware dot org
@ 2023-05-27 16:44 ` tommy_murphy at hotmail dot com
2023-05-27 16:48 ` tommy_murphy at hotmail dot com
5 siblings, 0 replies; 7+ messages in thread
From: tommy_murphy at hotmail dot com @ 2023-05-27 16:44 UTC (permalink / raw)
To: gdb-prs
https://sourceware.org/bugzilla/show_bug.cgi?id=30494
Tommy Murphy <tommy_murphy at hotmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Resolution|--- |INVALID
--- Comment #2 from Tommy Murphy <tommy_murphy at hotmail dot com> ---
Hi Tom - thanks for the reply. Looks like libopcodes bugs should be logged
against binutils alright:
https://sourceware.org/bugzilla/buglist.cgi?bug_status=UNCONFIRMED&bug_status=NEW&bug_status=ASSIGNED&bug_status=SUSPENDED&bug_status=WAITING&bug_status=REOPENED&list_id=75317&product=binutils&query_format=advanced&short_desc=libopcodes&short_desc_type=allwordssubstr
I'll log it there instead and close this one.
Thanks again.
Regards
Tommy
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* [Bug sim/30494] [RISCV] ori x0, xn, imm decoded as incorrect instruction class causing sim to terminate
2023-05-27 14:52 [Bug sim/30494] New: ori x0, xn, imm decoded as incorrect instruction class tommy_murphy at hotmail dot com
` (4 preceding siblings ...)
2023-05-27 16:44 ` tommy_murphy at hotmail dot com
@ 2023-05-27 16:48 ` tommy_murphy at hotmail dot com
5 siblings, 0 replies; 7+ messages in thread
From: tommy_murphy at hotmail dot com @ 2023-05-27 16:48 UTC (permalink / raw)
To: gdb-prs
https://sourceware.org/bugzilla/show_bug.cgi?id=30494
--- Comment #3 from Tommy Murphy <tommy_murphy at hotmail dot com> ---
Logged against binutils/libopcodes here:
https://sourceware.org/bugzilla/show_bug.cgi?id=30495
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