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* [glibc/arm/morello/main] x86: include BMI1 and BMI2 in x86-64-v3 level
@ 2022-10-26 15:08 Szabolcs Nagy
  0 siblings, 0 replies; only message in thread
From: Szabolcs Nagy @ 2022-10-26 15:08 UTC (permalink / raw)
  To: glibc-cvs;h=18bec23cbb4d530a2a8ce95353770661fabcd55f

commit 18bec23cbb4d530a2a8ce95353770661fabcd55f
Author: Aurelien Jarno <>
Date:   Mon Oct 3 23:46:11 2022 +0200

    x86: include BMI1 and BMI2 in x86-64-v3 level
    The "System V Application Binary Interface AMD64 Architecture Processor
    Supplement" mandates the BMI1 and BMI2 CPU features for the x86-64-v3
    Reviewed-by: Noah Goldstein  <>
    (cherry picked from commit b80f16adbd979831bf25ea491e1261e81885c2b6)

 sysdeps/x86/get-isa-level.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/sysdeps/x86/get-isa-level.h b/sysdeps/x86/get-isa-level.h
index 1ade78ab73..5b4dd5f062 100644
--- a/sysdeps/x86/get-isa-level.h
+++ b/sysdeps/x86/get-isa-level.h
@@ -47,6 +47,8 @@ get_isa_level (const struct cpu_features *cpu_features)
 	  isa_level |= GNU_PROPERTY_X86_ISA_1_V2;
 	  if (CPU_FEATURE_USABLE_P (cpu_features, AVX)
 	      && CPU_FEATURE_USABLE_P (cpu_features, AVX2)
+	      && CPU_FEATURE_USABLE_P (cpu_features, BMI1)
+	      && CPU_FEATURE_USABLE_P (cpu_features, BMI2)
 	      && CPU_FEATURE_USABLE_P (cpu_features, F16C)
 	      && CPU_FEATURE_USABLE_P (cpu_features, FMA)
 	      && CPU_FEATURE_USABLE_P (cpu_features, LZCNT)

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