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* [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr
@ 2024-04-17 20:08 Adhemerval Zanella
  0 siblings, 0 replies; 11+ messages in thread
From: Adhemerval Zanella @ 2024-04-17 20:08 UTC (permalink / raw)
  To: glibc-cvs

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=0f9ceb0c3e2b52081cf2ac3deb236dad9aa545b1

commit 0f9ceb0c3e2b52081cf2ac3deb236dad9aa545b1
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Tue Aug 9 17:22:58 2022 -0300

    arm: Use vmov.i32 instead of vmov on neon memchr
    
    clang fails with:
    
      error: invalid instruction

Diff:
---
 sysdeps/arm/armv7/multiarch/memchr_neon.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index 3f593f4268..f61e73faed 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -120,7 +120,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 
 	/* Clear the soff lower bits */
 	lsr		synd, synd, soff
@@ -166,7 +166,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 	cbz		synd, .Lnotfound
 	bhi		.Ltail	/* Uses the condition code from
 				   subs cntin, cntin, #32 above.  */

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr
@ 2024-04-02 15:54 Adhemerval Zanella
  0 siblings, 0 replies; 11+ messages in thread
From: Adhemerval Zanella @ 2024-04-02 15:54 UTC (permalink / raw)
  To: glibc-cvs

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=7aff3086ceb12b2bb0f286e2f1b938b09bde48ee

commit 7aff3086ceb12b2bb0f286e2f1b938b09bde48ee
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Tue Aug 9 17:22:58 2022 -0300

    arm: Use vmov.i32 instead of vmov on neon memchr
    
    clang fails with:
    
      error: invalid instruction

Diff:
---
 sysdeps/arm/armv7/multiarch/memchr_neon.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index 3f593f4268..f61e73faed 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -120,7 +120,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 
 	/* Clear the soff lower bits */
 	lsr		synd, synd, soff
@@ -166,7 +166,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 	cbz		synd, .Lnotfound
 	bhi		.Ltail	/* Uses the condition code from
 				   subs cntin, cntin, #32 above.  */

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr
@ 2024-02-09 17:32 Adhemerval Zanella
  0 siblings, 0 replies; 11+ messages in thread
From: Adhemerval Zanella @ 2024-02-09 17:32 UTC (permalink / raw)
  To: glibc-cvs

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=1f05b8c59e62ca6f5313525530a251b9c6d2eece

commit 1f05b8c59e62ca6f5313525530a251b9c6d2eece
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Tue Aug 9 17:22:58 2022 -0300

    arm: Use vmov.i32 instead of vmov on neon memchr
    
    clang fails with:
    
      error: invalid instruction

Diff:
---
 sysdeps/arm/armv7/multiarch/memchr_neon.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index 3f593f4268..f61e73faed 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -120,7 +120,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 
 	/* Clear the soff lower bits */
 	lsr		synd, synd, soff
@@ -166,7 +166,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 	cbz		synd, .Lnotfound
 	bhi		.Ltail	/* Uses the condition code from
 				   subs cntin, cntin, #32 above.  */

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr
@ 2024-02-07 14:07 Adhemerval Zanella
  0 siblings, 0 replies; 11+ messages in thread
From: Adhemerval Zanella @ 2024-02-07 14:07 UTC (permalink / raw)
  To: glibc-cvs

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=71dfb79afac6a21fdd92016f73c3bad87ead4938

commit 71dfb79afac6a21fdd92016f73c3bad87ead4938
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Tue Aug 9 17:22:58 2022 -0300

    arm: Use vmov.i32 instead of vmov on neon memchr
    
    clang fails with:
    
      error: invalid instruction

Diff:
---
 sysdeps/arm/armv7/multiarch/memchr_neon.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index 3f593f4268..f61e73faed 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -120,7 +120,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 
 	/* Clear the soff lower bits */
 	lsr		synd, synd, soff
@@ -166,7 +166,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 	cbz		synd, .Lnotfound
 	bhi		.Ltail	/* Uses the condition code from
 				   subs cntin, cntin, #32 above.  */

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr
@ 2024-01-29 17:58 Adhemerval Zanella
  0 siblings, 0 replies; 11+ messages in thread
From: Adhemerval Zanella @ 2024-01-29 17:58 UTC (permalink / raw)
  To: glibc-cvs

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=f40dc9bd60a82abaa841a32006780b731aa05ccf

commit f40dc9bd60a82abaa841a32006780b731aa05ccf
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Tue Aug 9 17:22:58 2022 -0300

    arm: Use vmov.i32 instead of vmov on neon memchr
    
    clang fails with:
    
      error: invalid instruction

Diff:
---
 sysdeps/arm/armv7/multiarch/memchr_neon.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index 3f593f4268..f61e73faed 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -120,7 +120,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 
 	/* Clear the soff lower bits */
 	lsr		synd, synd, soff
@@ -166,7 +166,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 	cbz		synd, .Lnotfound
 	bhi		.Ltail	/* Uses the condition code from
 				   subs cntin, cntin, #32 above.  */

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr
@ 2023-12-21 18:54 Adhemerval Zanella
  0 siblings, 0 replies; 11+ messages in thread
From: Adhemerval Zanella @ 2023-12-21 18:54 UTC (permalink / raw)
  To: glibc-cvs

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=878b6d18e7e53c61cf18134741df12442fd34bae

commit 878b6d18e7e53c61cf18134741df12442fd34bae
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Tue Aug 9 17:22:58 2022 -0300

    arm: Use vmov.i32 instead of vmov on neon memchr
    
    clang fails with:
    
      error: invalid instruction

Diff:
---
 sysdeps/arm/armv7/multiarch/memchr_neon.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index d645d16a58..47cddb18cf 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -120,7 +120,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 
 	/* Clear the soff lower bits */
 	lsr		synd, synd, soff
@@ -166,7 +166,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 	cbz		synd, .Lnotfound
 	bhi		.Ltail	/* Uses the condition code from
 				   subs cntin, cntin, #32 above.  */

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr
@ 2023-09-28 17:52 Adhemerval Zanella
  0 siblings, 0 replies; 11+ messages in thread
From: Adhemerval Zanella @ 2023-09-28 17:52 UTC (permalink / raw)
  To: glibc-cvs

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=012fb166dfbe89b76880b436abff8dbb1c02dc69

commit 012fb166dfbe89b76880b436abff8dbb1c02dc69
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Tue Aug 9 17:22:58 2022 -0300

    arm: Use vmov.i32 instead of vmov on neon memchr
    
    clang fails with:
    
      error: invalid instruction

Diff:
---
 sysdeps/arm/armv7/multiarch/memchr_neon.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index d645d16a58..47cddb18cf 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -120,7 +120,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 
 	/* Clear the soff lower bits */
 	lsr		synd, synd, soff
@@ -166,7 +166,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 	cbz		synd, .Lnotfound
 	bhi		.Ltail	/* Uses the condition code from
 				   subs cntin, cntin, #32 above.  */

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr
@ 2023-08-30 12:37 Adhemerval Zanella
  0 siblings, 0 replies; 11+ messages in thread
From: Adhemerval Zanella @ 2023-08-30 12:37 UTC (permalink / raw)
  To: glibc-cvs

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=4bef870999a8a9ed42e82c5b925ac1303f00b722

commit 4bef870999a8a9ed42e82c5b925ac1303f00b722
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Tue Aug 9 17:22:58 2022 -0300

    arm: Use vmov.i32 instead of vmov on neon memchr

Diff:
---
 sysdeps/arm/armv7/multiarch/memchr_neon.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index d645d16a58..47cddb18cf 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -120,7 +120,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 
 	/* Clear the soff lower bits */
 	lsr		synd, synd, soff
@@ -166,7 +166,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 	cbz		synd, .Lnotfound
 	bhi		.Ltail	/* Uses the condition code from
 				   subs cntin, cntin, #32 above.  */

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr
@ 2023-02-09 19:49 Adhemerval Zanella
  0 siblings, 0 replies; 11+ messages in thread
From: Adhemerval Zanella @ 2023-02-09 19:49 UTC (permalink / raw)
  To: glibc-cvs

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=bf21cd3a7e201864ceb1de46a62038b59348659c

commit bf21cd3a7e201864ceb1de46a62038b59348659c
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Tue Aug 9 17:22:58 2022 -0300

    arm: Use vmov.i32 instead of vmov on neon memchr

Diff:
---
 sysdeps/arm/armv7/multiarch/memchr_neon.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index d645d16a58..47cddb18cf 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -120,7 +120,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 
 	/* Clear the soff lower bits */
 	lsr		synd, synd, soff
@@ -166,7 +166,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 	cbz		synd, .Lnotfound
 	bhi		.Ltail	/* Uses the condition code from
 				   subs cntin, cntin, #32 above.  */

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr
@ 2022-10-28 17:42 Adhemerval Zanella
  0 siblings, 0 replies; 11+ messages in thread
From: Adhemerval Zanella @ 2022-10-28 17:42 UTC (permalink / raw)
  To: glibc-cvs

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=c9e1cfce3911c3f07b886b629eacbb2d468ddbbc

commit c9e1cfce3911c3f07b886b629eacbb2d468ddbbc
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Tue Aug 9 17:22:58 2022 -0300

    arm: Use vmov.i32 instead of vmov on neon memchr

Diff:
---
 sysdeps/arm/armv7/multiarch/memchr_neon.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index 22c9c034c1..e9c2ff82cf 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -120,7 +120,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 
 	/* Clear the soff lower bits */
 	lsr		synd, synd, soff
@@ -166,7 +166,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 	cbz		synd, .Lnotfound
 	bhi		.Ltail	/* Uses the condition code from
 				   subs cntin, cntin, #32 above.  */

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr
@ 2022-10-04 13:00 Adhemerval Zanella
  0 siblings, 0 replies; 11+ messages in thread
From: Adhemerval Zanella @ 2022-10-04 13:00 UTC (permalink / raw)
  To: glibc-cvs

https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=49e63cc8fda5a67ccf6eca14d45911830bb11cea

commit 49e63cc8fda5a67ccf6eca14d45911830bb11cea
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Tue Aug 9 17:22:58 2022 -0300

    arm: Use vmov.i32 instead of vmov on neon memchr

Diff:
---
 sysdeps/arm/armv7/multiarch/memchr_neon.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sysdeps/arm/armv7/multiarch/memchr_neon.S b/sysdeps/arm/armv7/multiarch/memchr_neon.S
index 22c9c034c1..e9c2ff82cf 100644
--- a/sysdeps/arm/armv7/multiarch/memchr_neon.S
+++ b/sysdeps/arm/armv7/multiarch/memchr_neon.S
@@ -120,7 +120,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 
 	/* Clear the soff lower bits */
 	lsr		synd, synd, soff
@@ -166,7 +166,7 @@ ENTRY(memchr)
 	vpadd.i8	vdata1_0, vdata1_0, vdata1_1
 	vpadd.i8	vdata0_0, vdata0_0, vdata1_0
 	vpadd.i8	vdata0_0, vdata0_0, vdata0_0
-	vmov		synd, vdata0_0[0]
+	vmov.i32	synd, vdata0_0[0]
 	cbz		synd, .Lnotfound
 	bhi		.Ltail	/* Uses the condition code from
 				   subs cntin, cntin, #32 above.  */

^ permalink raw reply	[flat|nested] 11+ messages in thread

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2024-04-17 20:08 [glibc/azanella/clang] arm: Use vmov.i32 instead of vmov on neon memchr Adhemerval Zanella
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2024-04-02 15:54 Adhemerval Zanella
2024-02-09 17:32 Adhemerval Zanella
2024-02-07 14:07 Adhemerval Zanella
2024-01-29 17:58 Adhemerval Zanella
2023-12-21 18:54 Adhemerval Zanella
2023-09-28 17:52 Adhemerval Zanella
2023-08-30 12:37 Adhemerval Zanella
2023-02-09 19:49 Adhemerval Zanella
2022-10-28 17:42 Adhemerval Zanella
2022-10-04 13:00 Adhemerval Zanella

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